Ð þí`Ð8\0( [ø$rockchip,rk3128-evbrockchip,rk3128 +!7Rockchip RK3128 Evaluation boardaliases=/pinctrl/gpio@2007c000C/pinctrl/gpio@20080000I/pinctrl/gpio@20084000O/pinctrl/gpio@20088000U/i2c@20072000Z/i2c@20056000_/i2c@2005a000d/i2c@2005e000i/serial@20060000q/serial@20064000y/serial@20068000�/mmc@1021c000arm-pmuarm,cortex-a7-pmu0†LMNO‘cpus+¤rockchip,rk3036-smpcpu@f00²cpuarm,cortex-a7¾œ@Ð×Þòcpu@f01²cpuarm,cortex-a7¾×Þcpu@f02²cpuarm,cortex-a7¾×Þcpu@f03²cpuarm,cortex-a7¾×Þopp-table-0operating-points-v2 opp-216000000 ßæ ~ð~ð7Èopp-408000000Q– ~ð~ð7Èopp-600000000#ÃF ~ð~ð7Èopp-696000000)| à˜à˜7Èopp-8160000000£, g8g87È)opp-1008000000<Ü O€O€7Èopp-1200000000G†Œ 7È7È7Èdisplay-subsystemrockchip,display-subsystem5 ;disabledopp-table-1operating-points-v2 opp-200000000 ë à˜à˜Ðopp-300000000ᣠ��Ðopp-400000000ׄ Œ0Œ0Ðopp-480000000œ8 ÐÐÐtimerarm,armv7-timer0†   Bfn6oscillator fixed-clockfn6vxin24m‰)sram@10080000 mmio-sram¾ + – smp-sram@0rockchip,rk3066-smp-sram¾gpu@10090000"rockchip,rk3128-maliarm,mali-400¾ H†�gpgpmmupp0ppmmu0pp1ppmmu1ÐÕÕ ­buscoreÞ ×x¹  ;disabledsyscon@100a0000&rockchip,rk3128-pmusysconsimple-mfd¾ power-controller!rockchip,rk3128-power-controllerÇ+ power-domain@1¾˜ÐÆÖ¿ÑÇÔÌÏEr”ÍÓÀÁÒÕ¾zÛ Çpower-domain@2¾(ÐÅÎÄ͆ÛÇpower-domain@3¾ÐÕÛÇvideo-codec@10106000(rockchip,rk3128-vpurockchip,rk3066-vpu¾`† �vepuvdpu ÐÅÎÄÍ(­aclk_vdpuhclk_vdpuaclk_vepuhclk_vepuâ¹ iommu@10106800rockchip,iommu¾h †CÐÄÎ ­aclkiface¹ évop@1010e000rockchip,rk3126-vop¾à † Ð̾ϭaclk_vopdclk_vophclk_vop×def öaxiahbdclk¹  ;disabledport+endpoint@0¾.endpoint@1¾dsi@10110000*rockchip,rk3128-mipi-dsisnps,dw-mipi-dsi¾@ †!ÐE­pclkdphy¹ ׉öapb! ;disabledports+port@0¾endpointport@1¾qos@1012d000rockchip,rk3128-qossyscon¾Ð qos@1012e000rockchip,rk3128-qossyscon¾à qos@1012f000rockchip,rk3128-qossyscon¾ð qos@1012f080rockchip,rk3128-qossyscon¾ð€  qos@1012f100rockchip,rk3128-qossyscon¾ñ  qos@1012f180rockchip,rk3128-qossyscon¾ñ€  qos@1012f200rockchip,rk3128-qossyscon¾ò interrupt-controller@10139000arm,cortex-a7-gic ¾� À à  † .Cusb@101800002rockchip,rk3128-usbrockchip,rk3066-usbsnps,dwc2¾ † ÐÚ­otgTotg\n}€€@  usb2-phy;okayŒusb@101c0000 generic-ehci¾ † ÐÙusb;okayusb@101e0000 generic-ohci¾ † ÐÙusb;okayi2s@10200000(rockchip,rk3128-i2srockchip,rk3066-i2s¾  †DÐP»­i2s_clki2s_hclk˜�txrx§ ;disabledspdif@10204000,rockchip,rk3128-spdifrockchip,rk3066-spdif¾ @ †7ÐS¸ ­mclkhclk˜ �tx¸defaultƧ ;disabledspi@1020c000 rockchip,sfc¾ À€ †2Й߭clk_sfchclk_sfc ;disabledmmc@102140000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc¾!@@ † ÐÈDrv­biuciuciu-driveciu-sample˜ �rx-txÐÛðÑ€×Qöreset ;disabledmmc@102180000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc¾!€@ † ÐÉEsw­biuciuciu-driveciu-sample˜ �rx-txÐÛðÑ€×Röreset ;disabledmmc@1021c0000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc¾!À@ † ÐËGuy­biuciuciu-driveciu-sample˜ �rx-txÐÛðÑ€×Söreset;okayé¸default Æi2s@10220000(rockchip,rk3128-i2srockchip,rk3066-i2s¾" †ÐQ¼­i2s_clki2s_hclk˜�txrxó¸defaultÆ § ;disablednand-controller@10500000(rockchip,rk3128-nfcrockchip,rk2928-nfc¾P@ †ÐÅC­ahbnfc¸default Æ!"#$%&'( ;disabledclock-controller@20000000rockchip,rk3128-cru¾ Ð)­xin24m!‰+#g¸€syscon@20008000&rockchip,rk3128-grfsysconsimple-mfd¾ €+usb2phy@17crockchip,rk3128-usb2phy¾| ÐŽ­phyclk vusb480m_phyš@*‰;okay*host-port †5 �linestateW;okayotg-port$†#34�otg-bvalidotg-idlinestateW;okayhdmi@20034000rockchip,rk3128-inno-hdmi¾ @@ †-ÐG¾ ­pclkref¸default Æ+,-¹ § ;disabledports+port@0¾endpoint.port@1¾phy@20038000rockchip,rk3128-dsi-dphy¾ €@Дr ­refpclkW¹ ×$öapb ;disabledtimer@20044000,rockchip,rk3128-timerrockchip,rk3288-timer¾ @  †ÐaU ­pclktimertimer@20044020,rockchip,rk3128-timerrockchip,rk3288-timer¾ @  †ÐaV ­pclktimertimer@20044040,rockchip,rk3128-timerrockchip,rk3288-timer¾ @@  †;ÐaW ­pclktimertimer@20044060,rockchip,rk3128-timerrockchip,rk3288-timer¾ @`  †<ÐaX ­pclktimertimer@20044080,rockchip,rk3128-timerrockchip,rk3288-timer¾ @€  †=ÐaY ­pclktimertimer@200440a0,rockchip,rk3128-timerrockchip,rk3288-timer¾ @   †>ÐaZ ­pclktimerwatchdog@2004c000 rockchip,rk3128-wdtsnps,dw-wdt¾ À †"Ð? ;disabledpwm@20050000(rockchip,rk3128-pwmrockchip,rk3288-pwm¾ Ð^¸defaultÆ/b ;disabledpwm@20050010(rockchip,rk3128-pwmrockchip,rk3288-pwm¾ Ð^¸defaultÆ0b ;disabledpwm@20050020(rockchip,rk3128-pwmrockchip,rk3288-pwm¾  Ð^¸defaultÆ1b ;disabledpwm@20050030(rockchip,rk3128-pwmrockchip,rk3288-pwm¾ 0Ð^¸defaultÆ2b ;disabledi2c@20056000(rockchip,rk3128-i2crockchip,rk3288-i2c¾ ` †­i2cÐM¸defaultÆ3+;okayrtc@51haoyu,hym8563¾Q‰vxin32ki2c@2005a000(rockchip,rk3128-i2crockchip,rk3288-i2c¾   †­i2cÐN¸defaultÆ4+ ;disabledi2c@2005e000(rockchip,rk3128-i2crockchip,rk3288-i2c¾ à †­i2cÐO¸defaultÆ5+ ;disabledserial@20060000&rockchip,rk3128-uartsnps,dw-apb-uart¾  †fn6ÐMU­baudclkapb_pclk˜�txrx¸default Æ678mz ;disabledserial@20064000&rockchip,rk3128-uartsnps,dw-apb-uart¾ @ †fn6ÐNV­baudclkapb_pclk˜�txrx¸defaultÆ9mz ;disabledserial@20068000&rockchip,rk3128-uartsnps,dw-apb-uart¾ € †fn6ÐOW­baudclkapb_pclk˜�txrx¸defaultÆ:mz ;disabledsaradc@2006c000rockchip,saradc¾ À †Ð[>­saradcapb_pclk×W ösaradc-apb„ ;disabledi2c@20072000(rockchip,rk3128-i2crockchip,rk3288-i2c¾   †­i2cÐL¸defaultÆ;+ ;disabledspi@20074000(rockchip,rk3128-spirockchip,rk3066-spi¾ @ †ÐAR­spiclkapb_pclk˜ �txrx¸defaultÆ<=>?@+ ;disableddma-controller@20078000arm,pl330arm,primecell¾ €@†–±Ð ­apb_pclkÈethernet@2008c000rockchip,rk3128-gmac¾ À@†89�macirqeth_wake_irq8Ð~�‚€ÔoM­stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac×8 östmmaceth!Óá ;disabledmdiosnps,dwmac-mdio+pinctrlrockchip,rk3128-pinctrl!+–gpio@2007c000rockchip,gpio-bank¾ À †$Ð@ïÿ.CCgpio@20080000rockchip,gpio-bank¾  †%ÐAïÿ.Cgpio@20084000rockchip,gpio-bank¾ @ †&ÐBïÿ.CEgpio@20088000rockchip,gpio-bank¾ € †'ÐCïÿ.Cpcfg-pull-default Bpcfg-pull-none!Aemmcemmc-clk.Aemmc-cmd.Bemmc-cmd1.Bemmc-pwr.Bemmc-bus1.Bemmc-bus4@.BBBBemmc-bus8€.BBBBBBBBgmacrgmii-pinsð.B B B B BBBBBBBBBBBrmii-pins .B B BBBBBBBBhdmihdmii2c-xfer .AA+hdmi-hpd.A,hdmi-cec.A-i2c0i2c0-xfer .AA;i2c1i2c1-xfer .AA3i2c2i2c2-xfer .AA4i2c3i2c3-xfer .AA5i2si2s-bus`.A A A A AA i2s1-bus`.AAAAAAlcdclcdc-dclk.Alcdc-den. Alcdc-hsync. Alcdc-vsync. Alcdc-rgb24à. A AAAAAAAAAAAAAnfcflash-ale.A!flash-cle.A#flash-wrn.A(flash-rdn.A&flash-rdy.A'flash-cs0.A$flash-dqs.A%flash-bus8€.AAAAAAAA"pwm0pwm0-pin.A/pwm1pwm1-pin.A0pwm2pwm2-pin.A1pwm3pwm3-pin.A2sdiosdio-clk.Asdio-cmd.Bsdio-pwren.Bsdio-bus4@.BBBBsdmmcsdmmc-clk.Asdmmc-cmd.Bsdmmc-det.Bsdmmc-wp.Bsdmmc-pwren.Bsdmmc-bus4@.BBBBsfcsfc-bus2 .BBsfc-bus4@.BBBBsfc-clk.Asfc-cs0.Bsfc-cs1.Bspdifspdif-tx.Aspi0spi0-clk.B>spi0-cs0. B?spi0-tx. B<spi0-rx. B=spi0-cs1. B@spi1-clk.Bspi1-cs0.Bspi1-tx.Bspi1-rx.Bspi1-cs1.Bspi2-clk. Bspi2-cs0.Bspi2-tx. Bspi2-rx. Buart0uart0-xfer .BA6uart0-cts.A7uart0-rts.A8uart1uart1-xfer . B B9uart1-cts.Auart1-rts. Auart2uart2-xfer .BA:uart2-cts.Auart2-rts.Ausb-hosthost-vbus-drv.AFusb-otgotg-vbus-drv.ADchosen