Ð þíIâ8D¨(:Dp2Enclustra Mercury+ AA1 on Mercury+ PE1 Base BoardR!enclustra,mercury-aa1-pe1enclustra,mercury-aa1altr,socfpga-arria10altr,socfpgacpus,altr,socfpga-a10-smpcpu@0!arm,cortex-a9:cpuFJ[cpu@1!arm,cortex-a9:cpuFJ[pmu@ff111000!arm,cortex-a9-pmuct|}Fÿÿ0interrupt-controller@ffffd000!arm,cortex-a9-gic’£FÿÿÐÿÿÁ[soc !simple-bus:socc¸amba !simple-bus¸pdma@ffda1000!arm,pl330arm,primecellFÿÚltSTUVWXYZ[¿Ê Ñapb_pclkÝ05 ädmadma-ocp["fpga-region !fpga-regionð¸clkmgr@ffd04000 !altr,clk-mgrFÿÐ@clockscb_intosc_hs_div2_clkù !fixed-clock[cb_intosc_ls_clkù !fixed-clock[ f2s_free_clkù !fixed-clock[ osc1ù !fixed-clockü“P[main_pll@40ù!altr,socfpga-a10-pll-clock Ê F@[ main_mpu_base_clkù!altr,socfpga-a10-perip-clkÊ  @ [main_noc_base_clkù!altr,socfpga-a10-perip-clkÊ  D [main_emaca_clk@68ù!altr,socfpga-a10-perip-clkÊ Fhmain_emacb_clk@6cù!altr,socfpga-a10-perip-clkÊ Flmain_emac_ptp_clk@70ù!altr,socfpga-a10-perip-clkÊ Fpmain_gpio_db_clk@74ù!altr,socfpga-a10-perip-clkÊ Ftmain_sdmmc_clk@78ù!altr,socfpga-a10-perip-clkÊ Fx[main_s2f_usr0_clk@7cù!altr,socfpga-a10-perip-clkÊ F|main_s2f_usr1_clk@80ù!altr,socfpga-a10-perip-clkÊ F€[main_hmc_pll_ref_clk@84ù!altr,socfpga-a10-perip-clkÊ F„main_periph_ref_clk@9cù!altr,socfpga-a10-perip-clkÊ Fœ[ periph_pll@c0ù!altr,socfpga-a10-pll-clockÊ FÀ[ peri_mpu_base_clkù!altr,socfpga-a10-perip-clkÊ  @ [peri_noc_base_clkù!altr,socfpga-a10-perip-clkÊ  D [peri_emaca_clk@e8ù!altr,socfpga-a10-perip-clkÊ Fèperi_emacb_clk@ecù!altr,socfpga-a10-perip-clkÊ Fìperi_emac_ptp_clk@f0ù!altr,socfpga-a10-perip-clkÊ Fð[peri_gpio_db_clk@f4ù!altr,socfpga-a10-perip-clkÊ Fôperi_sdmmc_clk@f8ù!altr,socfpga-a10-perip-clkÊ Fø[peri_s2f_usr0_clk@fcù!altr,socfpga-a10-perip-clkÊ Füperi_s2f_usr1_clk@100ù!altr,socfpga-a10-perip-clkÊ F[peri_hmc_pll_ref_clk@104ù!altr,socfpga-a10-perip-clkÊ Fmpu_free_clk@60ù!altr,socfpga-a10-perip-clkÊ F`[noc_free_clk@64ù!altr,socfpga-a10-perip-clkÊ Fd[s2f_user1_free_clk@104ù!altr,socfpga-a10-perip-clkÊ Fsdmmc_free_clk@f8ù!altr,socfpga-a10-perip-clkÊ Fø[l4_sys_free_clkù!altr,socfpga-a10-perip-clkÊ[,l4_main_clkù!altr,socfpga-a10-gate-clkÊ ¨,H[l4_mp_clkù!altr,socfpga-a10-gate-clkÊ ¨,H[l4_sp_clkù!altr,socfpga-a10-gate-clkÊ ¨,H[ mpu_periph_clkù!altr,socfpga-a10-gate-clkÊ,H[+sdmmc_clkù!altr,socfpga-a10-gate-clkÊ,È[#qspi_clkù!altr,socfpga-a10-gate-clkÊ,È [*nand_x_clkù!altr,socfpga-a10-gate-clkÊ,È [nand_ecc_clkù!altr,socfpga-a10-gate-clkÊ,È [%nand_clkù!altr,socfpga-a10-gate-clkÊ,È [$spi_m_clkù!altr,socfpga-a10-gate-clkÊ,È [!usb_clkù!altr,socfpga-a10-gate-clkÊ,È[-s2f_usr1_clkù!altr,socfpga-a10-gate-clkÊ,Èstmmac-axi-config5EU[ethernet@ff8000008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _DFÿ€  t\rmacirq‚�€¹Ç@ÊÑstmmacethptp_refÝ (ästmmacethstmmaceth-ocpÕåokay ìrgmii-idõÿÿÿÿþØ ['mdio!snps,dwmac-mdioethernet-phy@3F�$¤1¤>¤K¤X¤eDq~‹˜¥[ethernet@ff8020008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _HFÿ€  t]rmacirq²‚�€¹Ç@ÊÑstmmacethptp_refÝ!)ästmmacethstmmaceth-ocpÕ ådisabledethernet@ff8040008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _LFÿ€@  t^rmacirq²‚�€¹Ç@ÊÑstmmacethptp_refÝ"*ästmmacethstmmaceth-ocpÕ ådisabledgpio@ffc02900!snps,dw-apb-gpioFÿÀ)ÝXåokaygpio-controller@0!snps,dw-apb-gpio-port¾ÎÚF£’ tpgpio@ffc02a00!snps,dw-apb-gpioFÿÀ*ÝYåokaygpio-controller@0!snps,dw-apb-gpio-port¾ÎÚF£’ tqgpio@ffc02b00!snps,dw-apb-gpioFÿÀ+ÝZåokaygpio-controller@0!snps,dw-apb-gpio-port¾ÎÚF£’ trfpga-mgr@ffd03000!altr,socfpga-a10-fpga-mgrFÿÐ0ÿÏä Ê݃äfpgamgr[i2c@ffc02200!snps,designware-i2cFÿÀ" tiÊ ÝHåokayè,i2c@ffc02300!snps,designware-i2cFÿÀ# tjÊ ÝIåokayè,† crypto@64!atmel,atsha204aFdrtc@6f!isil,isl12022Foeeprom@57åokay!microchip,24c128FWý@ user eeprom temperature-sensor@2fåokay!national,lm80F/clock-controller@70!silabs,si5338Fpi2c@ffc02400!snps,designware-i2cFÿÀ$ tkÊ ÝJ ådisabledi2c@ffc02500!snps,designware-i2cFÿÀ% tlÊ ÝK ådisabledi2c@ffc02600!snps,designware-i2cFÿÀ& tmÊ ÝL ådisabledspi@ffda4000!snps,dw-apb-ssiFÿÚ@ teÊ!Ý1äspi ådisabledspi@ffda5000!snps,dw-apb-ssiFÿÚP tf!"0"Ê!Ý2äspi ådisabledsdr@ffcfb100!altr,sdr-ctlsysconFÿϱ€[&cache-controller@fffff000!arm,pl310-cacheFÿÿð t?MYgv[mmc@ff808000!altr,socfpga-dw-mshcFÿ€€ tb¼Ê#ÑbiuciuÝ' _(åokayŠ›¥¯‡[(nand-controller@ffb90000!altr,socfpga-denali-nandFÿ¹ ÿ¸¿nand_datadenali_reg tc Ê$%Ñnandnand_xeccÝ% ådisabledsram@ffe00000 !mmio-sramFÿà¸eccmgr!altr,socfpga-a10-ecc-manager_t£’¸sdramedac!altr,sdram-edac-a10É&t1l2-ecc@ffd06010!altr,socfpga-a10-l2-eccFÿÐ`t ocram-ecc@ff8c3000!altr,socfpga-a10-ocram-eccFÿŒ0t!emac0-rx-ecc@ff8c0800!altr,socfpga-eth-mac-eccFÿŒÙ't$emac0-tx-ecc@ff8c0c00!altr,socfpga-eth-mac-eccFÿŒ Ù't%sdmmca-ecc@ff8c2c00!altr,socfpga-sdmmc-eccFÿŒ,Ù( t/0dma-ecc@ff8c8000!altr,socfpga-dma-eccFÿŒ€Ù"t *usb0-ecc@ff8c8800!altr,socfpga-usb-eccFÿŒˆÙ)t"spi@ff809000!!intel,socfpga-qspicdns,qspi-norFÿ€�ÿ  tdé€ù Ê*Ý&.äqspiqspi-ocp ådisabledflash@0!jedec,spi-norF2CT˜–€fv2„2’ partition@raw Flash RawFrstmgr@ffd05000® !altr,rst-mgrFÿÐP» [snoop-control-unit@ffffc000!arm,cortex-a9-scuFÿÿÀsysmgr@ffd06000!altr,sys-mgrsysconFÿÐ`ÎÿÐb0[timer@ffffc600!arm,cortex-a9-twd-timerFÿÿÆ t Ê+timer0@ffc02700!snps,dw-apb-timer tsFÿÀ'Ê ÑtimerÝDätimertimer1@ffc02800!snps,dw-apb-timer ttFÿÀ(Ê ÑtimerÝEätimertimer2@ffd00000!snps,dw-apb-timer tuFÿÐÊ,ÑtimerÝBätimertimer3@ffd00100!snps,dw-apb-timer tvFÿÐÊ,ÑtimerÝCätimerserial@ffc02000!snps,dw-apb-uartFÿÀ  tnÞèÊ ÝP ådisabledserial@ffc02100!snps,dw-apb-uartFÿÀ! toÞèÊ ÝQåokayusbphyõ!usb-nop-xceivåokay[.usb@ffb00000 !snps,dwc2Fÿ°ÿÿ t_Ê-ÑotgÝ#ädwc2. usb2-phyåokayhost[)usb@ffb40000 !snps,dwc2Fÿ´ÿÿ t`Ê-ÑotgÝ$ädwc2. usb2-phy ådisabledwatchdog@ffd00200 !snps,dw-wdtFÿÐ twÊ,Ý@ ådisabledwatchdog@ffd00300 !snps,dw-wdtFÿÐ txÊ,ÝA ådisabledaliases/soc/ethernet@ff800000!/soc/serial@ffc02100)/soc/spi@ff809000memory@0:memoryF€chosen.serial1:115200n8 #address-cells#size-cellsmodelcompatibleenable-methoddevice_typeregnext-level-cachephandleinterrupt-parentinterruptsinterrupt-affinity#interrupt-cellsinterrupt-controllerranges#dma-cellsclocksclock-namesresetsreset-namesfpga-mgr#clock-cellsclock-frequencydiv-regfixed-dividerclk-gatesnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenaltr,sysmgr-sysconinterrupt-namessnps,multicast-filter-binssnps,perfect-filter-entriestx-fifo-depthrx-fifo-depthsnps,axi-configstatusphy-modephy-addrmax-frame-sizephy-handlerxc-skew-psrxd0-skew-psrxd1-skew-psrxd2-skew-psrxd3-skew-psrxdv-skew-pstxc-skew-pstxd0-skew-pstxd1-skew-pstxd2-skew-pstxd3-skew-pstxen-skew-psmac-addressgpio-controller#gpio-cellssnps,nr-gpiosi2c-sda-hold-time-nspagesizelabeladdress-widthnum-cstx-dma-channelrx-dma-channelcache-unifiedcache-levelprefetch-dataprefetch-instrarm,shared-overridecap-sd-highspeedbroken-cdbus-widthclk-phase-sd-hsreg-namesaltr,sdr-sysconaltr,ecc-parentcdns,fifo-depthcdns,fifo-widthcdns,trigger-addressu-boot,dm-pre-relocspi-rx-bus-widthspi-tx-bus-widthspi-max-frequencycdns,read-delaycdns,tshsl-nscdns,tsd2d-nscdns,tchsh-nscdns,tslch-ns#reset-cellsaltr,modrst-offsetcpu1-start-addrreg-shiftreg-io-width#phy-cellsphysphy-namesdr_modeethernet0serial1spi0stdout-path