Ð þíÀ¦8´ ( †³ègoogle,veyron-tiger-rev8google,veyron-tiger-rev7google,veyron-tiger-rev6google,veyron-tiger-rev5google,veyron-tiger-rev4google,veyron-tiger-rev3google,veyron-tiger-rev2google,veyron-tiger-rev1google,veyron-tiger-rev0google,veyron-tigergoogle,veyronrockchip,rk3288& 7Google Tigeraliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000‚/i2c@ff140000‡/i2c@ff660000Œ/i2c@ff150000‘/i2c@ff160000–/i2c@ff170000›/serial@ff180000£/serial@ff190000«/serial@ff690000³/serial@ff1b0000»/serial@ff1c0000Ã/spi@ff110000È/spi@ff120000Í/spi@ff130000Ò/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0×—˜™šâcpusõrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 ';JQrk wcpu@501cpuarm,cortex-a12 ';JQrwcpu@502cpuarm,cortex-a12 ';JQrwcpu@503cpuarm,cortex-a12 ';JQrwopp-table-0operating-points-v2wopp-126000000Š‚›€‘ » Ÿœ@opp-216000000Š ßæ‘ » opp-408000000ŠQ–‘ » opp-600000000Š#ÃF‘ » opp-696000000Š)|‘~ðopp-816000000Š0£,‘B@opp-1008000000Š<Ü‘�opp-1200000000ŠG†Œ‘Èàopp-1416000000ŠTfr‘O€opp-1512000000ŠZJ‘Ðopp-1608000000Š_Ø"‘Ö opp-1704000000Še�ú‘™popp-1800000000ŠkIÒ‘\Àreserved-memory°dma-unusable@fe000000þoscillator fixed-clock·n6Çxin24mÚw timerarm,armv7-timerç0×   ·n6 timer@ff810000rockchip,rk3288-timerÿ�  ×H Ja  "pclktimerdisplay-subsystemrockchip,display-subsystem. mmc@ff0c0000rockchip,rk3288-dw-mshc4ðÑ€ JÈDrv"biuciuciu-driveciu-sampleB × ÿ @ €Mreset Ydisabledmmc@ff0d0000rockchip,rk3288-dw-mshc4ðÑ€ JÉEsw"biuciuciu-driveciu-sampleB ×!ÿ @ �MresetYokay`j{ˆž ©·default ÅÏÜéöbtmrvl@2marvell,sd8897-bt&× ·defaultÅmmc@ff0e0000rockchip,rk3288-dw-mshc4ðÑ€ JÊFtx"biuciuciu-driveciu-sampleB ×"ÿ@ ‚Mreset Ydisabledmmc@ff0f0000rockchip,rk3288-dw-mshc4ðÑ€ JËGuy"biuciuciu-driveciu-sampleB ×#ÿ@ ƒMresetYokay`0Bž`kž©·default Åsaradc@ff100000rockchip,saradcÿ ×$zJI["saradcapb_pclk W Msaradc-apb Ydisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spiJAR"spiclkapb_pclkŒ  ‘txrx ×,·defaultÅÿ Ydisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spiJBS"spiclkapb_pclkŒ ‘txrx ×-·defaultÅ !ÿ Ydisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spiJCT"spiclkapb_pclkŒ‘txrx ×.·defaultÅ"#$%ÿYokay› flash@0jedec,spi-nor®úð€i2c@ff140000rockchip,rk3288-i2cÿ ×>"i2cJM·defaultÅ&Yokay·€À2Ødtpm@20infineon,slb9645tt ïi2c@ff150000rockchip,rk3288-i2cÿ ×?"i2cJO·defaultÅ'Yokay·€À2Ø,touchscreen@10elan,ekth3500&(×·defaultÅ)* (+ +-i2c@ff160000rockchip,rk3288-i2cÿ ×@"i2cJP·defaultÅ,Yokay·€À2Ø,ts3a227e@3b ti,ts3a227e;&-×·defaultÅ.;w£i2c@ff170000rockchip,rk3288-i2cÿ ×A"i2cJQ·defaultÅ/ Ydisabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uartÿ ×7FPJMU"baudclkapb_pclkŒ‘txrx·default Å012Yokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uartÿ ×8FPJNV"baudclkapb_pclkŒ‘txrx·defaultÅ3Yokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uartÿi ×9FPJOW"baudclkapb_pclk·defaultÅ4Yokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uartÿ ×:FPJPX"baudclkapb_pclkŒ‘txrx·defaultÅ5 Ydisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uartÿ ×;FPJQY"baudclkapb_pclkŒ  ‘txrx·defaultÅ6 Ydisableddma-controller@ff250000arm,pl330arm,primecellÿ%@×]hƒJ "apb_pclkwthermal-zonesreserve-thermalšè°ˆ¾7cpu-thermalšd°ˆ¾7tripscpu_alert0ÎpÚÐpassivew8cpu_alert1Î$øÚÐpassivew9cpu_critΆ ÚÐ criticalcooling-mapsmap0å80êÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1å90êÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermalšd°ˆ¾7tripsgpu_alert0Î4ÚÐpassivew:gpu_critΆ ÚÐ criticalcooling-mapsmap0å: ê;ÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadcÿ( ×%JHZ"tsadcapb_pclk Ÿ Mtsadc-apb·initdefaultsleepÅ<ù=< #>0èHYokayG^w7ethernet@ff290000rockchip,rk3288-gmacÿ)×ymacirqeth_wake_irq#>8J—fgc˜Ä]M"stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac B MstmmacethYokay‰—™?°input½@ÈrgmiiÑA·defaultÅBCDEÜå0 îþ 'u0-mdio0snps,dwmac-mdioethernet-phy@1w@usb@ff500000 generic-ehciÿP ×JÂ)F.usbYokay8usb@ff520000 generic-ohciÿR ×)JÂ)F.usb Ydisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2ÿT ×JÃ"otgNhost)G .usb2-phyVYokaymusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2ÿX ×JÁ"otgNhost„–¥€€@@ )H .usb2-phyYokay‰z™Hmusb@ff5c0000 generic-ehciÿ\ ×JÄ Ydisableddma-controller@ff600000arm,pl330arm,primecellÿ`@×]hƒJÁ "apb_pclk Ydisabledi2c@ff650000rockchip,rk3288-i2cÿe ×<"i2cJL·defaultÅIYokay·€À2Ødpmic@1brockchip,rk808Çxin32kwifibt_32kin&-×·default ÅJKL´-ÚÕáíù)6+CPM MZNw™regulatorsDCDC_REG1gvdd_armvŠœ q°´ Ìqw regulator-state-memáDCDC_REG2gvdd_gpuvŠœ 5´ÐÌqw…regulator-state-memáDCDC_REG3 gvcc135_ddrvŠregulator-state-memúDCDC_REG4gvcc_18vŠœw@´w@wregulator-state-memúw@LDO_REG3gvdd_10vŠœB@´B@regulator-state-memúB@LDO_REG7 gvdd10_lcdvŠœB@´B@regulator-state-memáSWITCH_REG1 gvcc33_lcdvŠwdregulator-state-memáLDO_REG6 gvcc18_codecvŠœw@´w@weregulator-state-memáLDO_REG2vŠœw@´w@ gvdd18_lcdtregulator-state-memáLDO_REG8vŠœ2Z ´2Z  gvcc33_ccdregulator-state-memáSWITCH_REG2 gvcc33_lanwAi2c@ff660000rockchip,rk3288-i2cÿf ×="i2cJN·defaultÅOYokay·† À2Ø max98090@10maxim,max98090&P×"mclkJq·defaultÅQw¢pwm@ff680000rockchip,rk3288-pwmÿh.·defaultÅRJ_Yokayw¬pwm@ff680010rockchip,rk3288-pwmÿh.·defaultÅSJ_Yokaywžpwm@ff680020rockchip,rk3288-pwmÿh .·defaultÅTJ_ Ydisabledpwm@ff680030rockchip,rk3288-pwmÿh0.·defaultÅUJ_ Ydisabledsram@ff700000 mmio-sramÿp€°ÿp€smp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdÿswpower-controller!rockchip,rk3288-power-controller9wipower-domain@9 ÈJÊÍÈÌÅÆ¾¿ÔÕÖÙÑÒchgfdehilkj$MVWXYZ[\]^9power-domain@11 JÏopM_`9power-domain@12 JÐÜMa9power-domain@13 JÀMbc9reboot-modesyscon-reboot-modeT”[RBÃgRBÃuRBà …RBÃsyscon@ff740000rockchip,rk3288-sgrfsysconÿtclock-controller@ff760000rockchip,rk3288-cruÿvJ "xin24m#>Ú‘H‰ÑÝjÒÞk$ž#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀwsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdÿww>edp-phyrockchip,rk3288-dp-phyJh"24m³Yokaywyio-domains"rockchip,rk3288-io-voltage-domainYokay¾+ÈÓá+ñ+ÿd  eusbphyrockchip,rk3288-usb-phyYokayusb-phy@320³ J]"phyclkÚ … Mphy-resetwHusb-phy@334³4J^"phyclkÚ ˆ Mphy-resetwFusb-phy@348³HJ_"phyclkÚ ‹ Mphy-resetwGwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdtÿ€Jp ×OYokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifÿ‹ $JTÐ "mclkhclkŒf‘tx ×6·defaultÅg#> Ydisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sÿ‰ $ ×5JRÎ"i2s_clki2s_hclkŒff‘txrx·defaultÅh 5 PYokayw¡crypto@ff8a0000rockchip,rk3288-cryptoÿŠ@ ×0 JÇÍ}Á"aclkhclksclkapb_pclk ® Mcrypto-rstiommu@ff900800rockchip,iommuÿ�@ ×JÊÔ "aclkiface j Ydisablediommu@ff914000rockchip,iommu ÿ‘@ÿ‘P ×JÍÕ "aclkiface j w Ydisabledrga@ff920000rockchip,rk3288-rgaÿ’€ ×JÈÖj"aclkhclksclk ’i  ilm Mcoreaxiahbvop@ff930000rockchip,rk3288-vop ÿ“œÿ“ ×JžÑ"aclk_vopdclk_vophclk_vop ’i  def Maxiahbdclk  jYokayportw endpoint@0 §kw€endpoint@1 §lw{endpoint@2 §mwtendpoint@3 §nwwiommu@ff930300rockchip,iommuÿ“ ×JÅÑ "aclkiface ’i  jYokaywjvop@ff940000rockchip,rk3288-vop ÿ”œÿ” ×JÆ¿Ò"aclk_vopdclk_vophclk_vop ’i  °±² Maxiahbdclk  oYokayportw endpoint@0 §pw�endpoint@1 §qw|endpoint@2 §rwuendpoint@3 §swxiommu@ff940300rockchip,iommuÿ” ×JÆÒ "aclkiface ’i  jYokaywodsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsiÿ–@ ×J~d "refpclk ’i #> Ydisabledportsport@0endpoint@0 §twmendpoint@1 §uwrport@1lvds@ff96c000rockchip,rk3288-lvdsÿ–À@Jg "pclk_lvds·lcdcÅv ’i #> Ydisabledportsport@0endpoint@0 §wwnendpoint@1 §xwsport@1dp@ff970000rockchip,rk3288-dpÿ—@ ×b‰h™ Jic"dppclk)y.dp ’i  oMdp#>Yokay·defaultÅzportsport@0endpoint@0 §{wlendpoint@1 §|wqport@1endpoint@0 §}w°hdmi@ff980000rockchip,rk3288-dw-hdmiÿ˜P ×gJhmn"iahbisfrcec ’i #> $Yokay·defaultunwedgeÅ~ùw¤portsport@0endpoint@0 §€wkendpoint@1 §�wpport@1video-codec@ff9a0000rockchip,rk3288-vpuÿš×   yvepuvdpuJÐÜ "aclkhclk  ‚ ’i iommu@ff9a0800rockchip,iommuÿš × JÐÜ "aclkiface j ’i w‚video-codec@ff9c0000rockchip,rk3288-vdecÿœ@ ×  JÏÛop"axiahbcabaccore ‰ÏÛopžׄõáá£á£  ƒ ’i iommu@ff9c0440rockchip,iommu ÿœ@@ÿœ€@ ×oJÏÛ "aclkiface j ’i wƒgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760ÿ£$× yjobmmugpuJÀ'„; ’i Yokay ·…w;opp-table-1operating-points-v2w„opp-100000000Šõá‘~ðopp-200000000Š ë‘~ðopp-300000000Šá£‘B@opp-400000000Šׄ‘Èàopp-600000000Š#ÃF‘Ðqos@ffaa0000rockchip,rk3288-qossysconÿª wbqos@ffaa0080rockchip,rk3288-qossysconÿª€ wcqos@ffad0000rockchip,rk3288-qossysconÿ­ wWqos@ffad0100rockchip,rk3288-qossysconÿ­ wXqos@ffad0180rockchip,rk3288-qossysconÿ­€ wYqos@ffad0400rockchip,rk3288-qossysconÿ­ wZqos@ffad0480rockchip,rk3288-qossysconÿ­€ w[qos@ffad0500rockchip,rk3288-qossysconÿ­ wVqos@ffad0800rockchip,rk3288-qossysconÿ­ w\qos@ffad0880rockchip,rk3288-qossysconÿ­€ w]qos@ffad0900rockchip,rk3288-qossysconÿ­ w^qos@ffae0000rockchip,rk3288-qossysconÿ® waqos@ffaf0000rockchip,rk3288-qossysconÿ¯ w_qos@ffaf0080rockchip,rk3288-qossysconÿ¯€ w`dma-controller@ffb20000arm,pl330arm,primecellÿ²@×]hƒJÁ "apb_pclkwfefuse@ffb40000rockchip,rk3288-efuseÿ´ Jq "pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400 à Ø@ÿÀÿÀ ÿÀ@ ÿÀ`  × wpinctrlrockchip,rk3288-pinctrl#>°·defaultsleepņ‡ˆ‰Š‹Œù†‡ˆ‰Š�Žgpio@ff750000rockchip,gpio-bankÿu ×QJ@ é ù à Øá PMIC_SLEEP_APDDRIO_PWROFFDDRIO_RETENTS3A227E_INT_LPMIC_INT_LPWR_KEY_LHUB_USB1_nFALUTPHY_PMEBPHY_INTRECOVERY_SW_LOTP_OUTUSB_OTG_POWER_ENAP_WARM_RESET_HUSB_OTG_nFALUTI2C0_SDA_PMICI2C0_SCL_PMICDEVMODE_LUSB_INTw-gpio@ff780000rockchip,gpio-bankÿx ×RJA é ù à Øgpio@ff790000rockchip,gpio-bankÿy ×SJB é ù à Øi CONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_LBL_PWR_ENTOUCH_INTTOUCH_RSTI2C3_SCL_TPI2C3_SDA_TPw(gpio@ff7a0000rockchip,gpio-bankÿz ×TJC é ù à ØÛ FLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7VCC5V_GOOD_HFLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOPHY_TXD2PHY_TXD3MAC_RXD2MAC_RXD3PHY_TXD0PHY_TXD1MAC_RXD0MAC_RXD1gpio@ff7b0000rockchip,gpio-bankÿ{ ×UJD é ù à Øþ MAC_MDCMAC_RXDVMAC_RXERMAC_CLKPHY_TXENMAC_MDIOMAC_RXCLKPHY_RSTPHY_TXCLKUART0_RXDUART0_TXDUART0_CTS_LUART0_RTS_LSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEwgpio@ff7c0000rockchip,gpio-bankÿ| ×VJE é ù à ؅ USB_OTG_CTL1HUB_USB2_CTL1HUB_USB2_PWR_ENHUB_USB_ILIM_SELUSB_OTG_STATUS_LHUB_USB1_CTL1HUB_USB1_PWR_ENVCC50_HDMI_ENwœgpio@ff7d0000rockchip,gpio-bankÿ} ×WJF é ù à ؒ I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETHUB_USB2_nFALUTUSB_OTG_ILIM_SELwPgpio@ff7e0000rockchip,gpio-bankÿ~ ×XJG é ù à ؽ LCD_BL_PWMPWM_LOGBL_ENPWR_LED1TPM_INT_HSPK_ONAP_FLASH_WP_LCPU_NMIDVSOKEDP_HPDDVS1LCD_ENDVS2HDMI_CECI2C4_SDAI2C4_SCLI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXDwMgpio@ff7f0000rockchip,gpio-bankÿ ×YJH é ù à Ø^ RAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 �hdmi-cec-c7 �hdmi-ddc ��w~hdmi-ddc-unwedge ��wvcc50-hdmi-en �w�pcfg-output-low #w�pcfg-pull-up .w‘pcfg-pull-down ;w’pcfg-pull-none Jw�pcfg-pull-none-12ma J W w•suspendglobal-pwroff �wˆddrio-pwroff �w‡ddr0-retention ‘w†ddr1-retention ‘edpedp-hpd  ’wzi2c0i2c0-xfer ��wIi2c1i2c1-xfer ��w&i2c2i2c2-xfer  � �wOi2c3i2c3-xfer ��w'i2c4i2c4-xfer ��w,i2c5i2c5-xfer ��w/i2s0i2s0-bus` ������whlcdclcdc-ctl@ ����wvsdmmcsdmmc-clk �sdmmc-cmd ‘sdmmc-cd ‘sdmmc-bus1 ‘sdmmc-bus4@ ‘‘‘‘sdio0sdio0-bus1 ‘sdio0-bus4@ ““““wsdio0-cmd “wsdio0-clk “wsdio0-cd ‘sdio0-wp ‘sdio0-pwr ‘sdio0-bkpwr ‘sdio0-int ‘wifienable-h �wšbt-enable-l �bt-host-wake ’bt-host-wake-l �wbt-dev-wake-sleep �w�bt-dev-wake-awake ”w‹bt-dev-wake �sdio1sdio1-bus1 ‘sdio1-bus4@ ‘‘‘‘sdio1-cd ‘sdio1-wp ‘sdio1-bkpwr ‘sdio1-int ‘sdio1-cmd ‘sdio1-clk �sdio1-pwr  ‘emmcemmc-clk “wemmc-cmd “wemmc-pwr  ‘emmc-bus1 ‘emmc-bus4@ ‘‘‘‘emmc-bus8€ ““““““““wemmc-reset  �w˜spi0spi0-clk  ‘wspi0-cs0  ‘wspi0-tx ‘wspi0-rx ‘wspi0-cs1 ‘spi1spi1-clk  ‘wspi1-cs0  ‘w!spi1-rx ‘w spi1-tx ‘wspi2spi2-cs1 ‘spi2-clk ‘w"spi2-cs0 ‘w%spi2-rx ‘w$spi2-tx  ‘w#uart0uart0-xfer ‘�w0uart0-cts ‘w1uart0-rts �w2uart1uart1-xfer ‘ �w3uart1-cts  ‘uart1-rts  �uart2uart2-xfer ‘�w4uart3uart3-xfer ‘�w5uart3-cts  ‘uart3-rts  �uart4uart4-xfer ‘�w6uart4-cts  ‘uart4-rts  �tsadcotp-pin  �w<otp-out  �w=pwm0pwm0-pin �wRpwm1pwm1-pin �wSpwm2pwm2-pin �wTpwm3pwm3-pin �wUgmacrgmii-pinsð ����••••��� ••��wBrmii-pins  ����������phy-rst ”wCphy-pmeb ‘wDphy-int ‘wEspdifspdif-tx  �wgpcfg-pull-none-drv-8ma J Ww“pcfg-pull-up-drv-8ma . Wpcfg-output-high fw”buttonspwr-key-l ‘w–pmicpmic-int-l ‘wJdvs-1  ’wKdvs-2 ’wLrebootap-warm-reset-h  �w—recovery-switchrec-mode-l  ‘tpmtpm-int-h �write-protectfw-wp-ap �codechp-det ‘w int-codec ’wQmic-det  ‘wŸheadsetts3a227e-int-l ‘w.buck-5vdrv-5v �w›ledspwr-led1-on �wŒpwr-led1-blink ”wŽusb-bc12usb-otg-ilim-sel �w‰usb-usb-ilim-sel �wŠusb-hosthub_usb1_pwr_en �w¥hub_usb2_pwr_en �w¦usb_otg_pwr_en  �w§backlightbl_pwr_en  �w¨bl-en �w«lcdlcd-en �wªtouchscreentouch-int �w)touch-rst �w*chosen rserial2:115200n8memorymemory€power-button gpio-keys·defaultÅ–key-power ~Power  - „t �d-gpio-restart gpio-restart  - ·defaultÅ— ¡Èemmc-pwrseqmmc-pwrseq-emmcŘ·default ( wsdio-pwrseqmmc-pwrseq-simpleJ™ "ext_clock·defaultÅš w regulator-vcc-5vregulator-fixedgvcc_5vvŠœLK@´LK@ ª ùM·defaultÅ›wNregulator-vcc33-sysregulator-fixed gvcc33_sysvŠœ2Z ´2Z wregulator-vcc50-hdmiregulator-fixed gvcc50_hdmivŠ ½N ª ùœ·defaultÅ�regulator-vdd-logicpwm-regulator gvdd_logic ÈžÊ Í Ø{ ì”vŠœ~ð´™pÌ sound!rockchip,rockchip-audio-max98090·defaultÅŸ  ÿVEYRON-I2S ¡ &¢ ;P QP  h£ ¤regulator-vccsysregulator-fixedgvccsysŠvw©regulator-vcc33-ioregulator-fixedvŠ gvcc33_iow+regulator-vcc5-host1regulator-fixed ª ùœ·defaultÅ¥ gvcc5_host1vŠregulator-vcc5-host2regulator-fixed ª ùœ·defaultŦ gvcc5_host2vŠregulator-vcc5v-otgregulator-fixed ª ù- ·defaultŧ gvcc5_otgvŠexternal-gmac-clock fixed-clockÚ·sY@ Çext_gmacw?regulator-backlightregulator-fixed ª ù( ·defaultŨgbacklight_regulator ½© “:˜w­regulator-panelregulator-fixed ª ùM·defaultŪgpanel_regulator ½w®backlightpwm-backlight ¤ÿ ¶ü Í€ æM·defaultÅ« ȬB@ ó    ­w¯panelauo,b101ean01Yokay ® &¯panel-timing·ù@« 0 8 E Q  [  c p |portsportendpoint §°w} #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymarvell,wakeup-pincap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreset-gpiosvcc33-supplyvccio-supplywakeup-sourceti,micbiasreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-modephy-supplyrx_delaytx_delaysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityenable-active-highvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenvactivevfront-porchvback-porchvsync-len