Ð þí¨Î8ž€( NžH@phytec,rk3288-pcm-947phytec,rk3288-phycore-somrockchip,rk3288&7Phytec RK3288 PCM-947aliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000‚/i2c@ff140000‡/i2c@ff660000Œ/i2c@ff150000‘/i2c@ff160000–/i2c@ff170000›/serial@ff180000£/serial@ff190000«/serial@ff690000³/serial@ff1b0000»/serial@ff1c0000Ã/spi@ff110000È/spi@ff120000Í/spi@ff130000Ò/i2c@ff140000/rtc@68×/i2c@ff650000/pmic@1carm-pmuarm,cortex-a12-pmu0Ü—˜™šçcpusúrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!%,@OVrpcpu@501cpuarm,cortex-a12!%,@OVrpcpu@502cpuarm,cortex-a12!%,@OVrpcpu@503cpuarm,cortex-a12!%,@OVrpopp-table-0operating-points-v2xpopp-126000000ƒ‚›€Š » ˜œ@opp-216000000ƒ ߿Р» opp-312000000ƒ˜¾Š » opp-408000000ƒQ–Š » opp-600000000ƒ#ÃFŠ » opp-696000000ƒ)|Š~ðopp-816000000ƒ0£,ŠB@opp-1008000000ƒ<ÜŠ�opp-1200000000ƒG†ŒŠÈàopp-1416000000ƒTfrŠO€opp-1512000000ƒZJŠÖ opp-1608000000ƒ_Ø"Š™preserved-memory©dma-unusable@fe000000!þoscillator fixed-clock°n6Àxin24mÓp timerarm,armv7-timerà0Ü   °n6timer@ff810000rockchip,rk3288-timer!ÿ�  ÜH Oa  pclktimerdisplay-subsystemrockchip,display-subsystem' mmc@ff0c0000rockchip,rk3288-dw-mshc-ðÑ€ OÈDrvbiuciuciu-driveciu-sample; Ü !ÿ @%€FresetRokayYcu†È˜£default± »ÈÕâðümmc@ff0d0000rockchip,rk3288-dw-mshc-ðÑ€ OÉEswbiuciuciu-driveciu-sample; Ü!!ÿ @%�Freset Rdisabledmmc@ff0e0000rockchip,rk3288-dw-mshc-ðÑ€ OÊFtxbiuciuciu-driveciu-sample; Ü"!ÿ@%‚Freset Rdisabledmmc@ff0f0000rockchip,rk3288-dw-mshc-ðÑ€ OËGuybiuciuciu-driveciu-sample; Ü#!ÿ@%ƒFresetRokayYc˜ £default±ðüsaradc@ff100000rockchip,saradc!ÿ Ü$OI[saradcapb_pclk%W Fsaradc-apbRokay)spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spiOARspiclkapb_pclk5  :txrx Ü,£default±!ÿ Rdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spiOBSspiclkapb_pclk5 :txrx Ü-£default± !!ÿ Rdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spiOCTspiclkapb_pclk5:txrx Ü.£default±"#$%!ÿRokayflash@0 micron,n25q128a13jedec,spi-nor!Dúð€VRokayi2c@ff140000rockchip,rk3288-i2c!ÿ Ü>i2cOM£default±&Rokaytouchscreen@44 st,stmpe811!Dadc@64maxim,max1037!drtc@68rv4162!h£default±'&(Ü i2c@ff150000rockchip,rk3288-i2c!ÿ Ü?i2cOO£default±)Rokayeeprom@51 atmel,24c32!Qe i2c@ff160000rockchip,rk3288-i2c!ÿ Ü@i2cOP£default±*Rokayleddimmer@62 nxp,pca9533!bled1 nred:user1tnoneled2 ngreen:user2tnoneled3 nblue:user3tnoneled4 nred:user4tnonei2c@ff170000rockchip,rk3288-i2c!ÿ ÜAi2cOQ£default±+Rokayptserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart!ÿ Ü7Š”OMUbaudclkapb_pclk5:txrx£default ±,-.Rokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart!ÿ Ü8Š”ONVbaudclkapb_pclk5:txrx£default±/ Rdisabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart!ÿi Ü9Š”OOWbaudclkapb_pclk£default±0Rokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart!ÿ Ü:Š”OPXbaudclkapb_pclk5:txrx£default±1 Rdisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart!ÿ Ü;Š”OQYbaudclkapb_pclk5  :txrx£default±2 Rdisableddma-controller@ff250000arm,pl330arm,primecell!ÿ%@Ü¡¬ÇO apb_pclkpthermal-zonesreserve-thermalÞèôˆ3cpu-thermalÞdôˆ3tripscpu_alert0pÐpassivep4cpu_alert1$øÐpassivep5cpu_crit_�Ð criticalcooling-mapsmap0)40.ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1)50.ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermalÞdôˆ3tripsgpu_alert0pÐpassivep6gpu_crit_�Ð criticalcooling-mapsmap0)6 .7ÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadc!ÿ( Ü%OHZtsadcapb_pclk%Ÿ Ftsadc-apb£initdefaultsleep±8=9G8Qg:tsRokay‹¢p3ethernet@ff290000rockchip,rk3288-gmac!ÿ)ܽmacirqeth_wake_irqg:8O—fgc˜Ä]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac%B FstmmacethRokayÍ—Ý;ôinput£default ±<=>? @ rgmii-id  6'B@ KA[dmdio0snps,dwmac-mdioethernet-phy@0ethernet-phy-ieee802.3-c22!&AÜm‚—¥»p?usb@ff500000 generic-ehci!ÿP ÜOÂÍBÒusbRokayusb@ff520000 generic-ohci!ÿR Ü)OÂÍBÒusb Rdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2!ÿT ÜOÃotgÜhostÍC Òusb2-phyäRokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2!ÿX ÜOÁotgÜotgû €€@@ ÍD Òusb2-phyRokayusb@ff5c0000 generic-ehci!ÿ\ ÜOÄ Rdisableddma-controller@ff600000arm,pl330arm,primecell!ÿ`@Ü¡¬ÇOÁ apb_pclk Rdisabledi2c@ff650000rockchip,rk3288-i2c!ÿe Ü<i2cOL£default±ERokay°€pmic@1crockchip,rk818!&FÜ£default±G+LÓZHfHrH~HŠI—H£J¯J»ÇregulatorsDCDC_REG1Ôvdd_logã÷ Èà!Èàregulator-state-mem9DCDC_REG2Ôvdd_gpuã÷ 5!Ðregulator-state-memRjB@DCDC_REG3Ôvcc_ddrã÷regulator-state-memRDCDC_REG4 Ôvdd_3v3_ioã÷ 2Z !2Z pregulator-state-memRj2Z DCDC_BOOSTÔvdd_sysã÷ LK@!LK@pHregulator-state-memRjLK@SWITCH_REGÔvdd_sdã÷pregulator-state-mem9LDO_REG2 Ôvdd_eth_2v5ã÷ &% !&% p@regulator-state-memRj&% LDO_REG3Ôvdd_1v0ã÷ B@!B@regulator-state-memRjB@LDO_REG4Ôvdd_1v8_lcd_ldoã÷ w@!w@regulator-state-memRjw@LDO_REG6 Ôvdd_1v0_lcdã÷ B@!B@regulator-state-memRjB@LDO_REG7 Ôvdd_1v8_ldoã÷ w@!w@pregulator-state-mem9jw@LDO_REG9 Ôvdd_io_sdã÷ w@!2Z pregulator-state-mem9eeprom@50 atmel,24c32!Pe regulator@60 fcs,fan53555!`†ã÷£,Ôvdd_cpu 5!Ñð¿@ÔHi2c@ff660000rockchip,rk3288-i2c!ÿf Ü=i2cON£default±K Rdisabledpwm@ff680000rockchip,rk3288-pwm!ÿhߣdefault±LO_ Rdisabledpwm@ff680010rockchip,rk3288-pwm!ÿhߣdefault±MO_Rokaypwm@ff680020rockchip,rk3288-pwm!ÿh ߣdefault±NO_ Rdisabledpwm@ff680030rockchip,rk3288-pwm!ÿh0ߣdefault±OO_ Rdisabledsram@ff700000 mmio-sram!ÿp€©ÿp€smp-sram@0rockchip,rk3066-smp-sram!sram@ff720000#rockchip,rk3288-pmu-srammmio-sram!ÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd!ÿsppower-controller!rockchip,rk3288-power-controllerêpapower-domain@9! ÈOÊÍÈÌÅÆ¾¿ÔÕÖÙÑÒchgfdehilkj$þPQRSTUVWXêpower-domain@11! OÏopþYZêpower-domain@12! OÐÜþ[êpower-domain@13! OÀþ\]êreboot-modesyscon-reboot-mode” RBÃRBÃ&RBà 6RBÃsyscon@ff740000rockchip,rk3288-sgrfsyscon!ÿtclock-controller@ff760000rockchip,rk3288-cru!ÿvO xin24mg:ÓBHÍÑÝjÒÞk$O#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀpsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd!ÿwp:edp-phyrockchip,rk3288-dp-phyOh24md Rdisabledpqio-domains"rockchip,rk3288-io-voltage-domainRokayo}‹J™©·ÁÌØäusbphyrockchip,rk3288-usb-phyRokayusb-phy@320d! O]phyclkÓ%… Fphy-resetpDusb-phy@334d!4O^phyclkÓ%ˆ Fphy-resetpBusb-phy@348d!HO_phyclkÓ%‹ Fphy-resetpCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt!ÿ€Op ÜORokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif!ÿ‹ñOTÐ mclkhclk5^:tx Ü6£default±_g: Rdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s!ÿ‰ñ Ü5ORÎi2s_clki2s_hclk5^^:txrx£default±`   Rdisabledcrypto@ff8a0000rockchip,rk3288-crypto!ÿŠ@ Ü0 OÇÍ}Áaclkhclksclkapb_pclk%® Fcrypto-rstiommu@ff900800rockchip,iommu!ÿ�@ ÜOÊÔ aclkiface 7 Rdisablediommu@ff914000rockchip,iommu !ÿ‘@ÿ‘P ÜOÍÕ aclkiface 7 D Rdisabledrga@ff920000rockchip,rk3288-rga!ÿ’€ ÜOÈÖjaclkhclksclk _a %ilm Fcoreaxiahbvop@ff930000rockchip,rk3288-vop !ÿ“œÿ“ ÜOžÑaclk_vopdclk_vophclk_vop _a %def Faxiahbdclk mbRokayportp endpoint@0! tcpuendpoint@1! tdprendpoint@2! teplendpoint@3! tfpoiommu@ff930300rockchip,iommu!ÿ“ ÜOÅÑ aclkiface _a  7Rokaypbvop@ff940000rockchip,rk3288-vop !ÿ”œÿ” ÜOÆ¿Òaclk_vopdclk_vophclk_vop _a %°±² Faxiahbdclk mgRokayportp endpoint@0! thpvendpoint@1! tipsendpoint@2! tjpmendpoint@3! tkppiommu@ff940300rockchip,iommu!ÿ” ÜOÆÒ aclkiface _a  7Rokaypgdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi!ÿ–@ ÜO~d refpclk _a g: Rdisabledportsport@0!endpoint@0! tlpeendpoint@1! tmpjport@1!lvds@ff96c000rockchip,rk3288-lvds!ÿ–À@Og pclk_lvds£lcdc±n _a g: Rdisabledportsport@0!endpoint@0! topfendpoint@1! tppkport@1!dp@ff970000rockchip,rk3288-dp!ÿ—@ ÜbÍhÝ OicdppclkÍqÒdp _a %oFdpg: Rdisabledportsport@0!endpoint@0! trpdendpoint@1! tspiport@1!hdmi@ff980000rockchip,rk3288-dw-hdmi!ÿ˜” ÜgOhmniahbisfrcec _a g:ñRokay „tportsport@0!endpoint@0! tupcendpoint@1! tvphport@1!video-codec@ff9a0000rockchip,rk3288-vpu!ÿšÜ   ½vepuvdpuOÐÜ aclkhclk mw _a iommu@ff9a0800rockchip,iommu!ÿš Ü OÐÜ aclkiface 7 _a pwvideo-codec@ff9c0000rockchip,rk3288-vdec!ÿœ@ Ü  OÏÛopaxiahbcabaccore ÍÏÛopOׄõáá£á£ mx _a iommu@ff9c0440rockchip,iommu !ÿœ@@ÿœ€@ ÜoOÏÛ aclkiface 7 _a pxgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760!ÿ£$Ü ½jobmmugpuOÀ,y@ _a  Rdisabledp7opp-table-1operating-points-v2pyopp-100000000ƒõáŠ~ðopp-200000000ƒ ëŠ~ðopp-300000000ƒá£ŠB@opp-400000000ƒׄŠÈàopp-600000000ƒ#ÃFŠÐqos@ffaa0000rockchip,rk3288-qossyscon!ÿª p\qos@ffaa0080rockchip,rk3288-qossyscon!ÿª€ p]qos@ffad0000rockchip,rk3288-qossyscon!ÿ­ pQqos@ffad0100rockchip,rk3288-qossyscon!ÿ­ pRqos@ffad0180rockchip,rk3288-qossyscon!ÿ­€ pSqos@ffad0400rockchip,rk3288-qossyscon!ÿ­ pTqos@ffad0480rockchip,rk3288-qossyscon!ÿ­€ pUqos@ffad0500rockchip,rk3288-qossyscon!ÿ­ pPqos@ffad0800rockchip,rk3288-qossyscon!ÿ­ pVqos@ffad0880rockchip,rk3288-qossyscon!ÿ­€ pWqos@ffad0900rockchip,rk3288-qossyscon!ÿ­ pXqos@ffae0000rockchip,rk3288-qossyscon!ÿ® p[qos@ffaf0000rockchip,rk3288-qossyscon!ÿ¯ pYqos@ffaf0080rockchip,rk3288-qossyscon!ÿ¯€ pZdma-controller@ffb20000arm,pl330arm,primecell!ÿ²@Ü¡¬ÇOÁ apb_pclkp^efuse@ffb40000rockchip,rk3288-efuse!ÿ´ Oq pclk_efusecpu-id@7!cpu_leakage@17!interrupt-controller@ffc01000 arm,gic-400 � ¥@!ÿÀÿÀ ÿÀ@ ÿÀ`  Ü ppinctrlrockchip,rk3288-pinctrlg:©gpio@ff750000rockchip,gpio-bank!ÿu ÜQO@ ¶ Æ � ¥pFgpio@ff780000rockchip,gpio-bank!ÿx ÜROA ¶ Æ � ¥gpio@ff790000rockchip,gpio-bank!ÿy ÜSOB ¶ Æ � ¥p…gpio@ff7a0000rockchip,gpio-bank!ÿz ÜTOC ¶ Æ � ¥gpio@ff7b0000rockchip,gpio-bank!ÿ{ ÜUOD ¶ Æ � ¥pAgpio@ff7c0000rockchip,gpio-bank!ÿ| ÜVOE ¶ Æ � ¥p(gpio@ff7d0000rockchip,gpio-bank!ÿ} ÜWOF ¶ Æ � ¥gpio@ff7e0000rockchip,gpio-bank!ÿ~ ÜXOG ¶ Æ � ¥p‚gpio@ff7f0000rockchip,gpio-bank!ÿ ÜYOH ¶ Æ � ¥p„hdmihdmi-cec-c0 Òzhdmi-cec-c7 Òzhdmi-ddc Òzzhdmi-ddc-unwedge Ò{zpcfg-output-low àp{pcfg-pull-up ëp|pcfg-pull-down øp}pcfg-pull-none pzpcfg-pull-none-12ma   p~suspendglobal-pwroff Òzddrio-pwroff Òzddr0-retention Ò|ddr1-retention Ò|edpedp-hpd Ò }i2c0i2c0-xfer ÒzzpEi2c1i2c1-xfer Òzzp&i2c2i2c2-xfer Ò z zpKi2c3i2c3-xfer Òzzp)i2c4i2c4-xfer Òzzp*i2c5i2c5-xfer Òzzp+i2s0i2s0-bus` Òzzzzzzp`lcdclcdc-ctl@ Òzzzzpnsdmmcsdmmc-clk Ò~p sdmmc-cmd Òp sdmmc-cd Ò|psdmmc-bus1 Ò|sdmmc-bus4@ Òpsdmmc-pwr Ò zsdio0sdio0-bus1 Ò|sdio0-bus4@ Ò||||sdio0-cmd Ò|sdio0-clk Òzsdio0-cd Ò|sdio0-wp Ò|sdio0-pwr Ò|sdio0-bkpwr Ò|sdio0-int Ò|sdio1sdio1-bus1 Ò|sdio1-bus4@ Ò||||sdio1-cd Ò|sdio1-wp Ò|sdio1-bkpwr Ò|sdio1-int Ò|sdio1-cmd Ò|sdio1-clk Òzsdio1-pwr Ò |emmcemmc-clk Ò~pemmc-cmd Ò~pemmc-pwr Ò |pemmc-bus1 Ò|emmc-bus4@ Ò||||emmc-bus8€ Ò~~~~~~~~pspi0spi0-clk Ò |pspi0-cs0 Ò |pspi0-tx Ò|pspi0-rx Ò|pspi0-cs1 Ò|spi1spi1-clk Ò |pspi1-cs0 Ò |p!spi1-rx Ò|p spi1-tx Ò|pspi2spi2-cs1 Ò|spi2-clk Ò|p"spi2-cs0 Ò|p%spi2-rx Ò|p$spi2-tx Ò |p#uart0uart0-xfer Ò|zp,uart0-cts Ò|p-uart0-rts Òzp.uart1uart1-xfer Ò| zp/uart1-cts Ò |uart1-rts Ò zuart2uart2-xfer Ò|zp0uart3uart3-xfer Ò|zp1uart3-cts Ò |uart3-rts Ò zuart4uart4-xfer Ò|zp2uart4-cts Ò |uart4-rts Ò ztsadcotp-pin Ò zp8otp-out Ò zp9pwm0pwm0-pin ÒzpLpwm1pwm1-pin ÒzpMpwm2pwm2-pin ÒzpNpwm3pwm3-pin ÒzpOgmacrgmii-pinsð Òzzzz~~~~zzz ~~zzp<rmii-pins  Òzzzzzzzzzzphy-int Ò|p>phy-rst Ò€p=spdifspdif-tx Ò zp_pcfg-output-high #p€ledsuser-led-pin Ò€p�pmicpmic-int Ò|pGpmic-sleep Ò|pcfg-pull-up-drv-12ma ë  pbuttonsuser-button-pins Ò||pƒrv4162i2c-rtc-int Ò |p'touchscreents-irq-pin Òzusb_hosthost0-vbus-drv Ò zp†host1-vbus-drv Òzp‡usb_otgotg-vbus-drv Ò zpˆmemorymemory!external-gmac-clock fixed-clockÓ°sY@ Àext_gmacp;user-leds gpio-leds£default±�led-0 ngreen_led /‚ theartbeat 5keepregulator-vdd-emmc-ioregulator-fixed Ôvdd_emmc_io w@!w@Ôpregulator-vdd-in-otg-outregulator-fixedÔvdd_in_otg_outã÷ LK@!LK@pIregulator-vdd-misc-1v8regulator-fixed Ôvdd_misc_1v8ã÷ w@!w@pJuser-buttons gpio-keys£default±ƒbutton-0nhome Cf /„Lbutton-1nmenu C‹ /„Lregulator-usb-host0regulator-fixed V… £default±† Ôvcc_host0_5v LK@!LK@ãÔIregulator-usb-host1regulator-fixed V…£default±‡ Ôvcc_host1_5v LK@!LK@ãÔIregulator-usb-otgregulator-fixed V… £default±ˆ Ôvcc_otg_5v LK@!LK@ãÔI #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2rtc0rtc1interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesspi-max-frequencym25p,fast-readpagesizelabellinux,default-triggerreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayti,rx-internal-delayti,tx-internal-delayti,fifo-depthenet-phy-lane-no-swapti,clk-output-selphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyboost-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorregulator-enable-ramp-delayregulator-ramp-delayvin-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplyflash0-supplyflash1-supplygpio1830-supplygpio30-supplybb-supplydvp-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highgpiosdefault-statelinux,code