Ð þí]Ö8X4(¢Wü!,Rockchip RK3228 Evaluation board$2rockchip,rk3228-evbrockchip,rk3228aliases=/pinctrl/gpio@11110000C/pinctrl/gpio@11120000I/pinctrl/gpio@11130000O/pinctrl/gpio@11140000U/serial@11010000]/serial@11020000e/serial@11030000m/spi@11090000r/mmc@30020000cpuscpu@f00wcpu2arm,cortex-a7ƒ‡Ž¢±¸psciÆcpu@f01wcpu2arm,cortex-a7ƒ‡Ž¢¸psciÆcpu@f02wcpu2arm,cortex-a7ƒ‡Ž¢¸psciÆcpu@f03wcpu2arm,cortex-a7ƒ‡Ž¢¸psciÆopp-table-02operating-points-v2ÎÆopp-408000000ÙQ–à~ðîœ@ÿopp-600000000Ù#ÃFàà˜opp-816000000Ù0£,àB@opp-1008000000Ù<ÜàíØopp-1200000000ÙG†Œàtxarm-pmu2arm,cortex-a7-pmu0 LMNOpsci2arm,psci-1.0arm,psci-0.2¿smctimer2arm,armv7-timer)0    Mn6oscillator 2fixed-clockMn6]xin24mpÆ'display-subsystem2rockchip,display-subsystem}i2s1@100b0000(2rockchip,rk3228-i2srockchip,rk3066-i2sƒ @  ƒi2s_clki2s_hclk±Q»�  ”txrxždefault¬  ¶disabledi2s0@100c0000(2rockchip,rk3228-i2srockchip,rk3066-i2sƒ @  ƒi2s_clki2s_hclk±Pº� ”txrx ¶disabledspdif@100d00002rockchip,rk3228-spdifƒ   ±S½ ƒmclkhclk� ”txždefault¬  ¶disabledi2s2@100e0000(2rockchip,rk3228-i2srockchip,rk3066-i2sƒ@  ƒi2s_clki2s_hclk±R¼� ”txrx ¶disabledsyscon@11000000&2rockchip,rk3228-grfsysconsimple-mfdƒÆ(io-domains"2rockchip,rk3228-io-voltage-domain ¶disabledpower-controller!2rockchip,rk3228-power-controller½Æ.power-domain@4ƒ8±ÎˆÌÔÍÓ‡Ñ ½power-domain@5ƒ±Ó¾Äѽpower-domain@6ƒ±ÊÐѽpower-domain@7ƒ ±ËÑ…†Ñ½power-domain@8ƒ±Õѽusb2phy@7602rockchip,rk3228-usb2phyƒ` ±Žƒphyclk ]usb480m_phy0p ¶disabledÆBotg-port$ ;<=Øotg-bvalidotg-idlinestateè ¶disabledÆAhost-port  > Ølinestateè ¶disabledÆCusb2phy@8002rockchip,rk3228-usb2phyƒ ±�ƒphyclk ]usb480m_phy1p ¶disabledÆDotg-port  D Ølinestateè ¶disabledÆEhost-port  E Ølinestateè ¶disabledÆFserial@110100002snps,dw-apb-uartƒ  7Mn6±MUƒbaudclkapb_pclkždefault ¬óý ¶disabledserial@110200002snps,dw-apb-uartƒ  8Mn6±NVƒbaudclkapb_pclkždefault¬óý ¶disabledserial@110300002snps,dw-apb-uartƒ  9Mn6±OWƒbaudclkapb_pclkždefault¬óý¶okayefuse@110400002rockchip,rk3228-efuseƒ ±G ƒpclk_efuseid@7ƒcpu_leakage@17ƒi2c@110500002rockchip,rk3228-i2cƒ  $ƒi2c±Lždefault¬ ¶disabledi2c@110600002rockchip,rk3228-i2cƒ  %ƒi2c±Mždefault¬ ¶disabledi2c@110700002rockchip,rk3228-i2cƒ  &ƒi2c±Nždefault¬ ¶disabledi2c@110800002rockchip,rk3228-i2cƒ  'ƒi2c±Oždefault¬ ¶disabledspi@110900002rockchip,rk3228-spiƒ   1±ARƒspiclkapb_pclkždefault¬ !" ¶disabledwatchdog@110a0000 2rockchip,rk3228-wdtsnps,dw-wdtƒ   (±b ¶disabledpwm@110b00002rockchip,rk3288-pwmƒ  ±^ždefault¬# ¶disabledpwm@110b00102rockchip,rk3288-pwmƒ  ±^ždefault¬$ ¶disabledpwm@110b00202rockchip,rk3288-pwmƒ  ±^ždefault¬% ¶disabledpwm@110b00302rockchip,rk3288-pwmƒ 0 ±^ždefault¬& ¶disabledtimer@110c0000,2rockchip,rk3228-timerrockchip,rk3288-timerƒ   + ±a' ƒpclktimerclock-controller@110e00002rockchip,rk3228-cruƒ±'ƒxin24m(p"H/ÒÞkÃÌb$?#g¸€0£,ÍeðÑ€ðÑ€xhÀðÑ€ðÑ€xhÀÆdma-controller@110f00002arm,pl330arm,primecellƒ@ T_±Â ƒapb_pclkÆ thermal-zonescpu-thermalvdŒˆš)tripscpu_alert0ªp¶Ð~passiveÆ*cpu_alert1ª$ø¶Ð~passiveÆ+cpu_critª_�¶Ð ~criticalcooling-mapsmap0Á*0Æÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1Á+0Æÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@111500002rockchip,rk3228-tsadcƒ  :±HXƒtsadcapb_pclk/H?€‡W Õtsadc-apbžinitdefaultsleep¬,á-ë,õ s¶okay"9Æ)hdmi-phy@120300002rockchip,rk3228-hdmi-phyƒ±m'¿ƒsysclkrefoclkrefpclkp ]hdmiphy_phyè ¶disabledÆ3gpu@20000000"2rockchip,rk3228-maliarm,mali-400ƒ H Øgpgpmmupp0ppmmu0pp1ppmmu1±ÕÕ ƒbuscoreT.‡~ ¶disabledvideo-codec@20020000(2rockchip,rk3228-vpurockchip,rk3399-vpuƒ    Øvepuvdpu±ÊÐ ƒaclkhclkb/T.iommu@200208002rockchip,iommuƒ   ±ÊÐ ƒaclkifaceT.iÆ/video-codec@20030000*2rockchip,rk3228-vdecrockchip,rk3399-vdecƒ €   ±ËÑ…†ƒaxiahbcabaccore/…†?á£á£b0T.iommu@200304802rockchip,iommuƒ €@ À@  ±ËÑ ƒaclkifaceT.iÆ0vop@200500002rockchip,rk3228-vopƒ ü  ±Ó¾Äƒaclk_vopdclk_vophclk_vop‡def Õaxiahbdclkb1T. ¶disabledportÆendpoint@0ƒv2Æ7iommu@20053f002rockchip,iommuƒ ? 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