Ð þíkÏ8e|(SeD(,chipspark,rayeager-px2rockchip,rk3066a 7Rayeager PX2aliases=/ethernet@10204000G/pinctrl/gpio@20034000M/pinctrl/gpio@2003c000S/pinctrl/gpio@2003e000Y/pinctrl/gpio@20080000_/i2c@2002d000d/i2c@2002f000i/i2c@20056000n/i2c@2005a000s/i2c@2005e000x/serial@10124000€/serial@10126000ˆ/serial@20064000�/serial@20068000˜/spi@20070000�/spi@20074000¢/pinctrl/gpio@20084000¨/pinctrl/gpio@2000a000®/mmc@10214000³/mmc@10218000¸/mmc@1021c000oscillator ,fixed-clock½n6ÍÚxin24míWgpu@10090000",rockchip,rk3066-maliarm,mali-400õ ùÅÅ buscore Åõá1x 8disabledx?5Jgpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3Zvideo-codec@10104000,rockchip,rk3066-vpuõ@?   Jvepuvdpu ùÎØÍ×(aclk_vdpuhclk_vdpuaclk_vepuhclk_vepuZcache-controller@10138000,arm,pl310-cacheõ€hvíHscu@1013c000,arm,cortex-a9-scuõÀglobal-timer@1013c200,arm,cortex-a9-global-timerõ  ? ù 8disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerõÆ  ? ùinterrupt-controller@1013d000,arm,cortex-a9-gic‚—õÐÁíserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uartõ@ ?"¨²baudclkapb_pclkù@L8okay¿ÄtxrxÎdefault Üserial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uartõ` ?#¨²baudclkapb_pclkùAM 8disabled¿ÄtxrxÎdefaultÜqos@1012d000,rockchip,rk3066-qossysconõÐ í)qos@1012e000,rockchip,rk3066-qossysconõà í(qos@1012f000,rockchip,rk3066-qossysconõð í"qos@1012f080,rockchip,rk3066-qossysconõð€ í$qos@1012f100,rockchip,rk3066-qossysconõñ í&qos@1012f180,rockchip,rk3066-qossysconõñ€ í#qos@1012f200,rockchip,rk3066-qossysconõò í%qos@1012f280,rockchip,rk3066-qossysconõò€ í'usb@10180000,rockchip,rk3066-usbsnps,dwc2õ ?ùÃotgæotg@@   #usb2-phy8okayusb@101c0000 ,snps,dwc2õ ?ùÉotgæhost  #usb2-phy8okayÎdefaultÜ ethernet@10204000,rockchip,rk3066-emacõ @< ?ùÄD hclkmacref-d7rmii@ 8okayMQÎdefault Ümdioethernet-phy@0õ \ímmc@10214000,rockchip,rk2928-dw-mshcõ!@ ?ùÀHbiuciu¿Ärx-txh1Qsreset8okay½úð€úð€ÎdefaultÜ�—¢®Àmmc@10218000,rockchip,rk2928-dw-mshcõ!€ ?ùÁIbiuciu¿Ärx-txh1Rsreset8okayÎdefault Ü�Ñ¢mmc@1021c000,rockchip,rk2928-dw-mshcõ!À ?ùÂJbiuciu¿Ärx-txh1Ssreset8okay�®ÑÎdefault Ü ¢!ß!nand-controller@10500000,rockchip,rk2928-nfcõP@ ?ùÓahb 8disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdõ @reboot-mode,syscon-reboot-modeì@óRBÃÿRBà RBà RBÃpower-controller!,rockchip,rk3066-power-controller)ípower-domain@7õˆùÃľ¿ÍÎPÇÖOÊÐÙÈÑÉÒ="#$%&')power-domain@6õ ùÎÍØ×=()power-domain@8õùÅ=))grf@20008000&,rockchip,rk3066-grfsysconsimple-mfdõ €í usbphy,rockchip,rk3066a-usb-phy8okayusb-phy@17cõ|ùQphyclkÍDí usb-phy@188õˆùRphyclkÍDí dma-controller@20018000,arm,pl330arm,primecellõ €@?OZuùÀ apb_pclkídma-controller@2001c000,arm,pl330arm,primecellõ À@?OZuùÀ apb_pclk 8disabledi2c@2002d000,rockchip,rk3066-i2cõ Ð ?(@ i2cùP8okayÎdefaultÜ*½€ak8963@d,asahi-kasei,ak8975õ +?ÎdefaultÜ,mma8452@1d ,fsl,mma8452õ+?ÎdefaultÜ-i2c@2002f000,rockchip,rk3066-i2cõ ð ?)@ ùQi2c8okayÎdefaultÜ.½€tps@2d ,ti,tps65910õ-Œœ/?‚—ÎdefaultÜ01¨2´2À2Ì2Ø3ä3ð2ü2regulatorsvrtc vcc_rtcvio vcc_io,2Z D2Z í3vdd1 vdd_arm, 'ÀDã`\íIvdd2 vcc_ddr, 'ÀDã`\vdig1 vcc18,w@Dw@vdig2 vdd_11,ÈàDÈàvpll vcc_25,&% D&% í?vdac  vccio_wl,w@Dw@ívaux1  vcc25_hdmi,&% D&% vaux2 vcca_33,2Z D2Z vaux33  vcc_rmii,2Z D2Z ívmmc  vcc28_cif,*¹€D*¹€pwm@20030000,rockchip,rk2928-pwmõ nùF 8disabledÎdefaultÜ4pwm@20030010,rockchip,rk2928-pwmõ nùF8okayÎdefaultÜ5watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdtõ ÀùK ?38okaypwm@20050020,rockchip,rk2928-pwmõ  nùG8okayÎdefaultÜ6pwm@20050030,rockchip,rk2928-pwmõ 0nùG8okayÎdefaultÜ7í]i2c@20056000,rockchip,rk3066-i2cõ ` ?*@ ùRi2c8okayÎdefaultÜ8i2c@2005a000,rockchip,rk3066-i2cõ   ?+@ ùSi2c8okayÎdefaultÜ9i2c@2005e000,rockchip,rk3066-i2cõ à ?4@ ùTi2c8okayÎdefaultÜ:serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uartõ @ ?$¨²baudclkapb_pclkùBN8okay¿ÄtxrxÎdefaultÜ;serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uartõ € ?%¨²baudclkapb_pclkùCO8okay¿ ÄtxrxÎdefault Ü<=>saradc@2006c000,rockchip,saradcõ À ?yùGJsaradcapb_pclk1W ssaradc-apb8okay‹?spi@20070000,rockchip,rk3066-spiùEHspiclkapb_pclk ?&õ ¿  Ätxrx8okayÎdefaultÜ@ABCspi@20074000,rockchip,rk3066-spiùFIspiclkapb_pclk ?'õ @¿  Ätxrx 8disabledÎdefaultÜDEFGdma-controller@20078000,arm,pl330arm,primecellõ €@?OZuùÁ apb_pclkícpus—rockchip,rk3066-smpcpu@0¥cpu,arm,cortex-a9±Hõ8›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8Óœ@ùáIcpu@1¥cpu,arm,cortex-a9±HõáIdisplay-subsystem,rockchip,display-subsystemìJKhdmi-sound,simple-audio-cardòHDMI i2s" 8disabledsimple-audio-card,codec<Lsimple-audio-card,cpu<Msram@10080000 ,mmio-sramõ Fsmp-sram@0,rockchip,rk3066-smp-sramõPvop@1010c000,rockchip,rk3066-vopõÀœ ? ùþÍaclk_vopdclk_vophclk_vopZ1def saxiahbdclk 8disabledportíJendpoint@0õMNíRvop@1010e000,rockchip,rk3066-vopõàœ ?ùÄ¿Îaclk_vopdclk_vophclk_vopZ1ghi saxiahbdclk 8disabledportíKendpoint@0õMOíShdmi@10116000,rockchip,rk3066-hdmiõ`  ?@ùÙhclkÎdefaultÜPQZ@ ] 8disabledíLportsport@0õendpoint@0õMRíNendpoint@1õMSíOport@1õi2s@10118000,rockchip,rk3066-i2sõ€  ?ÎdefaultÜTùKÆi2s_clki2s_hclk¿Ätxrxn‰] 8disabledíMi2s@1011a000,rockchip,rk3066-i2sõ   ? ÎdefaultÜUùLÇi2s_clki2s_hclk¿Ätxrxn‰] 8disabledi2s@1011c000,rockchip,rk3066-i2sõÀ  ?ÎdefaultÜVùMÈi2s_clki2s_hclk¿  Ätxrxn‰] 8disabledclock-controller@20000000,rockchip,rk3066a-cruõ ùWxin24m@ Í£@ ËÔ^ÌÕ_ ׄ#g¸€á£ðÑ€xhÀá£ðÑ€xhÀítimer@2000e000,snps,dw-apb-timerõ à ?.ùVD timerpclkefuse@20010000,rockchip,rk3066a-efuseõ @ù[ pclk_efusecpu_leakage@17õtimer@20038000,snps,dw-apb-timerõ € ?,ùTB timerpclktimer@2003a000,snps,dw-apb-timerõ   ?-ùUC timerpclktsadc@20060000,rockchip,rk3066-tsadcõ ù]]saradcapb_pclk ?y1\ ssaradc-apb 8disabledpinctrl,rockchip,rk3066a-pinctrl@ Fgpio@20034000,rockchip,gpio-bankõ @ ?6ùUŒœ‚—íbgpio@2003c000,rockchip,gpio-bankõ À ?7ùVŒœ‚—ígpio@2003e000,rockchip,gpio-bankõ à ?8ùWŒœ‚—gpio@20080000,rockchip,gpio-bankõ  ?9ùXŒœ‚—í`gpio@20084000,rockchip,gpio-bankõ @ ?:ùYŒœ‚—í+gpio@2000a000,rockchip,gpio-bankõ   ?<ùZŒœ‚—í/pcfg-pull-default°íZpcfg-pull-noneÆíXemacemac-xfer€ÓXXXXXXXXíemac-mdio ÓXXírmii-rstÓYíemmcemmc-clkÓZíemmc-cmdÓ Zíemmc-rstÓ Zí hdmihdmi-hpdÓZíQhdmii2c-xfer ÓXXíPi2c0i2c0-xfer ÓXXí*i2c1i2c1-xfer ÓXXí.i2c2i2c2-xfer ÓXXí8i2c3i2c3-xfer ÓXXí9i2c4i2c4-xfer ÓXXí:pwm0pwm0-outÓXí4pwm1pwm1-outÓXí5pwm2pwm2-outÓXí6pwm3pwm3-outÓXí7spi0spi0-clkÓZí@spi0-cs0ÓZíCspi0-txÓZíAspi0-rxÓZíBspi0-cs1ÓZspi1spi1-clkÓZíDspi1-cs0ÓZíGspi1-rxÓZíFspi1-txÓZíEspi1-cs1ÓZuart0uart0-xfer ÓZZíuart0-ctsÓZíuart0-rtsÓZíuart1uart1-xfer ÓZZíuart1-ctsÓZuart1-rtsÓZuart2uart2-xfer ÓZ Zí;uart3uart3-xfer ÓZZí<uart3-ctsÓZí=uart3-rtsÓZí>sd0sd0-clkÓZísd0-cmdÓ Zísd0-cdÓZísd0-wpÓZsd0-bus-width1Ó Zsd0-bus-width4@Ó Z Z Z Zísd1sd1-clkÓZísd1-cmdÓZísd1-cdÓZsd1-wpÓZsd1-bus-width1ÓZsd1-bus-width4@ÓZZZZíi2s0i2s0-bus�ÓZZ Z Z Z Z ZZZíTi2s1i2s1-bus`ÓZZZZZZíUi2s2i2s2-bus`ÓZZZZZZíVpcfg-output-higháíYak8963comp-intÓZí,irir-intÓZí[keyspwr-keyÓZí\mma8452gsensor-intÓZí-mmcsdmmc-pwrÓZíausb_hosthost-drvÓZíchub-rstÓYí sata-pwrÓZí^sata-resetÓ Yí usb_otgotg-drvÓZídtpspmic-intÓZí0pwr-holdÓYí1memory@60000000¥memoryõ`@ir-receiver,gpio-ir-receiver b/ÎdefaultÜ[gpio-keys ,gpio-keyskey-powerí b/ ûGPIO PowertÎdefaultÜ\regulator-vdd-log,pwm-regulator  ]è vdd_log,O€DO€B@dO€*8okayregulator-vsys,regulator-fixed vsys,LK@DLK@\í2regulator-stdby,regulator-fixed  5v_stdby,LK@DLK@\í_regulator-emmc,regulator-fixed  emmc_vccq,-ÆÀD-ÆÀ2í!regulator-sata,regulator-fixed* =+ÎdefaultÜ^ usb_5v,LK@DLK@_regulator-sdmmc,regulator-fixed =`ÎdefaultÜa vcc_sd,2Z D2Z B† 3íregulator-usb-host,regulator-fixed* =bÎdefaultÜc  host-pwr,LK@DLK@_regulator-usb-otg,regulator-fixed* =bÎdefaultÜd vcc_otg,LK@DLK@_ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0gpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1gpio4gpio6mmc0mmc1mmc2clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesmax-speedphy-moderockchip,grfphyphy-supplyreset-gpiosfifo-depthreset-namesmax-frequencybus-widthdisable-wpvmmc-supplycap-mmc-highspeedcap-sd-highspeednon-removablevqmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstgpio-controller#gpio-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-dairangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsbias-pull-pin-defaultbias-disablerockchip,pinsoutput-highwakeup-sourcelabellinux,codepwmsvoltage-tablevin-supplyenable-active-highgpiostartup-delay-us