Ð þí[8Mì( +M´ ti,am5728-idkti,am5728ti,dra7&7TI AM5728 IDKchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?X/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0Bb/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Bj/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0B‚/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0BŠ/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0B’/ocp/interconnect@48400000/segment@0/target-module@20000/serial@0Bš/ocp/interconnect@48400000/segment@0/target-module@22000/serial@0B¢/ocp/interconnect@48400000/segment@0/target-module@24000/serial@0Eª/ocp/interconnect@4ae00000/segment@20000/target-module@b000/serial@0X²/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@1X¼/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@2BÆ/ocp/interconnect@4ae00000/segment@30000/target-module@c000/can@0?Í/ocp/interconnect@48400000/segment@0/target-module@80000/can@0"Ô/ocp/target-module@4b300000/spi@0Ù/ocp/ipu@58820000à/ocp/ipu@55020000ç/ocp/dsp@40800000î/ocp/dsp@41000000Zõ/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_rtc?ú/ocp/interconnect@48800000/segment@0/target-module@38000/rtc@0 ÿ/connector@0timerarm,armv7-timer disabled0   &interrupt-controller@48211000arm,cortex-a15-gic/@@H!H! H!@ H!`   &Dinterrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpu/@H(&D cpuscpu@0Lcpuarm,cortex-a15@Xlscpu“à�œ§Dücpu@1Lcpuarm,cortex-a15@Xlscpu“à�œopp-tableoperating-points-v2-ti-cpu²¹Dopp-1000000000Ä;šÊË,  øPŒ0,  øPŒ0Ùÿêopp-1176000000ÄFV˳@ �³@³@ �³@Ùÿopp-1500000000ÄYh/Ëv�~ðÐv�~ðÐÙÿocpsimple-pm-busöl À €€€l3-noc@44000000ti,dra7-l3-noc@DE  interconnect@4a000000ti,dra7-l4-cfgsimple-pm-busö  l sfck@JJJ *aplaia0$JJ J  segment@0simple-pm-bus\ @@PP``€€   ``ppàà €€€ € € € � �     Ð Ð à à@@PP``pp € € €target-module@2000ti,sysc-omap4ti,sysc@ *rev  scm@0ti,dra7-scm-coresimple-bus@   scm_conf@0sysconsimple-bus@ Dpbias_regulator@e00ti,pbias-dra7ti,pbias-omap@²pbias_mmc_omap54pbias_mmc_omap5Cw@[2Z D¨phy-gmii-sel@554ti,dra7xx-phy-gmii-sel@TsD»clocksclock-dss-deshdcp-0@558~ti,gate-clock‹dss_deshdcp_clklž@Xclock-ehrpwm0-tbclk-20@558~ti,gate-clock‹ehrpwm0_tbclklž@XDµclock-ehrpwm1-tbclk-21@558~ti,gate-clock‹ehrpwm1_tbclklž@XD¶clock-ehrpwm2-tbclk-22@558~ti,gate-clock‹ehrpwm2_tbclklž@XD·clock-sys-32k@6c4~ ti,mux-clock ‹sys_32k_cklž@ÄDUpinmux@1400ti,dra7-padconfpinctrl-single@h«/º Ø?ÿÿÿDœmmc1-default-no-clk-pu-pins0õTX\`dhDªmmc1-default-pins0õTX\`dhmmc1-sdr12-pins0õTX\`dhmmc1-hs-pins0õT°X°\°`°d°h°D«mmc1-sdr25-pins0õT°X°\°`°d°h°mmc1-sdr50-pins0õT X \ ` d h mmc1-ddr50-pins0õTX\`dhmmc1-sdr104-pins0õTX\`dhmmc2-default-pinsPõœ° ¤¨¬Œ�”˜D¬mmc2-hs-pinsPõœ° ¤¨¬Œ�”˜D­mmc2-ddr-3-3v-rev11-pinsPõœ° ¤¨¬Œ�”˜mmc2-ddr-1-8v-rev11-pinsPõœ° ¤¨¬Œ�”˜mmc2-ddr-rev20-pinsPõœ° ¤¨¬Œ�”˜D®mmc2-hs200-pinsPõœ° ¤¨¬Œ�”˜mmc4-default-pins0õèìðôøümmc4-hs-pins0õèìðôøümmc3-default-pins0õ|€„ˆŒ�mmc3-hs-pins0õ|€„ˆŒ�mmc3-sdr12-pins0õ|€„ˆŒ�mmc3-sdr25-pins0õ|€„ˆŒ�mmc3-sdr50-pins0õ|€„ˆŒ�mmc4-sdr12-pins0õèìðôøümmc4-sdr25-pins0õèìðôøüdcan1-default-pinsõÐÔD˜dcan1-sleep-pinsõÐÔD—scm_conf@1c04syscon@ DÉscm_conf@1c24syscon@$$Dddma-router@b78ti,dra7-dma-crossbar@ xü Í!1D›dma-router@c78ti,dra7-dma-crossbar@ x| Ì!1D¸target-module@5000ti,sysc-omap4ti,sysc@P*rev Pcm_core_aon@0ti,dra7-cm-core-aonsimple-bus@   clocksclock-atl-clkin0~ti,dra7-atl-clock‹atl_clkin0_ck lD±clock-atl-clkin1~ti,dra7-atl-clock‹atl_clkin1_ck lD²clock-atl-clkin2~ti,dra7-atl-clock‹atl_clkin2_ck lD³clock-atl-clkin3~ti,dra7-atl-clock‹atl_clkin3_ck lD´clock-hdmi-clkin~ fixed-clock‹hdmi_clkin_ck=D5clock-mlb-clkin~ fixed-clock ‹mlb_clkin_ck=D”clock-mlbp-clkin~ fixed-clock‹mlbp_clkin_ck=D•clock-pciesref-acs~ fixed-clock‹pciesref_acs_clk_ck=õáDEclock-ref-clkin0~ fixed-clock‹ref_clkin0_ck=clock-ref-clkin1~ fixed-clock‹ref_clkin1_ck=clock-ref-clkin2~ fixed-clock‹ref_clkin2_ck=clock-ref-clkin3~ fixed-clock‹ref_clkin3_ck=clock-rmii~ fixed-clock ‹rmii_clk_ck=clock-sdvenc-clkin~ fixed-clock‹sdvenc_clkin_ck=clock-secure-32k-clk-src~ fixed-clock‹secure_32k_clk_src_ck=€D~clock-sys-clk32-crystal~ fixed-clock‹sys_clk32_crystal_ck=€Dclock-sys-clk32-pseudo~fixed-factor-clock‹sys_clk32_pseudo_cklMXbDclock-virt-12000000~ fixed-clock‹virt_12000000_ck=·Dlclock-virt-13000000~ fixed-clock‹virt_13000000_ck=Æ]@clock-virt-16800000~ fixed-clock‹virt_16800000_ck=YDnclock-virt-19200000~ fixed-clock‹virt_19200000_ck=$øDoclock-virt-20000000~ fixed-clock‹virt_20000000_ck=1-Dmclock-virt-26000000~ fixed-clock‹virt_26000000_ck=Œº€Dpclock-virt-27000000~ fixed-clock‹virt_27000000_ck=›üÀDqclock-virt-38400000~ fixed-clock‹virt_38400000_ck=IðDrclock-sys-clkin2~ fixed-clock ‹sys_clkin2=XˆDsclock-usb-otg-clkin~ fixed-clock‹usb_otg_clkin_ck=D{clock-video1-clkin~ fixed-clock‹video1_clkin_ck=D?clock-video1-m2-clkin~ fixed-clock‹video1_m2_clkin_ck=D4clock-video2-clkin~ fixed-clock‹video2_clkin_ck=D@clock-video2-m2-clkin~ fixed-clock‹video2_m2_clkin_ck=D3clock@1e0~ti,omap4-dpll-m4xen-clock ‹dpll_abe_ckl@àäìèDclock-dpll-abe-x2~ti,omap4-dpll-x2-clock‹dpll_abe_x2_cklDclock-dpll-abe-m2x2-8@1f0~ti,divider-clock‹dpll_abe_m2x2_cklbm@ð–Dclock-abe@108~ti,divider-clock‹abe_clklb@­Duclock-dpll-abe-m2-8@1f0~ti,divider-clock‹dpll_abe_m2_cklbm@ð–Dwclock-dpll-abe-m3x2-8@1f4~ti,divider-clock‹dpll_abe_m3x2_cklbm@ô–Dclock@12c ti,clksel@,~clock@23@ ti,mux-clock‹dpll_core_byp_muxl~Dclock@120~ti,omap4-dpll-core-clock ‹dpll_core_ckl@ $,(Dclock-dpll-core-x2~ti,omap4-dpll-x2-clock‹dpll_core_x2_cklDclock-dpll-core-h12x2-8@13c~ti,divider-clock‹dpll_core_h12x2_cklb?m@<–D clock-mpu-dpll-hs-clk-div~fixed-factor-clock‹mpu_dpll_hs_clk_divl MXD!clock@160~ti,omap5-mpu-dpll-clock ‹dpll_mpu_ckl!@`dlhDclock-dpll-mpu-m2-8@170~ti,divider-clock‹dpll_mpu_m2_cklbm@p–D"clock-mpu-dclk-div~fixed-factor-clock ‹mpu_dclk_divl"MXD‚clock-dsp-dpll-hs-clk-div~fixed-factor-clock‹dsp_dpll_hs_clk_divl MXD#clock@240 ti,clksel@@~clock@23@ ti,mux-clock‹dpll_dsp_byp_muxl#~D$clock@234~ti,omap4-dpll-clock ‹dpll_dsp_ckl$@48@<Ã%Ó#ÃFD%clock-dpll-dsp-m2-8@244~ti,divider-clock‹dpll_dsp_m2_ckl%bm@D–Ã&Ó#ÃFD&clock-iva-dpll-hs-clk-div~fixed-factor-clock‹iva_dpll_hs_clk_divl MXD'clock@1ac ti,clksel@¬~clock@23@ ti,mux-clock‹dpll_iva_byp_muxl'~D(clock@1a0~ti,omap4-dpll-clock ‹dpll_iva_ckl(@ ¤¬¨Ã)ÓEp}@D)clock-dpll-iva-m2-8@1b0~ti,divider-clock‹dpll_iva_m2_ckl)bm@°–Ã*Ó%D*clock-iva-dclk~fixed-factor-clock ‹iva_dclkl*MXD„clock@2e4 ti,clksel@ä~clock@23@ ti,mux-clock‹dpll_gpu_byp_muxl~D+clock@2d8~ti,omap4-dpll-clock ‹dpll_gpu_ckl+@ØÜäàÃ,ÓLy@D,clock-dpll-gpu-m2-8@2e8~ti,divider-clock‹dpll_gpu_m2_ckl,bm@è–Ã-Ó_(kD-clock-dpll-core-m2-8@130~ti,divider-clock‹dpll_core_m2_cklbm@0–D.clock-core-dpll-out-dclk-div~fixed-factor-clock‹core_dpll_out_dclk_divl.MXD†clock@21c ti,clksel@~clock@23@ ti,mux-clock‹dpll_ddr_byp_muxl~D/clock@210~ti,omap4-dpll-clock ‹dpll_ddr_ckl/@D0clock-dpll-ddr-m2-8@220~ti,divider-clock‹dpll_ddr_m2_ckl0bm@ –Dxclock@2b4 ti,clksel@´~clock@23@ ti,mux-clock‹dpll_gmac_byp_muxl~D1clock@2a8~ti,omap4-dpll-clock ‹dpll_gmac_ckl1@¨¬´°D2clock-dpll-gmac-m2-8@2b8~ti,divider-clock‹dpll_gmac_m2_ckl2bm@¸–Dyclock-video2-dclk-div~fixed-factor-clock‹video2_dclk_divl3MXDˆclock-video1-dclk-div~fixed-factor-clock‹video1_dclk_divl4MXD‰clock-hdmi-dclk-div~fixed-factor-clock‹hdmi_dclk_divl5MXDŠclock-per-dpll-hs-clk-div~fixed-factor-clock‹per_dpll_hs_clk_divlMXDHclock-usb-dpll-hs-clk-div~fixed-factor-clock‹usb_dpll_hs_clk_divlMXDLclock-eve-dpll-hs-clk-div~fixed-factor-clock‹eve_dpll_hs_clk_divl MXD6clock@290 ti,clksel@�~clock@23@ ti,mux-clock‹dpll_eve_byp_muxl6~D7clock@284~ti,omap4-dpll-clock ‹dpll_eve_ckl7@„ˆ�ŒD8clock-dpll-eve-m2-8@294~ti,divider-clock‹dpll_eve_m2_ckl8bm@”–D9clock-eve-dclk-div~fixed-factor-clock ‹eve_dclk_divl9MXD“clock-dpll-core-h13x2-8@140~ti,divider-clock‹dpll_core_h13x2_cklb?m@@–clock-dpll-core-h14x2-8@144~ti,divider-clock‹dpll_core_h14x2_cklb?m@D–DVclock-dpll-core-h22x2-8@154~ti,divider-clock‹dpll_core_h22x2_cklb?m@T–DBclock-dpll-core-h23x2-8@158~ti,divider-clock‹dpll_core_h23x2_cklb?m@X–D[clock-dpll-core-h24x2-8@15c~ti,divider-clock‹dpll_core_h24x2_cklb?m@\–clock-dpll-ddr-x2~ti,omap4-dpll-x2-clock‹dpll_ddr_x2_ckl0D:clock-dpll-ddr-h11x2-8@228~ti,divider-clock‹dpll_ddr_h11x2_ckl:b?m@(–clock-dpll-dsp-x2~ti,omap4-dpll-x2-clock‹dpll_dsp_x2_ckl%D;clock-dpll-dsp-m3x2-8@248~ti,divider-clock‹dpll_dsp_m3x2_ckl;bm@H–Ã<ÓׄD<clock-dpll-gmac-x2~ti,omap4-dpll-x2-clock‹dpll_gmac_x2_ckl2D=clock-dpll-gmac-h11x2-8@2c0~ti,divider-clock‹dpll_gmac_h11x2_ckl=b?m@À–D>clock-dpll-gmac-h12x2-8@2c4~ti,divider-clock‹dpll_gmac_h12x2_ckl=b?m@Ä–clock-dpll-gmac-h13x2-8@2c8~ti,divider-clock‹dpll_gmac_h13x2_ckl=b?m@È–Dùclock-dpll-gmac-m3x2-8@2bc~ti,divider-clock‹dpll_gmac_m3x2_ckl=bm@¼–Døclock-gmii-m-clk-div~fixed-factor-clock‹gmii_m_clk_divl>MXclock-hdmi-clk2-div~fixed-factor-clock‹hdmi_clk2_divl5MXclock-hdmi-div~fixed-factor-clock ‹hdmi_div_clkl5MXclock@100 ti,clksel@~clock@4@ti,divider-clock ‹l3_iclk_divbl ­~Dclock-l4-root-clk-div~fixed-factor-clock‹l4_root_clk_divlMXDclock-video1-clk2-div~fixed-factor-clock‹video1_clk2_divl?MXclock-video1-div~fixed-factor-clock‹video1_div_clkl?MXclock-video2-clk2-div~fixed-factor-clock‹video2_clk2_divl@MXclock-video2-div~fixed-factor-clock‹video2_div_clkl@MXclock-dummy~ fixed-clock ‹dummy_ck=clockdomainsclock@300 ti,omap4-cm‹mpu_cm@ clock@20 ti,clkctrl ‹mpu_clkctrl@ ~D°clock@400 ti,omap4-cm‹dsp1_cm@ clock@20 ti,clkctrl ‹dsp1_clkctrl@ ~Dáclock@500 ti,omap4-cm‹ipu_cm@ clock@20 ti,clkctrl ‹ipu1_clkctrl@ ~ ÃAèBDAclock@50 ti,clkctrl ‹ipu_clkctrl@P4~Džclock@600 ti,omap4-cm‹dsp2_cm@ clock@20 ti,clkctrl ‹dsp2_clkctrl@ ~Dïclock@700 ti,omap4-cm‹rtc_cm@` `clock@20 ti,clkctrl ‹rtc_clkctrl@ (~D¿clock@760 ti,omap4-cm‹vpe_cm@`  ` clock@0 ti,clkctrl ‹vpe_clkctrl@ ~DÆtarget-module@8000ti,sysc-omap4ti,sysc@€*rev € cm_core@0ti,dra7-cm-coresimple-bus@0 0clocksclock@200~ti,omap4-dpll-clock‹dpll_pcie_ref_ckl@ DCclock-dpll-pcie-ref-m2ldo-8@210~ti,divider-clock‹dpll_pcie_ref_m2ldo_cklCbm@–DDclock-apll-pcie-in-clk-mux-7@4ae06118 ti,mux-clock‹apll_pcie_in_clk_muxlDE~@žDFclock@21c~ti,dra7-apll-clock ‹apll_pcie_cklFC@ DGclock-optfclk-pciephy-div-8@4a00821cti,divider-clock‹optfclk_pciephy_divlG~@žbDfclock-apll-pcie-clkvcoldo~fixed-factor-clock‹apll_pcie_clkvcoldolGMXclock-apll-pcie-clkvcoldo-div~fixed-factor-clock‹apll_pcie_clkvcoldo_divlGMXclock-apll-pcie-m2~fixed-factor-clock‹apll_pcie_m2_cklGMXD}clock@14c ti,clksel@L~clock@23@ ti,mux-clock‹dpll_per_byp_muxlH~DIclock@140~ti,omap4-dpll-clock ‹dpll_per_cklI@@DLHDJclock-dpll-per-m2-8@150~ti,divider-clock‹dpll_per_m2_cklJbm@P–DKclock-func-96m-aon-dclk-div~fixed-factor-clock‹func_96m_aon_dclk_divlKMXD‹clock@18c ti,clksel@Œ~clock@23@ ti,mux-clock‹dpll_usb_byp_muxlL~DMclock@180~ti,omap4-dpll-j-type-clock ‹dpll_usb_cklM@€„ŒˆDNclock-dpll-usb-m2-8@190~ti,divider-clock‹dpll_usb_m2_cklNbm@�–DRclock-dpll-pcie-ref-m2-8@210~ti,divider-clock‹dpll_pcie_ref_m2_cklCbm@–D|clock-dpll-per-x2~ti,omap4-dpll-x2-clock‹dpll_per_x2_cklJDOclock-dpll-per-h11x2-8@158~ti,divider-clock‹dpll_per_h11x2_cklOb?m@X–DPclock-dpll-per-h12x2-8@15c~ti,divider-clock‹dpll_per_h12x2_cklOb?m@\–clock-dpll-per-h13x2-8@160~ti,divider-clock‹dpll_per_h13x2_cklOb?m@`–clock-dpll-per-h14x2-8@164~ti,divider-clock‹dpll_per_h14x2_cklOb?m@d–DWclock-dpll-per-m2x2-8@150~ti,divider-clock‹dpll_per_m2x2_cklObm@P–DQclock-dpll-usb-clkdcoldo~fixed-factor-clock‹dpll_usb_clkdcoldolNMXDTclock-func-128m~fixed-factor-clock‹func_128m_clklPMXclock-func-12m-fclk~fixed-factor-clock‹func_12m_fclklQMXclock-func-24m~fixed-factor-clock ‹func_24m_clklKMXclock-func-48m-fclk~fixed-factor-clock‹func_48m_fclklQMXclock-func-96m-fclk~fixed-factor-clock‹func_96m_fclklQMXclock-l3init-60m@104~ti,divider-clock‹l3init_60m_fclklR@ÿclock-clkout2-8@6b0~ti,gate-clock ‹clkout2_clklSž@°clock-l3init-960m-gfclk-8@6c0~ti,gate-clock‹l3init_960m_gfclklTž@Àclock-usb-phy1-always-on-clk32k-8@640~ti,gate-clock‹usb_phy1_always_on_clk32klUž@@D`clock-usb-phy2-always-on-clk32k-8@688~ti,gate-clock‹usb_phy2_always_on_clk32klUž@ˆDbclock-usb-phy3-always-on-clk32k-8@698~ti,gate-clock‹usb_phy3_always_on_clk32klUž@˜Dcclock-gpu-core-gclk-mux-24@1220~ ti,mux-clock‹gpu_core_gclk_mux lVW-ž@ ÃXè-DXclock-gpu-hyd-gclk-mux-26@1220~ ti,mux-clock‹gpu_hyd_gclk_mux lVW-ž@ ÃYè-DYclock-l3instr-ts-gclk-div-24@e50~ti,divider-clock‹l3instr_ts_gclk_divlZž@P ÿ clock-vip1-gclk-mux-24@1020~ ti,mux-clock‹vip1_gclk_muxl[ž@ clock-vip2-gclk-mux-24@1028~ ti,mux-clock‹vip2_gclk_muxl[ž@(clock-vip3-gclk-mux-24@1030~ ti,mux-clock‹vip3_gclk_muxl[ž@0clockdomainsclock-coreaon-clkdmti,clockdomain‹coreaon_clkdmlNclock@600 ti,omap4-cm ‹coreaon_cm@ clock@20 ti,clkctrl‹coreaon_clkctrl@ ~Dgclock@700 ti,omap4-cm ‹l3main1_cm@ clock@20 ti,clkctrl‹l3main1_clkctrl@ t~D clock@900 ti,omap4-cm‹ipu2_cm@   clock@20 ti,clkctrl ‹ipu2_clkctrl@ ~D×clock@a00 ti,omap4-cm‹dma_cm@   clock@20 ti,clkctrl ‹dma_clkctrl@ ~D^clock@b00 ti,omap4-cm‹emif_cm@   clock@20 ti,clkctrl ‹emif_clkctrl@ ~clock@c00 ti,omap4-cm‹atl_cm@   clock@0 ti,clkctrl ‹atl_clkctrl@~Dclock@d00 ti,omap4-cm ‹l4cfg_cm@   clock@20 ti,clkctrl‹l4cfg_clkctrl@ „~D clock@e00 ti,omap4-cm ‹l3instr_cm@ clock@20 ti,clkctrl‹l3instr_clkctrl@ ~D clock@f00 ti,omap4-cm‹iva_cm@ clock@20 ti,clkctrl ‹iva_clkctrl@ ~Dîclock@1000 ti,omap4-cm‹cam_cm@ clock@20 ti,clkctrl ‹cam_clkctrl@ ,~DÄclock@1100 ti,omap4-cm‹dss_cm@ clock@20 ti,clkctrl ‹dss_clkctrl@ ~Dèclock@1200 ti,omap4-cm‹gpu_cm@ clock@20 ti,clkctrl ‹gpu_clkctrl@ ~Dçclock@1300 ti,omap4-cm ‹l3init_cm@ clock@20 ti,clkctrl‹l3init_clkctrl@ là~D_clock@b0 ti,clkctrl ‹pcie_clkctrl@° ~Declock@d0 ti,clkctrl ‹gmac_clkctrl@Ð~D¹clock@1700 ti,omap4-cm ‹l4per_cm@ clock@28 ti,clkctrl‹l4per_clkctrl(@(d $ð<@p~ Ã\\è]Dšclock@1a0 ti,clkctrl‹l4sec_clkctrl@ ,~D§clock@c ti,clkctrl‹l4per2_clkctrl@@  � Ä8` x$Ð<~D\clock@14 ti,clkctrl‹l4per3_clkctrl@È0~D¾target-module@56000ti,sysc-omap2ti,sysc@``,`(*revsyscsyss #&4 l^sfck `dma-controller@0ti,omap4430-sdmati,omap-sdma@0   A Dtarget-module@5e000ti,sysc disabled à target-module@80000ti,sysc-omap2ti,sysc@*revsyscsyss  &4 l_Àsfck €ocp2scp@0ti,omap-ocp2scp €@ phy@4000ti,dra7x-usb2ti,omap-usb2@@Nl`_Ðswkupclkrefclks_aDÀphy@5000 ti,dra7x-usb2-phy2ti,omap-usb2@PNtlb_ swkupclkrefclks_aDÃphy@4400 ti,omap-usb3@D€HdL@*phy_rxphy_txpll_ctrlNplc_ÐswkupclksysclkrefclksDÁtarget-module@90000ti,sysc-omap2ti,sysc@   *revsyscsyss  &4 l_Èsfck  €ocp2scp@0ti,omap-ocp2scp €@ pciephy@4000ti,phy-pipe3-pcie@@€Dd*phy_rxphy_txNdjd4lCDee e f;sdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclksDÇpciephy@5000ti,phy-pipe3-pcie@P€Td*phy_rxphy_txNd jd4lCDee e f;sdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclks disabledDÊphy@6000ti,phy-pipe3-sata@`€ddh@*phy_rxphy_txpll_ctrlNtl_hssysclkrefclkuüsDitarget-module@a0000ti,sysc disabled  €target-module@d9000ti,sysc-omap4-srti,sysc@ �8*sysc & lgsfck  �target-module@dd000ti,sysc-omap4-srti,sysc@ Ð8*sysc & lgsfck  Ðtarget-module@e0000ti,sysc disabled target-module@f4000ti,sysc-omap4ti,sysc@@@ *revsysc  & l sfck @mailbox@0ti,omap4-mailbox@$‡†…‘£ disabledtarget-module@f6000ti,sysc-omap2ti,sysc@```*revsyscsyss  &4 l sfck `spinlock@0ti,omap4-hwspinlock@µsegment@100000simple-pm-bus¸  00€€��  00@@PP``pp€€°°ÀÀÐÐààðð  00@@PP``pp€€ÐÐàà  00@@PP``pp€€  00@@PP``pp€€��  ��  °°ÀÀ°°ÀÀÐÐàà��   target-module@2000ti,sysc disabled  target-module@8000ti,sysc disabled €target-module@40000ti,sysc-omap4ti,sysc@ü *revsysc &öh l_hsfck sata@0snps,dwc-ahci@ 1Ãi Èsata-phy l_hÒtarget-module@51000ti,sysc disabled target-module@53000ti,sysc disabled 0target-module@55000ti,sysc disabled Ptarget-module@57000ti,sysc disabled ptarget-module@59000ti,sysc disabled �target-module@5b000ti,sysc disabled °target-module@5d000ti,sysc disabled Ðtarget-module@5f000ti,sysc disabled ðtarget-module@61000ti,sysc disabled target-module@63000ti,sysc disabled 0target-module@65000ti,sysc disabled Ptarget-module@67000ti,sysc disabled ptarget-module@69000ti,sysc disabled �target-module@6b000ti,sysc disabled °target-module@6d000ti,sysc disabled Ðtarget-module@71000ti,sysc disabled target-module@73000ti,sysc disabled 0target-module@75000ti,sysc disabled Ptarget-module@77000ti,sysc disabled ptarget-module@79000ti,sysc disabled �target-module@7b000ti,sysc disabled °target-module@7d000ti,sysc disabled Ðtarget-module@81000ti,sysc disabled target-module@83000ti,sysc disabled 0target-module@85000ti,sysc disabled Ptarget-module@87000ti,sysc disabled psegment@200000simple-pm-busø€!€�!�     ° °À ÀÐ Ðà àð ð!! ! 0!0@!@P!P " °"°À!ÀÐ!Ðà!àð!ð""@"@P"P`"`p"pÀ"ÀÐ"Ðà"àð"ð## # 0#0@#@P#P`#`p#p ! °!°target-module@0ti,sysc disabled target-module@a000ti,sysc disabled  target-module@c000ti,sysc disabled Àtarget-module@e000ti,sysc disabled àtarget-module@10000ti,sysc disabled target-module@12000ti,sysc disabled  target-module@14000ti,sysc disabled @target-module@18000ti,sysc disabled €target-module@1a000ti,sysc disabled  target-module@1c000ti,sysc disabled Àtarget-module@1e000ti,sysc disabled àtarget-module@20000ti,sysc disabled target-module@24000ti,sysc disabled @target-module@26000ti,sysc disabled `target-module@2a000ti,sysc disabled  target-module@2c000ti,sysc disabled Àtarget-module@2e000ti,sysc disabled àtarget-module@30000ti,sysc disabled target-module@32000ti,sysc disabled  target-module@34000ti,sysc disabled @target-module@36000ti,sysc disabled `interconnect@4ae00000ti,dra7-l4-wkupsimple-pm-busöj lksfck@JàJàJà *aplaia00JàJáJâJãsegment@0simple-pm-busl`` €€@@PPÀÀÐÐtarget-module@4000ti,sysc-omap2ti,sysc@@@ *revsysc& lk0sfck @counter@0ti,omap-counter32k@@target-module@6000ti,sysc-omap4ti,sysc@`*rev ` prm@0ti,dra7-prmsimple-bus@0  0clocksclock-sys-clkin1@110~ ti,mux-clock ‹sys_clkin1llmnopqr@Dclock@118 ti,clksel@~clock@0@ ti,mux-clock‹abe_dpll_sys_clk_muxls~Dtclock-abe-dpll-bypass-clk-mux@114~ ti,mux-clock‹abe_dpll_bypass_clk_muxltU@Dclock-abe-dpll-clk-mux@10c~ ti,mux-clock‹abe_dpll_clk_muxltU@ Dclock-abe-24m@11c~ti,divider-clock ‹abe_24m_fclkl@ÿD]clock-aess@178~ti,divider-clock ‹aess_fclklu@xbDvclock-abe-giclk-div@174~ti,divider-clock‹abe_giclk_divlv@tbclock-abe-lp-clk-div@1d8~ti,divider-clock‹abe_lp_clk_divl@Øÿ D–clock-abe-sys-clk-div@120~ti,divider-clock‹abe_sys_clk_divl@ bclock-adc-gfclk-mux@1dc~ ti,mux-clock‹adc_gfclk_mux lsU@Üclock-sys-clk1-dclk-div@1c8~ti,divider-clock‹sys_clk1_dclk_divlb@@È­Dclock-sys-clk2-dclk-div@1cc~ti,divider-clock‹sys_clk2_dclk_divlsb@@Ì­D€clock-per-abe-x1-dclk-div@1bc~ti,divider-clock‹per_abe_x1_dclk_divlwb@@¼­D�clock@18c ti,clksel@Œ~clock@0@ti,divider-clock ‹dsp_gclk_divl&b@­~Dƒclock-gpu-dclk@1a0~ti,divider-clock ‹gpu_dclkl-b@@ ­D…clock-emif-phy-dclk-div@190~ti,divider-clock‹emif_phy_dclk_divlxb@@�­D‡clock-gmac-250m-dclk-div@19c~ti,divider-clock‹gmac_250m_dclk_divlyb@@œ­Dzclock-gmac-main~fixed-factor-clock‹gmac_main_clklzMXDºclock-l3init-480m-dclk-div@1ac~ti,divider-clock‹l3init_480m_dclk_divlRb@@¬­DŒclock-usb-otg-dclk-div@184~ti,divider-clock‹usb_otg_dclk_divl{b@@„­D�clock-sata-dclk-div@1c0~ti,divider-clock‹sata_dclk_divlb@@À­DŽclock-pcie2-dclk-div@1b8~ti,divider-clock‹pcie2_dclk_divl|b@@¸­D�clock-pcie-dclk-div@1b4~ti,divider-clock‹pcie_dclk_divl}b@@´­D�clock-emu-dclk-div@194~ti,divider-clock ‹emu_dclk_divlb@@”­D‘clock-secure-32k-dclk-div@1c4~ti,divider-clock‹secure_32k_dclk_divl~b@@Ä­D’clock-clkoutmux0-clk-mux@158~ ti,mux-clock‹clkoutmux0_clk_muxXl€�‚ƒ„…†‡zˆ‰Š‹Œ�Ž��‘’“@Xclock-clkoutmux1-clk-mux@15c~ ti,mux-clock‹clkoutmux1_clk_muxXl€�‚ƒ„…†‡zˆ‰Š‹Œ�Ž��‘’“@\clock-clkoutmux2-clk-mux@160~ ti,mux-clock‹clkoutmux2_clk_muxXl€�‚ƒ„…†‡zˆ‰Š‹Œ�Ž��‘’“@`DSclock-custefuse-sys-gfclk-div~fixed-factor-clock‹custefuse_sys_gfclk_divlMXclock-eve@180~ ti,mux-clock‹eve_clkl9<@€clock-hdmi-dpll-clk-mux@164~ ti,mux-clock‹hdmi_dpll_clk_muxls@dclock-mlb@134~ti,divider-clock‹mlb_clkl”b@@4­clock-mlbp@130~ti,divider-clock ‹mlbp_clkl•b@@0­clock-per-abe-x1-gfclk2-div@138~ti,divider-clock‹per_abe_x1_gfclk2_divlwb@@8­clock-timer-sys-clk-div@144~ti,divider-clock‹timer_sys_clk_divl@DbD�clock-video1-dpll-clk-mux@168~ ti,mux-clock‹video1_dpll_clk_muxls@hclock-video2-dpll-clk-mux@16c~ ti,mux-clock‹video2_dpll_clk_muxls@lclock-wkupaon-iclk-mux@108~ ti,mux-clock‹wkupaon_iclk_muxl–@DZclockdomainsclock@1800 ti,omap4-cm ‹wkupaon_cm@ clock@20 ti,clkctrl‹wkupaon_clkctrl@ l~Dkprm@300"ti,dra7-prm-instti,omap-prm-inst@äD¯prm@400"ti,dra7-prm-instti,omap-prm-inst@øäDàprm@500"ti,dra7-prm-instti,omap-prm-inst@øäDÏprm@628"ti,dra7-prm-instti,omap-prm-inst@(ØäD prm@700"ti,dra7-prm-instti,omap-prm-inst@øäDprm@f00"ti,dra7-prm-instti,omap-prm-inst@øäDíprm@1000"ti,dra7-prm-instti,omap-prm-inst@äprm@1100"ti,dra7-prm-instti,omap-prm-inst@äprm@1200"ti,dra7-prm-instti,omap-prm-inst@äprm@1300"ti,dra7-prm-instti,omap-prm-inst@øäDhprm@1400"ti,dra7-prm-instti,omap-prm-inst@äD™prm@1600"ti,dra7-prm-instti,omap-prm-inst@äprm@1724"ti,dra7-prm-instti,omap-prm-inst@$äDjprm@1b00"ti,dra7-prm-instti,omap-prm-inst@@øäDðprm@1b40"ti,dra7-prm-instti,omap-prm-inst@@@äprm@1b80"ti,dra7-prm-instti,omap-prm-inst@€@äprm@1bc0"ti,dra7-prm-instti,omap-prm-inst@À@äprm@1c00"ti,dra7-prm-instti,omap-prm-inst@`äprm@1c60"ti,dra7-prm-instti,omap-prm-inst@` äprm@1c80"ti,dra7-prm-instti,omap-prm-inst@€€äDÅtarget-module@c000ti,sysc-omap4ti,sysc@À*rev Àscm_conf@0syscon@Dsegment@10000simple-pm-bus`@@PP€€��ÀÀÐÐtarget-module@0ti,sysc-omap2ti,sysc@*revsyscsyss &4lkk sfckdbclk gpio@0ti,omap4-gpio@ /Dtarget-module@4000ti,sysc-omap2ti,sysc@@@@*revsyscsyss "&4 lksfck @wdt@0 ti,omap3-wdt@€ Ktarget-module@8000ti,sysc-omap4-timerti,sysc@€€ *revsysc & lk sfck €!5timer@0ti,omap5430-timer@€ lk sfck  @ Ãk èUtarget-module@c000ti,sysc disabled Àsegment@20000simple-pm-bus¨``    00pp€€��ˆˆŠŠ°°ÀÀððtarget-module@0ti,sysc-omap4-timerti,sysc@ *revsysc & lk(sfck timer@0ti,omap5430-timer@€ Z@Otarget-module@2000ti,sysc disabled  target-module@6000ti,sysc disabledH`p €(ˆ*Š0�target-module@b000ti,sysc-omap2ti,sysc@°P°T°X*revsyscsyss &4 lk`sfck °serial@0ti,dra742-uart@ Ý=Ül disabledtarget-module@f000ti,sysc disabled ðsegment@30000simple-pm-busœÀÀ àà  00@@PP``pp€€��  target-module@1000ti,sysc disabled target-module@3000ti,sysc disabled 0target-module@5000ti,sysc disabled Ptarget-module@7000ti,sysc disabled ptarget-module@9000ti,sysc disabled �target-module@c000ti,sysc-omap4ti,sysc@À *rev lkhsfck À can@0ti,dra7-d_can@  _X Þ lkhokayndefaultsleepactive|—†—�˜interconnect@48000000ti,dra7-l4-per1simple-pm-busö™ lš˜sfck0@HHHHHH*aplaia0ia1ia2ia3H H segment@0simple-pm-busü  00@@PP``ppààððPP``pp€€��  °°ÀÀÐÐàà  °°ÀÀÐÐààðð  0000@@  0 0€€��``pp€€��   € € � �     ° ° À À РЀ€��  @ @ ` ` € €@ À À Ð Ð à à``pp @ @ P P € € � �     ° °    P P ` `  0 0 P P  °°ÀÀÐÐtarget-module@20000ti,sysc-omap2ti,sysc@PTX*revsyscsyss &4 lš(sfck serial@0ti,dra742-uart@ E=Ülokayš›5›6ŸtxrxEœHtarget-module@32000ti,sysc-omap4-timerti,sysc@   *revsysc & lšsfck  timer@0ti,omap5430-timer@€lš�sfcktimer_sys_ck !target-module@34000ti,sysc-omap4-timerti,sysc@@@ *revsysc & lšsfck @timer@0ti,omap5430-timer@€lš�sfcktimer_sys_ck "DÚtarget-module@36000ti,sysc-omap4-timerti,sysc@`` *revsysc & lš sfck `timer@0ti,omap5430-timer@€lš �sfcktimer_sys_ck #DÛtarget-module@3e000ti,sysc-omap4-timerti,sysc@àà *revsysc & lš(sfck àtimer@0ti,omap5430-timer@€lš(�sfcktimer_sys_ck (DÜtarget-module@51000ti,sysc-omap2ti,sysc@*revsyscsyss &4lšèšè sfckdbclk gpio@0ti,omap4-gpio@ /Dtarget-module@53000ti,sysc-omap2ti,sysc@001*revsyscsyss &4lšðšð sfckdbclk 0gpio@0ti,omap4-gpio@ t/target-module@55000ti,sysc-omap2ti,sysc@PPQ*revsyscsyss &4lš8š8 sfckdbclk Pgpio@0ti,omap4-gpio@ /Dtarget-module@57000ti,sysc-omap2ti,sysc@ppq*revsyscsyss &4lš@š@ sfckdbclk pgpio@0ti,omap4-gpio@ /D¢target-module@59000ti,sysc-omap2ti,sysc@��‘*revsyscsyss &4lšHšH sfckdbclk �gpio@0ti,omap4-gpio@ /Dtarget-module@5b000ti,sysc-omap2ti,sysc@°°±*revsyscsyss &4lšPšP sfckdbclk °gpio@0ti,omap4-gpio@ /target-module@5d000ti,sysc-omap2ti,sysc@ÐÐÑ*revsyscsyss &4lšXšX sfckdbclk Ðgpio@0ti,omap4-gpio@ /DŸtarget-module@60000ti,sysc-omap2ti,sysc@�*revsyscsyss &4 lšˆsfck i2c@0 ti,omap4-i2c@ 8 disabledtarget-module@66000ti,sysc-omap2ti,sysc@`P`T`X*revsyscsyss &4 lšHsfck `serial@0ti,dra742-uart@ d=Ül disabledš›?›@Ÿtxrxtarget-module@68000ti,sysc-omap2ti,sysc@€P€T€X*revsyscsyss &4 lž0sfck €serial@0ti,dra742-uart@ e=Ül disabledš›O›PŸtxrxtarget-module@6a000ti,sysc-omap2ti,sysc@ P T X*revsyscsyss &4 lšsfck  serial@0ti,dra742-uart@C=Ül disabledš›1›2Ÿtxrxtarget-module@6c000ti,sysc-omap2ti,sysc@ÀPÀTÀX*revsyscsyss &4 lš sfck Àserial@0ti,dra742-uart@ D=Ül disabledš›3›4Ÿtxrxtarget-module@6e000ti,sysc-omap2ti,sysc@àPàTàX*revsyscsyss &4 lš0sfck àserial@0ti,dra742-uart@ A=Ül disabledš›7›8Ÿtxrxtarget-module@70000ti,sysc-omap2ti,sysc@�*revsyscsyss &4 lšxsfck i2c@0 ti,omap4-i2c@ 3okay=€tps659038@58 ti,tps659038@XŸœ/©ÄD¡tps659038_pmicti,tps659038-pmicá ò   # 3 C S b q € � ž ® ¿ regulatorssmps124smps12C øP[ÐÐäDsmps34smps3C™p[™pÐäsmps454smps45C øP[ÐÐäsmps64smps6C øP[ÐÐäsmps74smps7C øP[Œ0Ðäsmps84smps8smps94smps9C2Z [2Z ÐäDýldo14ldo1Cw@[2Z äÐD©ldo24ldo2Cw@[w@Ðäldo34ldo3Cw@[w@Ðäldo44ldo4Cw@[w@ÐäDêldo94ldo9C Ñ@[³@Ðäldoln4ldolnCw@[w@ÐäDéldousb4ldousbC2Z [2Z ÐäDaldortc4ldortcCw@[w@Ðäregen14regen1äÐregen24regen2äÐtps659038_rtcti,palmas-rtc&¡ötps659038_pwr_buttonti,palmas-pwrbutton&¡ö tps659038_gpioti,palmas-gpiotps659038_usbti,palmas-usb-vid!: Q¢ Z¢DÂtpic2810@60 ti,tpic2810@`Dþtc358778@e"toshiba,tc358778toshiba,tc358768@ disabledl£srefclke¤q¤€¥portsport@0@endpoint�¦�Dìtarget-module@72000ti,sysc-omap2ti,sysc@   �*revsyscsyss &4 lš€sfck  i2c@0 ti,omap4-i2c@ 4 disabledtarget-module@78000ti,sysc-omap2ti,sysc@€€€*revsyscsyss &4 lš0sfck €elm@0ti,am3352-elm@À  disabledtarget-module@7a000ti,sysc-omap2ti,sysc@   �*revsyscsyss &4 lš�sfck  i2c@0 ti,omap4-i2c@ 9 disabledtarget-module@7c000ti,sysc-omap2ti,sysc@ÀÀÀ�*revsyscsyss &4 lž(sfck Ài2c@0 ti,omap4-i2c@ 7 disabledtarget-module@86000ti,sysc-omap4-timerti,sysc@`` *revsysc & lšsfck `timer@0ti,omap5430-timer@€lš�sfcktimer_sys_ck )Dätarget-module@88000ti,sysc-omap4-timerti,sysc@€€ *revsysc & lšsfck €timer@0ti,omap5430-timer@€lš�sfcktimer_sys_ck *DÒtarget-module@90000ti,sysc-omap2ti,sysc@ à ä *revsysc & l§ sfck  rng@0 ti,omap4-rng@  /lsfcktarget-module@98000ti,sysc-omap4ti,sysc@ € € *revsysc & lšÈsfck  €spi@0ti,omap4-mcspi@ <¨@š›#›$›%›&›'›(›)›* Ÿtx0rx0tx1rx1tx2rx2tx3rx3 disabledtarget-module@9a000ti,sysc-omap4ti,sysc@     *revsysc & lšÐsfck   spi@0ti,omap4-mcspi@ =¨ š›+›,›-›.Ÿtx0rx0tx1rx1 disabledtarget-module@9c000ti,sysc-omap4ti,sysc@ À À *revsysc & l_sfck  Àmmc@0ti,dra7-sdhci@ Nokay¶¨à q°ÑÞë¥÷© Ÿ ndefaulths|ª†«target-module@a2000ti,sysc disabled  target-module@a4000ti,sysc disabled @ Ptarget-module@a5000ti,sysc-omap2ti,sysc@ P0 P4 P8*revsyscsyss &4 l§sfck  Pdes@0 ti,omap4-des@  Mš›u›tŸtxrxlsfcktarget-module@a8000ti,sysc disabled  €@target-module@ad000ti,sysc-omap4ti,sysc@ Ð Ð *revsysc & lšøsfck  Ðmmc@0ti,dra7-sdhci@ Y disabledÃÐ� @target-module@b2000ti,sysc-omap2ti,sysc@   *revsyscsyss 4! lš`sfck  1w@0 ti,omap3-1w@ 5target-module@b4000ti,sysc-omap4ti,sysc@ @ @ *revsysc & l_sfck  @mmc@0ti,dra7-sdhci@ QokayÃ¸Ø 0ÑÞë¥÷¥?ndefaulthsddr_3_3v|¬†­�®target-module@b8000ti,sysc-omap4ti,sysc@ € € *revsysc & lšØsfck  €spi@0ti,omap4-mcspi@ V¨š››Ÿtx0rx0okayMsn65hvs882@0 pisosr-gpio@dB@v ¢target-module@ba000ti,sysc-omap4ti,sysc@     *revsysc & lšàsfck   spi@0ti,omap4-mcspi@ +¨š›F›GŸtx0rx0 disabledtarget-module@d1000ti,sysc-omap4ti,sysc@   *revsysc & lšsfck  mmc@0ti,dra7-sdhci@ [ disabledà q° @target-module@d5000ti,sysc disabled  Psegment@200000simple-pm-bustarget-module@48210000ti,sysc-omap4-simpleti,syscö¯ l°sfck H!mpu ti,omap5-mpuinterconnect@48400000ti,dra7-l4-per2simple-pm-busö™ l\sfck(@H@H@H@H@H@*aplaia0ia1ia2lH@@E€E€@EÀEÀ@FF@HC`HC`@HC HC @HDÀHDÀ@HEHE@HE@HE@@segment@0simple-pm-busT@@@€€ÀÀÐÐ   @@ ``€€   ÀÀ àà``pp     °°ÀÀÐÐààðð  00     °°@@ ``€€   @@PPÀÀ ààÀÀÐÐ  00@@PP``pp€€��€€   °°ÀÀÐÐààE€E€@EÀEÀ@FF@HC`HC`@HC HC @HDÀHDÀ@HEHE@HE@HE@@target-module@20000ti,sysc-omap2ti,sysc@PTX*revsyscsyss &4 l\Äsfck serial@0ti,dra742-uart@ Ú=Ül disabledtarget-module@22000ti,sysc-omap2ti,sysc@ P T X*revsyscsyss &4 l\Ôsfck  serial@0ti,dra742-uart@ Û=Ül disabledtarget-module@24000ti,sysc-omap2ti,sysc@@P@T@X*revsyscsyss &4 l\Üsfck @serial@0ti,dra742-uart@ Ü=Ül disabledtarget-module@2c000ti,sysc disabled Àtarget-module@36000ti,sysc disabled `target-module@3a000ti,sysc disabled  target-module@3c000ti,sysc-omap4ti,sysc@À*rev lsfck À disabledatl@0 ti,dra7-atl@ÿб²³´ lsfck disabledtarget-module@3e000ti,sysc-omap4ti,sysc@àà *revsysc  & l\¸sfck àepwmss@0 ti,dra746-pwmssti,am33xx-pwmss@0 disabled pwm@100ti,dra746-ecapti,am3352-ecap�@€lsfck disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm�@€lµ stbclkfck disabledtarget-module@40000ti,sysc-omap4ti,sysc@ *revsysc  & l\„sfck epwmss@0 ti,dra746-pwmssti,am33xx-pwmss@0 disabled pwm@100ti,dra746-ecapti,am3352-ecap�@€lsfck disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm�@€l¶ stbclkfck disabledtarget-module@42000ti,sysc-omap4ti,sysc@   *revsysc  & l\Œsfck  epwmss@0 ti,dra746-pwmssti,am33xx-pwmss@0 disabled pwm@100ti,dra746-ecapti,am3352-ecap�@€lsfck disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm�@€l· stbclkfck disabledtarget-module@46000ti,sysc disabled `target-module@48000ti,sysc disabled €target-module@4a000ti,sysc disabled  target-module@4c000ti,sysc disabled Àtarget-module@50000ti,sysc disabled target-module@54000ti,sysc disabled @target-module@58000ti,sysc disabled € target-module@5b000ti,sysc disabled °target-module@5d000ti,sysc disabled Ðtarget-module@60000ti,sysc-dra7-mcaspti,sysc@ *revsysc &$lžžžsfckahclkxahclkr E€E€@mcasp@0ti,dra7-mcasp-audio@ E€*mpudathg¨txrxš¸�¸€Ÿtxrx$lžžžsfckahclkxahclkr disabledtarget-module@64000ti,sysc-dra7-mcaspti,sysc@@@ *revsysc &$l\T\T\Tsfckahclkxahclkr@ EÀEÀ@mcasp@0ti,dra7-mcasp-audio@ EÀ*mpudat•”¨txrxš¸ƒ¸‚Ÿtxrx$l\Tž\Tsfckahclkxahclkr disabledtarget-module@68000ti,sysc-dra7-mcaspti,sysc@€€ *revsysc &l\\\\ sfckahclkx€ FF@mcasp@0ti,dra7-mcasp-audio@ F*mpudat—–¨txrxš¸…¸„Ÿtxrxl\\\\ sfckahclkx disabledtarget-module@6c000ti,sysc-dra7-mcaspti,sysc@ÀÀ *revsysc &l\Œ\Œ sfckahclkxÀ HC`HC`@mcasp@0ti,dra7-mcasp-audio@ HC`*mpudat™˜¨txrxš¸‡¸†Ÿtxrxl\Œ\Œ sfckahclkx disabledtarget-module@70000ti,sysc-dra7-mcaspti,sysc@ *revsysc &l\l\l sfckahclkx HC HC @mcasp@0ti,dra7-mcasp-audio@ HC *mpudat›š¨txrxš¸‰¸ˆŸtxrxl\l\l sfckahclkx disabledtarget-module@74000ti,sysc-dra7-mcaspti,sysc@@@ *revsysc &l\ø\ø sfckahclkx@ HDÀHDÀ@mcasp@0ti,dra7-mcasp-audio@ HDÀ*mpudat�œ¨txrxš¸‹¸ŠŸtxrxl\ø\ø sfckahclkx disabledtarget-module@78000ti,sysc-dra7-mcaspti,sysc@€€ *revsysc &l\ü\ü sfckahclkx€ HEHE@mcasp@0ti,dra7-mcasp-audio@ HE*mpudatŸž¨txrxš¸�¸ŒŸtxrxl\ü\ü sfckahclkx disabledtarget-module@7c000ti,sysc-dra7-mcaspti,sysc@ÀÀ *revsysc &l\„\„ sfckahclkxÀ HE@HE@@mcasp@0ti,dra7-mcasp-audio@ HE@*mpudat¡ ¨txrxš¸�¸ŽŸtxrxl\„\„ sfckahclkx disabledtarget-module@80000ti,sysc-omap4ti,sysc@ *rev l\äsfck  can@0ti,dra7-d_can@  _X ál disabledtarget-module@84000ti,sysc-omap4-simpleti,sysc@RRR*revsyscsyss &4 l¹sfck @@5switch@0#ti,dra7-cpsw-switchti,cpsw-switch@@ @lºsfck²okay0NOPQ¨rx_threshrxtxmiscethernet-portsport@1@¸port1¾ûʼ Õrgmii-rxidÞport@2@¸port2¾ûʽ Õrgmii-rxidÞmdio@1000ti,cpsw-mdioti,davinci_mdiolºsfckðB@@ethernet-phy@0@D¼ethernet-phy@1@D½cpts l¹scptsinterconnect@48800000ti,dra7-l4-per3simple-pm-busö™ l¾sfck(@H€H€H€H€H€*aplaia0ia1ia2 H€ segment@0simple-pm-busŒ  00@@PP``pp€€��  °°ÀÀÐÐààðð€€��ÀÀÐР °°ÀÀÐÐààðð  00@@PP``pp€€��  °°ÀÀÐÐààðð  00@@PP``pp€€��  °°@@PPààðð  00``pp @@PP   °°ÀÀÐÐààðð 00target-module@2000ti,sysc-omap4ti,sysc@   *revsysc  & l €sfck  mailbox@0ti,omap4-mailbox@0{|}~…‘£  disabledtarget-module@4000ti,sysc disabled @target-module@a000ti,sysc disabled  target-module@10000ti,sysc disabled target-module@16000ti,sysc disabled `target-module@1c000ti,sysc disabled Àtarget-module@1e000ti,sysc disabled àtarget-module@20000ti,sysc-omap4-timerti,sysc@ *revsysc & lžsfck timer@0ti,omap5430-timer@€lž�sfcktimer_sys_ck $Dãtarget-module@22000ti,sysc-omap4-timerti,sysc@   *revsysc & lžsfck  timer@0ti,omap5430-timer@€lž�sfcktimer_sys_ck %Dõtarget-module@24000ti,sysc-omap4-timerti,sysc@@@ *revsysc & lžsfck @timer@0ti,omap5430-timer@€lž�sfcktimer_sys_ck &DÓtarget-module@26000ti,sysc-omap4-timerti,sysc@`` *revsysc & lž sfck `timer@0ti,omap5430-timer@€lž �sfcktimer_sys_ck 'DÔtarget-module@28000ti,sysc-omap4-timerti,sysc@€€ *revsysc & l¾´sfck €timer@0ti,omap5430-timer@€l¾´�sfcktimer_sys_ck SùDötarget-module@2a000ti,sysc-omap4-timerti,sysc@   *revsysc & l¾¼sfck  timer@0ti,omap5430-timer@€l¾¼�sfcktimer_sys_ck Tùtarget-module@2c000ti,sysc-omap4-timerti,sysc@ÀÀ *revsysc & l¾Äsfck À!5timer@0ti,omap5430-timer@€l¾Ä�sfcktimer_sys_ck Uù þÄè�target-module@2e000ti,sysc-omap4-timerti,sysc@àà *revsysc & l¾sfck à!5timer@0ti,omap5430-timer@€l¾�sfcktimer_sys_ck Vù þè�target-module@38000ti,sysc-omap4-simpleti,sysc@€t€x *revsysc& l¿$sfck €rtc@0ti,am3352-rtc@ÙÙlUokay target-module@3a000ti,sysc-omap4ti,sysc@   *revsysc  & l (sfck  mailbox@0ti,omap4-mailbox@0íîïð…‘£  disabledtarget-module@3c000ti,sysc-omap4ti,sysc@ÀÀ *revsysc  & l 0sfck Àmailbox@0ti,omap4-mailbox@0ñòóô…‘£  disabledtarget-module@3e000ti,sysc-omap4ti,sysc@àà *revsysc  & l 8sfck àmailbox@0ti,omap4-mailbox@0õö÷ø…‘£  disabledtarget-module@40000ti,sysc-omap4ti,sysc@ *revsysc  & l @sfck mailbox@0ti,omap4-mailbox@0ùúûü…‘£ okayDÐmbox-ipu1-ipc3x  okayDÑmbox-dsp1-ipc3x  okayDâtarget-module@42000ti,sysc-omap4ti,sysc@   *revsysc  & l Hsfck  mailbox@0ti,omap4-mailbox@0ýþÿ…‘£ okayDØmbox-ipu2-ipc3x  okayDÙmbox-dsp2-ipc3x  okayDôtarget-module@44000ti,sysc-omap4ti,sysc@@@ *revsysc  & l Psfck @mailbox@0ti,omap4-mailbox@0…‘£  disabledtarget-module@46000ti,sysc-omap4ti,sysc@`` *revsysc  & l Xsfck `mailbox@0ti,omap4-mailbox@0…‘£  disabledtarget-module@48000ti,sysc disabled €target-module@4a000ti,sysc disabled  target-module@4c000ti,sysc disabled Àtarget-module@4e000ti,sysc disabled àtarget-module@50000ti,sysc disabled target-module@52000ti,sysc disabled  target-module@54000ti,sysc disabled @target-module@56000ti,sysc disabled `target-module@58000ti,sysc disabled €target-module@5a000ti,sysc disabled  target-module@5c000ti,sysc disabled Àtarget-module@5e000ti,sysc-omap4ti,sysc@àà *revsysc  & l `sfck àmailbox@0ti,omap4-mailbox@0    …‘£  disabledtarget-module@60000ti,sysc-omap4ti,sysc@ *revsysc  & l hsfck mailbox@0ti,omap4-mailbox@0 …‘£  disabledtarget-module@62000ti,sysc-omap4ti,sysc@   *revsysc  & l psfck  mailbox@0ti,omap4-mailbox@0…‘£  disabledtarget-module@64000ti,sysc-omap4ti,sysc@@@ *revsysc  & l xsfck @mailbox@0ti,omap4-mailbox@0…‘£  disabledtarget-module@80000ti,sysc-omap4ti,sysc@ *revsysc & l_Ðsfck omap_dwc3_1@0ti,dwc3@ H ( usb@10000 snps,dwc3@p$GGH¨peripheralhostotgÃÀÁÈusb2-phyusb3-phy 2super-speed @host H atarget-module@c0000ti,sysc-omap4ti,sysc@   *revsysc & l_ sfck  omap_dwc3_2@0ti,dwc3@ W (  zÂusb@10000 snps,dwc3@p$IIW¨peripheralhostotgÃà Èusb2-phy 2high-speed @otg H a � zÂtarget-module@100000ti,sysc-omap4ti,sysc@ *revsysc & l_(sfck  disabledomap_dwc3_3@0ti,dwc3@ X (  disabledusb@10000 snps,dwc3@p$XXX¨peripheralhostotg 2high-speed @otg H atarget-module@170000ti,sysc-omap4ti,sysc@*sysc  & lÄsfck  disabledtarget-module@190000ti,sysc-omap4ti,sysc@*sysc  & lÄsfck  disabledtarget-module@1b0000ti,sysc-omap4ti,sysc@ *revsysc  & lÄsfck  disabledtarget-module@1d0010ti,sysc-omap4ti,sysc@*sysc &öÅ lÆsfck vpe@0 ti,dra7-vpe @ €WÐ*vpe_topsccscvpdma btarget-module@140000ti,sysc-omap4ti,sysc@ *revsysc & l_0sfck  disabledomap_dwc3_4@0ti,dwc3@ Z ( disabledusb@10000 snps,dwc3@p$YYZ¨peripheralhostotg 2high-speed @otgtarget-module@51000000ti,sysc-omap4ti,syscöh žh ¥rstctrl$lee e sfckphy-clkphy-clk-divQQ0  pcie@51000000@Q Q L *rc_dbicsti_confconfigèéLpci0�0‚ 00þÐ ±ÿ/ » ÅÃÇ Èpcie-phy0 Öd é` üÈÈÈÈ Éokayti,dra746-pcie-rcti,dra7-pcie T¢interrupt-controller/DÈpcie_ep@51000000 @Q(Q LQ(&*ep_dbicsti_confep_dbics2addr_space è » % 4ÃÇ Èpcie-phy0 É Öd disabled"ti,dra746-pcie-epti,dra7-pcie-eptarget-module@51800000ti,sysc-omap4ti,sysc$lee e sfckphy-clkphy-clk-divöh žh ¥rstctrlQ€Q€00  disabledpcie@51800000@Q€ Q€ L *rc_dbicsti_confconfigcdLpci0�0‚000þÐ ±ÿ/ » ÅÃÊ Èpcie-phy0 é` üËËËË Éti,dra746-pcie-rcti,dra7-pcieinterrupt-controller/DËocmcram@40300000 mmio-sram@@0 @0sram-hs@0ti,secure-ram@ocmcram@40400000 disabled mmio-sram@@@ @@ocmcram@40500000 disabled mmio-sram@@P @Pbandgap@4a0021e00@J!à J#, J#€,J#À