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½Jqos@27f13100rockchip,rk3576-qossyscon9'ñ1 ½Kqos@27f13180rockchip,rk3576-qossyscon9'ñ1€ ½Iqos@27f13200rockchip,rk3576-qossyscon9'ñ2 ½Lqos@27f20000rockchip,rk3576-qossyscon9'ò ½:qos@27f21000rockchip,rk3576-qossyscon9'ò ½;qos@27f22080rockchip,rk3576-qossyscon9'ò € ½8qos@27f22100rockchip,rk3576-qossyscon9'ò! ½9ethernet@2a220000&rockchip,rk3576-gmacsnps,dwmac-4.20a9*"(^$. %0)stmmacethclk_mac_refpclk_macaclk_macptp_ref5 %*Bmacirqeth_wake_irq×%å ìstmmacethÛl¤µmÅÖnéoü Êdisabledmdiosnps,dwmac-mdio+stmmac-axi-config½mrx-queues-config/½nqueue0tx-queues-configE½oqueue0ethernet@2a230000&rockchip,rk3576-gmacsnps,dwmac-4.20a9*#(^%/!$0)stmmacethclk_mac_refpclk_macaclk_macptp_ref5 -2Bmacirqeth_wake_irq×%å  ìstmmacethÛl¤µpÅÖqérü Êdisabledmdiosnps,dwmac-mdio+stmmac-axi-config½prx-queues-config/½qqueue0tx-queues-configE½rqueue0sata@2a240000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci9*$^)satapmaliverxoob  ×% È$ Ísata-phy[5 Êdisabledsata@2a250000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci9*%^)satapmaliverxoob  ×% È* Ísata-phy[5 Êdisabledufshc@2a2d0000rockchip,rk3576-ufshcP9*-+&ð&À*."hcimphyhci_grfmphy_grfhci_apb ^IC×Ù)corepclkpclk_mphyref_outkØ{;  i×%stødefault(å!"$Æìbiusysufsgrfmphy u Êdisabledspi@2a300000 rockchip,sfc9*0@  ÿ^*+)clk_sfchclk_sfc×%+ Êdisabledmmc@2a310000rockchip,rk3576-dw-mshc9*1@^)()biucium  ûx ëÂødefaultvwxy×%å ìresetÊokay†�¢ ³,¼ÇÎÖäzð{mmc@2a320000rockchip,rk3576-dw-mshc9*2@^#")biucium  üx ë |}~ødefault×%å ìresetÊokay+†¢ý¼  Ç + 1Öä(ð€ ?wifi@19 ,  Bhost-wakeødefault�mmc@2a3300000rockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshc9*3küýù ’ ëÂn6 ëÂ(^ùúûüý)corebusaxiblocktimer  ýx 낃„…†ødefault×%(åéêëìíìcorebusaxiblocktimer MÊokay†� Z t ƒÎ + 1spi@2a340000 rockchip,sfc9*4@  þ^÷ø)clk_sfchclk_sfc×%+ Êdisabledrng@2a410000rockchip,rk3576-rng9*A^  µå¨otp@2a580000rockchip,rk3576-otp9*X+^1)otpapb_pclkphy媩ìotpapbcpu-code@29cpu-version@59 �id@a9 cpub-leakage@1e9cpul-leakage@1f9npu-leakage@209 gpu-leakage@219!log-leakage@229"bigcore-tsadc-trim@249$ � ½Ôlitcore-tsadc-trim@269& � ½Õddr-tsadc-trim@289( � ½Önpu-tsadc-trim@2a9* � ½×gpu-tsadc-trim@2c9, � ½Øsoc-tsadc-trim@649d � ½Ósai@2a600000rockchip,rk3576-sai9*`  »^@A )mclkhclk¾33;txrx×% åìmhødefault(‡ˆ‰Š‹Œ�Ž��[lSAI0 Êdisabledsai@2a610000rockchip,rk3576-sai9*a  ¼^GH )mclkhclk¾33;txrx×% åìmhødefault‘’“”•–—[lSAI1 Êdisabledsai@2a620000rockchip,rk3576-sai9*b  ½^JK )mclkhclk¾kk;txrx×% åìmhødefault˜™š›[lSAI2 Êdisabledsai@2a630000rockchip,rk3576-sai9*c  ¾^MN )mclkhclk¾kk;txrx×% åìmhødefaultœ�žŸ[lSAI3 Êdisabledsai@2a640000rockchip,rk3576-sai9*d  ¿^PQ )mclkhclk¾cc;txrx×% åìmhødefault ¡¢£[lSAI4 Êdisabledinterrupt-controller@2a701000 arm,gic-400@9*p*p *p@*p`   ÿ7+½dma-controller@2ab90000arm,pl330arm,primecell9*¹@ ¢^à )apb_pclk ! ¹½3dma-controller@2abb0000arm,pl330arm,primecell9*»@ ¢^Ä )apb_pclk "# ¹½kdma-controller@2abd0000arm,pl330arm,primecell9*½@ ¢^Å )apb_pclk $% ¹½ci2c@2ac40000(rockchip,rk3576-i2crockchip,rk3399-i2c9*Ä^th )i2cpclk  Yødefault¤+Êokaypmic@23rockchip,rk8069#+ï , ødefault¥¦§¨ Ä Ü© è© ô© © © © $© 0© <© H© Uª b© o« |« ‰©dvs1-null-pinsžgpio_pwrctrl1 •pin_fun0½¦dvs1-pwrdn-pinsžgpio_pwrctrl1 •pin_fun2dvs1-rst-pinsžgpio_pwrctrl1 •pin_fun3dvs1-slp-pinsžgpio_pwrctrl1 •pin_fun1dvs2-dvs-pinsžgpio_pwrctrl2 •pin_fun4dvs2-gpio-pinsžgpio_pwrctrl2 •pin_fun5dvs2-null-pinsžgpio_pwrctrl2 •pin_fun0½§dvs2-pwrdn-pinsžgpio_pwrctrl2 •pin_fun2dvs2-rst-pinsžgpio_pwrctrl2 •pin_fun3dvs2-slp-pinsžgpio_pwrctrl2 •pin_fun1dvs3-dvs-pinsžgpio_pwrctrl3 •pin_fun4dvs3-gpio-pinsžgpio_pwrctrl3 •pin_fun5dvs3-null-pinsžgpio_pwrctrl3 •pin_fun0½¨dvs3-pwrdn-pinsžgpio_pwrctrl3 •pin_fun2dvs3-rst-pinsžgpio_pwrctrl3 •pin_fun3dvs3-slp-pinsžgpio_pwrctrl3 •pin_fun1regulatorsdcdc-reg1 ž ² Ä� àdp ø~ð vdd_cpu_big_s0 0Ô½regulator-state-mem 4dcdc-reg2 ² Ä� àdp ø~ð vdd_npu_s0 0Ôregulator-state-mem 4dcdc-reg3 ž ² àdp ø~ð vdd_cpu_lit_s0 0Ô½ regulator-state-mem 4 M q°dcdc-reg4 ž ² à2Z  ø2Z  vcc_3v3_s3½(regulator-state-mem i M2Z dcdc-reg5 ² Ä� àdp ø »  vdd_gpu_s0 0Ô½[regulator-state-mem 4 M øPdcdc-reg6 ž ² vddq_ddr_s0regulator-state-mem 4dcdc-reg7 ž ² àdp ø 5 vdd_logic_s0regulator-state-mem 4dcdc-reg8 ž ² àw@ øw@ vcc_1v8_s3½€regulator-state-mem i Mw@dcdc-reg9 ž ² vdd2_ddr_s3regulator-state-mem idcdc-reg10 ž ² àdp øO€ vdd_ddr_s0regulator-state-mem 4pldo-reg1 ž ² àw@ øw@ vcca_1v8_s0½Òregulator-state-mem 4pldo-reg2 ž ² àw@ øw@ vcca1v8_pldo2_s0regulator-state-mem 4pldo-reg3 ž ² àO€ øO€ vdda_1v2_s0regulator-state-mem 4pldo-reg4 ž ² à2Z  ø2Z  vcca_3v3_s0regulator-state-mem 4pldo-reg5 ž ² àw@ ø2Z  vccio_sd_s0½{regulator-state-mem 4pldo-reg6 ž ² àw@ øw@ vcca1v8_pldo6_s3regulator-state-mem i Mw@nldo-reg1 ž ² à q° ø q° vdd_0v75_s3regulator-state-mem i M q°nldo-reg2 ž ² à øP ø øP vdda_ddr_pll_s0regulator-state-mem 4nldo-reg3 ž ² à Ç| ø Ç| vdda0v75_hdmi_s0regulator-state-mem 4nldo-reg4 ž ² à øP ø øP vdda_0v85_s0regulator-state-mem 4nldo-reg5 ž ² à q° ø q° vdda_0v75_s0regulator-state-mem 4i2c@2ac50000(rockchip,rk3576-i2crockchip,rk3399-i2c9*Å^ui )i2cpclk  Zødefault¬+Êokayrtc@51haoyu,hym85639Q hym8563 , ødefault­ ?½ëi2c@2ac60000(rockchip,rk3576-i2crockchip,rk3399-i2c9*Æ^vj )i2cpclk  [ødefault®+ Êdisabledi2c@2ac70000(rockchip,rk3576-i2crockchip,rk3399-i2c9*Ç^wk )i2cpclk  \ødefault¯+ Êdisabledi2c@2ac80000(rockchip,rk3576-i2crockchip,rk3399-i2c9*È^xl )i2cpclk  ]ødefault°+ Êdisabledi2c@2ac90000(rockchip,rk3576-i2crockchip,rk3399-i2c9*É^ym )i2cpclk  ^ødefault±+ Êdisabledi2c@2aca0000(rockchip,rk3576-i2crockchip,rk3399-i2c9*Ê^zn )i2cpclk  _ødefault²+ Êdisabledi2c@2acb0000(rockchip,rk3576-i2crockchip,rk3399-i2c9*Ë^{o )i2cpclk  `ødefault³+ Êdisabledtimer@2acc0000,rockchip,rk3576-timerrockchip,rk3288-timer9*Ì ^§ª )pclktimer  -watchdog@2ace0000 rockchip,rk3576-wdtsnps,dw-wdt9*Î^¢¡ )tclkpclk  (spi@2acf0000(rockchip,rk3576-spirockchip,rk3066-spi9*Ï^œ—)spiclkapb_pclk¾33;txrx  t �ødefault ´µ¶+ Êdisabledspi@2ad00000(rockchip,rk3576-spirockchip,rk3066-spi9*Ð^�˜)spiclkapb_pclk¾33;txrx  u �ødefault ·¸¹+ Êdisabledspi@2ad10000(rockchip,rk3576-spirockchip,rk3066-spi9*Ñ^ž™)spiclkapb_pclk¾kk;txrx  v �ødefault º»¼+ Êdisabledspi@2ad20000(rockchip,rk3576-spirockchip,rk3066-spi9*Ò^Ÿš)spiclkapb_pclk¾kk;txrx  w �ødefault ½¾¿+ Êdisabledspi@2ad30000(rockchip,rk3576-spirockchip,rk3066-spi9*Ó^ ›)spiclkapb_pclk¾c c ;txrx  x �ødefault ÀÁÂ+ Êdisabledserial@2ad40000&rockchip,rk3576-uartsnps,dw-apb-uart9*Ô§±^Œ�)baudclkapb_pclk¾33;txrx  LÃødefaultÊokayserial@2ad50000&rockchip,rk3576-uartsnps,dw-apb-uart9*Õ§±^�‚)baudclkapb_pclk¾3 3 ;txrx  NødefaultÄ Êdisabledserial@2ad60000&rockchip,rk3576-uartsnps,dw-apb-uart9*Ö§±^Žƒ)baudclkapb_pclk¾3 3 ;txrx  OÅødefault Êdisabledserial@2ad70000&rockchip,rk3576-uartsnps,dw-apb-uart9*×§±^�„)baudclkapb_pclk¾k k ;txrx  PÆødefault Êdisabledserial@2ad80000&rockchip,rk3576-uartsnps,dw-apb-uart9*ا±^�…)baudclkapb_pclk¾k k ;txrx  Q ÇÈÉødefaultÊokay ˆbluetoothrealtek,rtl8822cs-bt ˜Ê ¥Ê ·, ødefault ËÌÍserial@2ad90000&rockchip,rk3576-uartsnps,dw-apb-uart9*Ù§±^‘†)baudclkapb_pclk¾k k;txrx  RÎødefault Êdisabledserial@2ada0000&rockchip,rk3576-uartsnps,dw-apb-uart9*Ú§±^’‡)baudclkapb_pclk¾cc;txrx  SÏødefault Êdisabledserial@2adb0000&rockchip,rk3576-uartsnps,dw-apb-uart9*Û§±^“ˆ)baudclkapb_pclk¾cc ;txrx  TÐødefault Êdisabledserial@2adc0000&rockchip,rk3576-uartsnps,dw-apb-uart9*ܧ±^”‰)baudclkapb_pclk¾c c ;txrx  UÑødefault Êdisabledadc@2ae00000.rockchip,rk3576-saradcrockchip,rk3588-saradc9*à^~})saradcapb_pclk  |åH ìsaradc-apb ÇÊokay ÙÒtsadc@2ae70000rockchip,rk3576-tsadc9*ç  {^€)tsadcapb_pclkk€’„€åJKìtsadc-apbtsadc å ûÔÀ  )+½sensor@09 DÓ Ptrimsensor@19 DÔ Ptrimsensor@29 DÕ Ptrimsensor@39 DÖ Ptrimsensor@49 D× Ptrimsensor@59 DØ Ptrimi2c@2ae80000(rockchip,rk3576-i2crockchip,rk3399-i2c9*è^|p )i2cpclk  aødefaultÙ+ Êdisabledserial@2afc0000&rockchip,rk3576-uartsnps,dw-apb-uart9*ü§±^•Š)baudclkapb_pclk¾cc  VødefaultÚ Êdisabledserial@2afd0000&rockchip,rk3576-uartsnps,dw-apb-uart9*ý§±^–‹)baudclkapb_pclk¾cc  WødefaultÛ Êdisabledphy@2b020000rockchip,rk3576-mipi-dcphy9+^Ð )pclkref å¼­®½ìm_phyapbgrfs_phyÛÜH Êdisabled½dphy@2b050000rockchip,rk3576-naneng-combphy9+H^95 )refapbpipek9’õá奡ìphyapb aÝ sÞÊokay½$phy@2b060000rockchip,rk3576-naneng-combphy9+H^:6  )refapbpipek:’õá妣ìphyapb aÝ sßÊokay½*phy@2b010000rockchip,rk3576-usbdp-phy9+H^ÕÓ/)refclkimmortalpclkutmi(帹º»·ìinitcmnlanepcs_apbpma_apb ‰à œá ­â”ãÊokay½.hdmiphy@2b0000004rockchip,rk3576-hdptx-phyrockchip,rk3588-hdptx-phy9+ ^!)refapb å¬ÂÃÄìapbinitcmnlaneÛäHÊokay½^sram@3ff88000 mmio-sram9?ø€€è?ø€€+rkvdec-sram@09€ ý]scmi-shmem@4010f000arm,scmi-shmem9@ð½chosen Èserial0:1500000n8gpio-keys gpio-keysødefaultåbutton-reset Ôreset u Ú2 ì˜ ?gpio-leds gpio-ledsødefault æçèled-0 ÷ •lan 'led-1 ÷ •power '  ýheartbeatled-2 ÷ •wan uhdmi-conhdmi-connector é4aportendpoint+ê½jsdio-pwrseqmmc-pwrseq-simple^ë )ext_clockødefaultì #È í½regulator-vcc3v3-rtc-s5regulator-fixed ž ² à2Z  ø2Z  vcc3v3_rtc_s5 :©regulator-vcc5v-dcinregulator-fixed ž ² àLK@ øLK@ vcc5v_dcin½ïregulator-vcc5v-hdmi-txregulator-fixed E uødefaultî àLK@ øLK@ vcc5v_hdmi_tx :©½éregulator-vcc5v0-device-s0regulator-fixed ž ² àLK@ øLK@ vcc5v0_device_s0 :ïregulator-vcc5v0-sys-s5regulator-fixed ž ² àLK@ øLK@ vcc5v0_sys_s5 :ゥregulator-vcc5v0-usb-otg0regulator-fixed E ,ødefaultð àLK@ øLK@ vcc5v0_usb_otg0 :©½1regulator-vcc-1v1-nldo-s3regulator-fixed ž ² àÈà øÈà vcc_1v1_nldo_s3 :©½«regulator-vcc-1v8-s0regulator-fixed ž ² àw@ øw@ vcc_1v8_s0 :€regulator-vcc-2v0-pldo-s3regulator-fixed ž ² à„€ ø„€ vcc_2v0_pldo_s3 :©½ªregulator-vcc-3v3-s0regulator-fixed ž ² à2Z  ø2Z  vcc_3v3_s0 :(½òregulator-vcc-3v3-sdregulator-fixed E ,ødefaultñ vcc3v3_sd à2Z  ø2Z  :ò½z compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9serial10serial11spi0spi1spi2spi3spi4mmc0mmc1mmc2clock-frequencyclock-output-names#clock-cellscpudevice_typeregenable-methodcapacity-dmips-mhzclocksoperating-points-v2dynamic-power-coefficientcpu-idle-states#cooling-cellscpu-supplyphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmemsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-dairockchip,grfrangesgpio-controllergpio-rangesinterruptsinterrupt-controller#gpio-cells#interrupt-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereg-namesbus-rangeclock-namesdma-coherentinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-ib-windowsnum-viewportnum-ob-windowsnum-lanesphysphy-namespower-domainsresetsreset-namespinctrl-namespinctrl-0reset-gpiosvpcie3v3-supplydr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,parkmode-disable-hs-quirksnps,parkmode-disable-ss-quirkextconsnps,dis_rxdet_inp3_quirk#phy-cellsphy-supply#reset-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratesreg-shiftreg-io-widthdmas#power-domain-cellspm_qosmali-supplyiommussramrockchip,disable-mmu-reset#iommu-cellsrockchip,pmuremote-endpointdma-namesrockchip,sai-rx-route#sound-dai-cellssound-name-prefixrockchip,sai-tx-routerockchip,vo-grfrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdnon-removablewakeup-sourcesupports-cqefull-pwr-cycle-in-suspendmmc-hs400-1_8vmmc-hs400-enhanced-strobebitsarm,pl330-periph-burst#dma-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplyfunctionregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendnum-csuart-has-rtsctsenable-gpiosdevice-wake-gpioshost-wake-gpios#io-channel-cellsvref-supply#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritynvmem-cellsnvmem-cell-namesrockchip,pipe-grfrockchip,pipe-phy-grfrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfpoolstdout-pathlabeldebounce-intervallinux,codecolorlinux,default-triggerhdmi-pwr-supplypost-power-on-delay-msvin-supplyenable-active-high