8<( 2luckfox,omni3576luckfox,core3576rockchip,rk3576 +7Luckfox Omni3576 Carrier Boardaliases=/soc/i2c@27300000B/soc/i2c@2ac40000G/soc/i2c@2ac50000L/soc/i2c@2ac60000Q/soc/i2c@2ac70000V/soc/i2c@2ac80000[/soc/i2c@2ac90000`/soc/i2c@2aca0000e/soc/i2c@2acb0000j/soc/i2c@2ae80000o/soc/serial@2ad40000w/soc/serial@27310000/soc/serial@2ad50000/soc/serial@2ad60000/soc/serial@2ad70000/soc/serial@2ad80000/soc/serial@2ad90000/soc/serial@2ada0000/soc/serial@2adb0000/soc/serial@2adc0000/soc/serial@2afc0000/soc/serial@2afd0000/soc/spi@2acf0000/soc/spi@2ad00000/soc/spi@2ad10000/soc/spi@2ad20000/soc/spi@2ad30000/soc/mmc@2a330000/soc/mmc@2a310000clock-xin32k fixed-clockxin32kclock-xin24m fixed-clockn6xin24mclock-spll fixed-clock)׫spllcpus+cpu-mapcluster0core0$core1$core2$core3$cluster1core0$core1$core2$core3$ cpu@0(cpuarm,cortex-a5348psciFY ` tx  cpu@1(cpuarm,cortex-a5348psciFY `   cpu@2(cpuarm,cortex-a5348psciFY `   cpu@3(cpuarm,cortex-a5348psciFY `   cpu@100(cpuarm,cortex-a7248psciFY `t@ cpu@101(cpuarm,cortex-a7248psciFY ` cpu@102(cpuarm,cortex-a7248psciFY ` cpu@103(cpuarm,cortex-a7248psciFY `  idle-statespscicpu-sleeparm,idle-statex opp-table-cluster0operating-points-v2' opp-4080000002Q 9 ` `~G@opp-6000000002#F 9 ` `~G@opp-81600000020, 9 ` `~G@opp-10080000002< 9 ` `~G@opp-12000000002G 9 ` `~G@opp-14160000002Tfr 9  ~G@opp-16080000002_" 9 q q~G@opp-18000000002kI 9 ~G@Xopp-20160000002x) 9 ~G@opp-table-cluster1operating-points-v2'opp-4080000002Q 9 ` `~G@Xopp-6000000002#F 9 ` `~G@opp-81600000020, 9 ` `~G@opp-10080000002< 9 ` `~G@opp-12000000002G 9 ` `~G@opp-14160000002Tfr 9 4 4~G@opp-16080000002_" 9 @ @~G@opp-18000000002kI 9 5 5~G@opp-20160000002x) 9 )$ )$~G@opp-22080000002h 9HH~G@opp-table-gpuoperating-points-v2Wopp-3000000002 9 ` ` Popp-4000000002ׄ 9 ` ` Popp-5000000002e 9 ` ` Popp-6000000002#F 9 ` ` Popp-7000000002)' 9   Popp-8000000002/ 9 X X Popp-90000000025 9 Popp-95000000028ـ 9 P P Pdisplay-subsystemrockchip,display-subsystemdfirmwarescmi arm,scmi-smcju+protocol@144 hdmi-soundsimple-audio-card{HDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupinctrlrockchip,rk3576-pinctrl+gpio@27320000rockchip,gpio-bank4'2Y  &2gpio@2ae10000rockchip,gpio-bank4*Y  &2gpio@2ae20000rockchip,gpio-bank4*Y@  &2'gpio@2ae30000rockchip,gpio-bank4*Y`  &2gpio@2ae40000rockchip,gpio-bank4*Y  &2rpcfg-pull-upCpcfg-pull-downPpcfg-pull-none_pcfg-pull-none-drv-level-2_lpcfg-pull-up-drv-level-2Clpcfg-pull-up-drv-level-3Clpcfg-pull-none-smt_{aupll_clkcam_clk0cam_clk1cam_clk2can0can1clk0_32kclk1_32kclk_32kcpubigcpulitdebug0_testdebug1_testdebug2_testdebug3_testdebug4_testdebug5_testdebug6_testdebug7_testdpdsm_auddsmcdsmc_testclkdsmc_testdataedp_txemmcemmc-rstnout }emmc-bus8~emmc-clk emmc-cmdemmc-strb emmc_testclkemmc_testdataeth0eth1eth0_ptpeth0_testrxclketh0_testrxdeth1_ptpeth1_testrxclketh1_testrxdeth_clk0_25meth_clk1_25mflexbus0flexbus1flexbus0_testclkflexbus0_testdataflexbus1_testclkflexbus1_testdatafspi0fspi1fspi0_testclkfspi0_testdatafspi1_testclkfspi1_testdatagpuhdmi_txhdmi_txm0-pins   chdmi-tx-scl dhdmi-tx-sda ei2c0i2c0m0-xfer   /i2c1i2c1m0-xfer   i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2c9i2c9m0-xfer   i3c0i3c1i3c0_sdai3c1_sdaisp_flashisp_prelightjtagmipinpupcie0pcie1pdm0pdm1pmu_debug_testpwm0pwm1pwm2ref_clk0ref_clk1ref_clk2sai0sai0m0-lrcksai0m0-sclksai0m0-sdi0sai0m0-sdi1 sai0m0-sdi2 sai0m0-sdi3 sai0m0-sdo0sai0m0-sdo1sai0m0-sdo2 sai0m0-sdo3sai1sai1m0-lrcksai1m0-sclksai1m0-sdi0 sai1m0-sdo0sai1m0-sdo1sai1m0-sdo2 sai1m0-sdo3 sai2sai2m0-lrcksai2m0-sclksai2m0-sdisai2m0-sdosai3sai3m0-lrcksai3m0-sclksai3m0-sdisai3m0-sdo sai4sai4m0-lrcksai4m0-sclksai4m0-sdisai4m0-sdo sata30sata30_port0sata30_port1sdmmc0sdmmc0-bus4@vsdmmc0-clkssdmmc0-cmdtsdmmc0-detusdmmc0-pwrenwsdmmc1sdmmc1m0-bus4@  |sdmmc1m0-clkzsdmmc1m0-cmd{sdmmc0_testclksdmmc0_testdatasdmmc1_testclksdmmc1_testdataspdifspi0spi0m0-pins0   spi0m0-csn0 spi0m0-csn1 spi1spi1m0-pins0   spi1m0-csn0 spi1m0-csn1 spi2spi2m0-pins0   spi2m0-csn0 spi2m0-csn1 spi3spi3m0-pins0   spi3m0-csn0 spi3m0-csn1 spi4spi4m0-pins0   spi4m0-csn0 spi4m0-csn1 test_clktsadctsadc_ctrluart0uart0m0-xfer   uart1uart1m0-xfer   1uart2uart2m0-xfer   uart3uart3m0-xfer   uart4uart4m1-xfer   uart4m1-ctsn uart5uart5m0-xfer   uart6uart6m0-xfer   uart7uart7m0-xfer   uart8uart8m0-xfer   uart9uart9m0-xfer   uart10uart10m0-xfer   uart11uart11m0-xfer   ufsufs-refclkpufs-rstgpioqufs_testdata0ufs_testdata1ufs_testdata2ufs_testdata3vi_cifvo_lcdcvo_postvp0_syncvp1_syncvp2_syncpmicpmic-pins   vovo_ebchdmihdmi-con-enhym8563hym8563-intpciepcie-pwr-enpcie-reset &usbusb-host-pwr-enusb-otg0-pwr-enusbc0-intledsled-green-pinpmu-a53arm,cortex-a53-pmu0pmu-a72arm,cortex-a72-pmu0 psci arm,psci-1.0?smcthermal-zonespackage-thermaltripspackage-crit8 /criticalbigcore-thermaldtripsbigcore-alertL/passivebigcore-crit8 /criticalcooling-mapsmap00 littlecore-thermaldtripslittlecore-alertL/passive littlecore-crit8 /criticalcooling-mapsmap0 0gpu-thermaldtripsgpu-alertL/passive!gpu-crit8 /criticalcooling-mapsmap0! "npu-thermaltripsnpu-crit8 /criticalddr-thermaltripsddr-crit8 /criticaltimerarm,armv8-timer0   soc simple-bus+pcie@22000000*rockchip,rk3576-pcierockchip,rk3568-pcie04"@*  dbiapbconfig(Y$$aclk_mstaclk_slvaclk_dbipclkaux(pci0H=syspmcmsglegacyerrmsi2M``####n$ pcie-phy%T     pwrpipe+okaydefault&  ' (legacy-interrupt-controller2  #pcie@22400000*rockchip,rk3576-pcierockchip,rk3568-pcie04"@@*!!dbiapbconfig /(Y  $$aclk_mstaclk_slvaclk_dbipclkaux(pci0H     =syspmcmsglegacyerrmsi2M``))))n* pcie-phy% T!!! !   pwrpipe+ disabledlegacy-interrupt-controller2   )usb@23000000rockchip,rk3576-dwc3snps,dwc34#@YEFD$ref_clksuspend_clkbus_clk %'otg +,usb2-phyusb3-phy /utmi_wide8Ph disabledusb@23400000rockchip,rk3576-dwc3snps,dwc34#@@Y$ref_clksuspend_clkbus_clk %'host -*usb2-phyusb3-phy /utmi_wide8Ph"0okaysyscon@2600a000rockchip,rk3576-sys-grfsyscon4& ]syscon@2600c000#rockchip,rk3576-bigcore-grfsyscon4& syscon@2600e000#rockchip,rk3576-litcore-grfsyscon4& syscon@26010000rockchip,rk3576-cci-grfsyscon4& syscon@26016000rockchip,rk3576-gpu-grfsyscon4&` syscon@26018000rockchip,rk3576-npu-grfsyscon4& syscon@2601a000rockchip,rk3576-vo0-grfsyscon4& bsyscon@2601e000rockchip,rk3576-usb-grfsyscon4&syscon@26020000rockchip,rk3576-php-grfsyscon4& syscon@26024000+rockchip,rk3576-pmu0-grfsysconsimple-mfd4&@syscon@26026000 rockchip,rk3576-pmu1-grfsyscon4&`syscon@26028000$rockchip,rk3576-pipe-phy-grfsyscon4& syscon@2602a000$rockchip,rk3576-pipe-phy-grfsyscon4& syscon@2602c000$rockchip,rk3576-usbdpphy-grfsyscon4& syscon@2602e000.rockchip,rk3576-usb2phy-grfsysconsimple-mfd4&@+usb2-phy@0rockchip,rk3576-usb2phy4phyapbYGH$phyclkaclkaclk_slv usb480m_phy0 disabledotg-port<$^_`=otg-bvalidotg-idlinestate disabled+usb2-phy@2000rockchip,rk3576-usb2phy4 phyapbY  $phyclkaclkaclk_slv usb480m_phy1okayotg-port<$bcd=otg-bvalidotg-idlinestateokayG.-syscon@26032000$rockchip,rk3576-hdptxphy-grfsyscon4& syscon@26034000!rockchip,rk3576-dcphy-grfsyscon4&@ Ysyscon@26036000rockchip,rk3576-vo1-grfsyscon4&`Ysyscon@26038000"rockchip,rk3576-sdgmac-grfsyscon4&isyscon@26040000*rockchip,rk3576-ioc-grfsysconsimple-mfd4&clock-controller@27200000rockchip,rk3576-cru4' Rp_  o8Fq;.@ e沀e沀i2c@27300000(rockchip,rk3576-i2crockchip,rk3399-i2c4'0Y $i2cpclk Xdefault/+ disabledserial@27310000&rockchip,rk3576-uartsnps,dw-apb-uart4'1Y$baudclkapb_pclk00  Mdefault1 disabledpower-management@27380000&rockchip,rk3576-pmusysconsimple-mfd4'8^power-controller!rockchip,rk3576-power-controller+%power-domain@04+power-domain@14@Y23456+power-domain@24Y7power-domain@34Y8power-domain@44Y9power-domain@54Y:;+power-domain@64HY3"(0#)<=>?@Apower-domain@84 Y BC+power-domain@94 power-domain@104 power-domain@124 YDpower-domain@134 PY\[RSPOXWUTEFGHIpower-domain@144Y=>Jpower-domain@154`YghfcdeilmpnoKLMNO+power-domain@114 Ya`Ppower-domain@184 YQR+power-domain@74(YBGHISTpower-domain@164(YUpower-domain@174(YVgpu@27800000&rockchip,rk3576-maliarm,mali-bifrost4'_  =Y$coretY$[\] =jobmmugpu`W%okayX"video-codec@27b00000rockchip,rk3576-vdec04'''functionlinkcache 4(Y=>@?$axiahbcabaccorehevc_cabac _=@?#F#Fe;Y%(axiahbcabaccorehevc_cabacZiommu@27b00800,rockchip,rk3576-iommurockchip,rk3568-iommu 4'@' @ 5Y@> $aclkiface%Yvop@27d00000rockchip,rk3576-vop 4'0'Pvopgamma-lut0V{|}=sysvp0vp1vp2,Y[2$aclkhclkdclk_vp0dclk_vp1dclk_vp2pll_hdmiphy0\%]^okayports+port@0+4endpoint@24_fport@1+4port@2+4iommu@27d07e00,rockchip,rk3576-iommurockchip,rk3568-iommu 4'~' VY $aclkiface%okay\sai@27d40000rockchip,rk3576-sai4' Y $mclkhclk`/rx%ijmh9O`SAI5 disabledsai@27d50000rockchip,rk3576-sai4' Y $mclkhclk``/txrx%klmh9rO`SAI6okaydsi@27d80000rockchip,rk3576-mipi-dsi24' YY $pclksys%capba dcphyb disabledports+port@04port@14hdmi@27da0000rockchip,rk3576-dw-hdmi-qp4'0Y$pclkearcrefaudhdphclk_vo1<RSTUo=avpcecearcmainhpd[default cde%frefhdpbOokayports+port@04endpointf_port@14endpointgsai@27ed0000rockchip,rk3576-sai4' Y $mclkhclk`/tx%uvmhrO`SAI7 disabledsai@27ee0000rockchip,rk3576-sai4' tY $mclkhclkh/tx%rqmhrO`SAI8 disabledsai@27ef0000rockchip,rk3576-sai4' uY $mclkhclk0/tx%mhrO`SAI9 disabledqos@27f02000rockchip,rk3576-qossyscon4' Vqos@27f04000rockchip,rk3576-qossyscon4'@ <qos@27f04080rockchip,rk3576-qossyscon4'@ =qos@27f04100rockchip,rk3576-qossyscon4'A >qos@27f04180rockchip,rk3576-qossyscon4'A ?qos@27f04200rockchip,rk3576-qossyscon4'B @qos@27f04280rockchip,rk3576-qossyscon4'B Aqos@27f05000rockchip,rk3576-qossyscon4'P 9qos@27f06000rockchip,rk3576-qossyscon4'` Dqos@27f08000rockchip,rk3576-qossyscon4' 2qos@27f08080rockchip,rk3576-qossyscon4' 3qos@27f08100rockchip,rk3576-qossyscon4' 4qos@27f09000rockchip,rk3576-qossyscon4' :qos@27f09080rockchip,rk3576-qossyscon4' ;qos@27f0a000rockchip,rk3576-qossyscon4' Bqos@27f0a080rockchip,rk3576-qossyscon4' Cqos@27f0c000rockchip,rk3576-qossyscon4' Jqos@27f0d000rockchip,rk3576-qossyscon4' qos@27f0e000rockchip,rk3576-qossyscon4' Sqos@27f0e080rockchip,rk3576-qossyscon4' Tqos@27f0f000rockchip,rk3576-qossyscon4' Pqos@27f10000rockchip,rk3576-qossyscon4' Kqos@27f10080rockchip,rk3576-qossyscon4' Lqos@27f10100rockchip,rk3576-qossyscon4' Mqos@27f10180rockchip,rk3576-qossyscon4' Nqos@27f10200rockchip,rk3576-qossyscon4' Oqos@27f11000rockchip,rk3576-qossyscon4' Uqos@27f12800rockchip,rk3576-qossyscon4'( Qqos@27f12880rockchip,rk3576-qossyscon4'( Rqos@27f13000rockchip,rk3576-qossyscon4'0 Eqos@27f13080rockchip,rk3576-qossyscon4'0 Gqos@27f13100rockchip,rk3576-qossyscon4'1 Hqos@27f13180rockchip,rk3576-qossyscon4'1 Fqos@27f13200rockchip,rk3576-qossyscon4'2 Iqos@27f20000rockchip,rk3576-qossyscon4' 7qos@27f21000rockchip,rk3576-qossyscon4' 8qos@27f22080rockchip,rk3576-qossyscon4' 5qos@27f22100rockchip,rk3576-qossyscon4'! 6ethernet@2a220000&rockchip,rk3576-gmacsnps,dwmac-4.20a4*"(Y$. %0$stmmacethclk_mac_refpclk_macaclk_macptp_ref0%*=macirqeth_wake_irq% stmmacethijkl disabledmdiosnps,dwmac-mdio+stmmac-axi-configjrx-queues-config#kqueue0tx-queues-config9lqueue0ethernet@2a230000&rockchip,rk3576-gmacsnps,dwmac-4.20a4*#(Y%/!$0$stmmacethclk_mac_refpclk_macaclk_macptp_ref0-2=macirqeth_wake_irq%  stmmacethimno disabledmdiosnps,dwmac-mdio+stmmac-axi-configmrx-queues-config#nqueue0tx-queues-config9oqueue0sata@2a240000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci4*$Y$satapmaliverxoob % $ sata-phyO0 disabledsata@2a250000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci4*%Y$satapmaliverxoob % * sata-phyO0 disabledufshc@2a2d0000rockchip,rk3576-ufshcP4*-+&&*."hcimphyhci_grfmphy_grfhci_apb YIC$corepclkpclk_mphyref_out_o; i%pqdefault(!"$biusysufsgrfmphy  r disabledspi@2a300000 rockchip,sfc4*0@ Y*+$clk_sfchclk_sfc%+ disabledmmc@2a310000rockchip,rk3576-dw-mshc4*1@Y)($biuciua l defaultstuvw% resetokayzxymmc@2a320000rockchip,rk3576-dw-mshc4*2@Y#"$biuciua l  z{|default% reset disabledmmc@2a3300000rockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshc4*3_  n6 (Y$corebusaxiblocktimer l }~default%(corebusaxiblocktimerokayz   1 7xyspi@2a340000 rockchip,sfc4*4@ Y$clk_sfchclk_sfc%+ disabledrng@2a410000rockchip,rk3576-rng4*AY okayotp@2a580000rockchip,rk3576-otp4*X+Y1$otpapb_pclkphyotpapbcpu-code@24cpu-version@54 Eid@a4 cpub-leakage@1e4cpul-leakage@1f4npu-leakage@204 gpu-leakage@214!log-leakage@224"bigcore-tsadc-trim@244$ E litcore-tsadc-trim@264& E ddr-tsadc-trim@284( E npu-tsadc-trim@2a4* E gpu-tsadc-trim@2c4, E soc-tsadc-trim@644d E sai@2a600000rockchip,rk3576-sai4*` Y@A $mclkhclk00/txrx% mhdefault(O`SAI0 disabledsai@2a610000rockchip,rk3576-sai4*a YGH $mclkhclk00/txrx% mhdefaultO`SAI1 disabledsai@2a620000rockchip,rk3576-sai4*b YJK $mclkhclkhh/txrx% mhdefaultO`SAI2 disabledsai@2a630000rockchip,rk3576-sai4*c YMN $mclkhclkhh/txrx% mhdefaultO`SAI3 disabledsai@2a640000rockchip,rk3576-sai4*d YPQ $mclkhclk``/txrx% mhdefaultO`SAI4 disabledinterrupt-controller@2a701000 arm,gic-400@4*p*p *p@*p`  2+dma-controller@2ab90000arm,pl330arm,primecell4*@ JY $apb_pclk ! a0dma-controller@2abb0000arm,pl330arm,primecell4*@ JY $apb_pclk"# ahdma-controller@2abd0000arm,pl330arm,primecell4*@ JY $apb_pclk$% a`i2c@2ac40000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Yth $i2cpclk Ydefault+okaypmic@23rockchip,rk8064#& default l              $ 1dvs1-null-pinsgpio_pwrctrl2 =pin_fun0dvs2-null-pinsgpio_pwrctrl2 =pin_fun0dvs3-null-pinsgpio_pwrctrl3 =pin_fun0dvs1-slp-pinsgpio_pwrctrl1 =pin_fun1dvs1-pwrdn-pinsgpio_pwrctrl1 =pin_fun2dvs1-rst-pinsgpio_pwrctrl1 =pin_fun3dvs2-slp-pinsgpio_pwrctrl2 =pin_fun1dvs2-pwrdn-pinsgpio_pwrctrl2 =pin_fun2dvs2-rst-pinsgpio_pwrctrl2 =pin_fun3dvs2-dvs-pinsgpio_pwrctrl2 =pin_fun4dvs2-gpio-pinsgpio_pwrctrl2 =pin_fun5dvs3-slp-pinsgpio_pwrctrl3 =pin_fun1dvs3-pwrdn-pinsgpio_pwrctrl3 =pin_fun2dvs3-rst-pinsgpio_pwrctrl3 =pin_fun3dvs3-dvs-pinsgpio_pwrctrl3 =pin_fun4dvs3-gpio-pinsgpio_pwrctrl3 =pin_fun5regulatorsdcdc-reg1 F Z ldp ~ 0 vdd_cpu_big_s0 regulator-state-mem dcdc-reg2 Z ldp ~ 0 vdd_npu_s0 regulator-state-mem dcdc-reg3 F Z ldp ~ 0 vdd_cpu_lit_s0 regulator-state-mem  qdcdc-reg4 F Z l2Z 2Z vcc_3v3_s3xregulator-state-mem  2Zdcdc-reg5 Z ldp  0 vdd_gpu_s0 Xregulator-state-mem  Pdcdc-reg6 F Z vddq_ddr_s0regulator-state-mem dcdc-reg7 F Z ldp 5 vdd_logic_s0regulator-state-mem dcdc-reg8 F Z lw@ w@ vcc_1v8_s3regulator-state-mem  w@dcdc-reg9 F Z vdd2_ddr_s3regulator-state-mem dcdc-reg10 F Z ldp O vdd_ddr_s0regulator-state-mem pldo-reg1 F Z lw@ w@ vcca_1v8_s0regulator-state-mem pldo-reg2 F Z lw@ w@ vcca1v8_pldo2_s0regulator-state-mem pldo-reg3 F Z lO O vdda_1v2_s0regulator-state-mem pldo-reg4 F Z l2Z 2Z vcca_3v3_s0regulator-state-mem pldo-reg5 F Z lw@ 2Z vccio_sd_s0yregulator-state-mem pldo-reg6 F Z lw@ w@ vcca1v8_pldo6_s3regulator-state-mem  w@nldo-reg1 F Z l q q vdd_0v75_s3regulator-state-mem  qnldo-reg2 F Z l P P vdda_ddr_pll_s0regulator-state-mem nldo-reg3 F Z l | | vdda0v75_hdmi_s0regulator-state-mem nldo-reg4 F Z l P P vdda_0v85_s0regulator-state-mem nldo-reg5 F Z l q q vdda_0v75_s0regulator-state-mem i2c@2ac50000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Yui $i2cpclk Zdefault+okayrtc@51haoyu,hym85634Qhym8563 default )i2c@2ac60000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Yvj $i2cpclk [default+ disabledi2c@2ac70000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Ywk $i2cpclk \default+ disabledi2c@2ac80000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Yxl $i2cpclk ]default+ disabledi2c@2ac90000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Yym $i2cpclk ^default+ disabledi2c@2aca0000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Yzn $i2cpclk _default+ disabledi2c@2acb0000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Y{o $i2cpclk `default+ disabledtimer@2acc0000,rockchip,rk3576-timerrockchip,rk3288-timer4* Y $pclktimer -watchdog@2ace0000 rockchip,rk3576-wdtsnps,dw-wdt4*Y $tclkpclk (spi@2acf0000(rockchip,rk3576-spirockchip,rk3066-spi4*Y$spiclkapb_pclk00/txrx t 7default + disabledspi@2ad00000(rockchip,rk3576-spirockchip,rk3066-spi4*Y$spiclkapb_pclk00/txrx u 7default + disabledspi@2ad10000(rockchip,rk3576-spirockchip,rk3066-spi4*Y$spiclkapb_pclkhh/txrx v 7default + disabledspi@2ad20000(rockchip,rk3576-spirockchip,rk3066-spi4*Y$spiclkapb_pclkhh/txrx w 7default + disabledspi@2ad30000(rockchip,rk3576-spirockchip,rk3066-spi4*Y$spiclkapb_pclk` ` /txrx x 7default + disabledserial@2ad40000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk00/txrx Ldefaultokayserial@2ad50000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk0 0 /txrx Ndefault disabledserial@2ad60000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk0 0 /txrx Odefault disabledserial@2ad70000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclkh h /txrx Pdefaultokayserial@2ad80000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclkh h /txrx Qdefault disabledserial@2ad90000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclkh h/txrx Rdefault disabledserial@2ada0000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk``/txrx Sdefault disabledserial@2adb0000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk`` /txrx Tdefault disabledserial@2adc0000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk` ` /txrx Udefault disabledadc@2ae00000.rockchip,rk3576-saradcrockchip,rk3588-saradc4*Y~}$saradcapb_pclk |H saradc-apb >okay Ptsadc@2ae70000rockchip,rk3576-tsadc4* {Y$tsadcapb_pclk_JKtsadc-apbtsadc \ r  +sensor@04  trimsensor@14  trimsensor@24  trimsensor@34  trimsensor@44  trimsensor@54  trimi2c@2ae80000(rockchip,rk3576-i2crockchip,rk3399-i2c4*Y|p $i2cpclk adefault+ disabledserial@2afc0000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk`` Vdefault disabledserial@2afd0000&rockchip,rk3576-uartsnps,dw-apb-uart4*Y$baudclkapb_pclk`` Wdefault disabledphy@2b020000rockchip,rk3576-mipi-dcphy4+Y $pclkref m_phyapbgrfs_phy< disabledaphy@2b050000rockchip,rk3576-naneng-combphy4+<Y95 $refapbpipe_9phyapb  okay$phy@2b060000rockchip,rk3576-naneng-combphy4+<Y:6  $refapbpipe_:phyapb  okay*phy@2b010000rockchip,rk3576-usbdp-phy4+<Y$refclkimmortalpclkutmi(initcmnlanepcs_apbpma_apb   $ disabled,hdmiphy@2b0000004rockchip,rk3576-hdptx-phyrockchip,rk3588-hdptx-phy4+ Y!$refapb apbinitcmnlane<okay[sram@3ff88000 mmio-sram4??+rkvdec-sram@04 :Zscmi-shmem@4010f000arm,scmi-shmem4@chosen ?serial0:1500000n8hdmi-conhdmi-connector K/aportendpointgregulator-vbus-5v0-typecregulator-fixed [ default lLK@ LK@ vbus5v0_typec nregulator-state-mem regulator-vcc-1v1-nldo-s3regulator-fixed F Z l  vcc_1v1_nldo_s3 nregulator-state-mem regulator-vcc-2v0-pldo-s3regulator-fixed F Z l  vcc_2v0_pldo_s3 nregulator-state-mem regulator-vcc-3v3-pcieregulator-fixed [ rdefault l2Z 2Z vcc_3v3_pcie y n(regulator-state-mem regulator-vcc-3v3-rtc-s5regulator-fixed F Z l2Z 2Z vcc_3v3_rtc_s5 nregulator-state-mem regulator-vcc-5v0-dcinregulator-fixed F Z lLK@ LK@ vcc_5v0_dcinregulator-state-mem regulator-vcc-5v0-deviceregulator-fixed F Z lLK@ LK@ vcc_5v0_device nregulator-state-mem regulator-vcc-5v0-hdmiregulator-fixed [ rdefault lLK@ LK@ vcc_5v0_hdmi nregulator-state-mem regulator-vcc-5v0-hostregulator-fixed [ default lLK@ LK@ vcc_5v0_host n.regulator-state-mem regulator-vcc-5v0-sysregulator-fixed F Z lLK@ LK@ vcc_5v0_sys nregulator-state-mem leds gpio-ledsdefaultgreen-led  =heartbeat  heartbeat compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9serial10serial11spi0spi1spi2spi3spi4mmc0mmc1clock-frequencyclock-output-names#clock-cellscpudevice_typeregenable-methodcapacity-dmips-mhzclocksoperating-points-v2dynamic-power-coefficientcpu-idle-states#cooling-cellscpu-supplyphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmemsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-dairockchip,grfrangesgpio-controllergpio-rangesinterruptsinterrupt-controller#gpio-cells#interrupt-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereg-namesbus-rangeclock-namesdma-coherentinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-ib-windowsnum-viewportnum-ob-windowsnum-lanesphysphy-namespower-domainsresetsreset-namespinctrl-namespinctrl-0reset-gpiosvpcie3v3-supplydr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,parkmode-disable-hs-quirksnps,parkmode-disable-ss-quirksnps,dis_rxdet_inp3_quirk#phy-cellsphy-supply#reset-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratesreg-shiftreg-io-widthdmas#power-domain-cellspm_qosmali-supplyiommussramrockchip,disable-mmu-reset#iommu-cellsrockchip,pmuremote-endpointdma-namesrockchip,sai-rx-route#sound-dai-cellssound-name-prefixrockchip,sai-tx-routerockchip,vo-grfrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplysupports-cqefull-pwr-cycle-in-suspendmmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablebitsarm,pl330-periph-burst#dma-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplyfunctionregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-nameregulator-enable-ramp-delayregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendwakeup-sourcenum-cs#io-channel-cellsvref-supply#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritynvmem-cellsnvmem-cell-namesrockchip,pipe-grfrockchip,pipe-phy-grfrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfpoolstdout-pathhdmi-pwr-supplyenable-active-highvin-supplystartup-delay-uscolorlinux,default-trigger