Ð þíú×8îX( î  ,radxa,rock-3brockchip,rk35687Radxa ROCK 3Baliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe2a0000ç/ethernet@fe010000ñ/mmc@fe310000ö/mmc@fe2b0000û/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 &psci4€A@S€`€m@€Œ�±¼ cpu@100cpu,arm,cortex-a55 &psci4€A@S€`€m@€Œ�±¼ cpu@200cpu,arm,cortex-a55 &psci4€A@S€`€m@€Œ�±¼ cpu@300cpu,arm,cortex-a55 &psci4€A@S€`€m@€Œ�±¼ l3-cache,cacheÄÐ6C@U¼display-subsystem,rockchip,display-subsystemÞfirmwarescmi ,arm,scmi-smcä‚ï protocol@14 õ¼hdmi-sound,simple-audio-cardHDMIi2s2Lokaysimple-audio-card,codecSsimple-audio-card,cpuS pmu,arm,cortex-a55-pmu0]äåæçh psci ,arm,psci-1.0-smcreserved-memory {shmem@10f000,arm,scmi-shmem ð‚¼timer,arm,armv8-timer0]   ‰xin24m ,fixed-clock n6°xin24mõ¼xin32k ,fixed-clock €°xin32kÃÍdefaultõsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü@›œ�Ûsatapmaliverxoob ]_ç ìsata-phyö Ldisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü€ ¡¢Ûsatapmaliverxoob ]`ç ìsata-phyö Ldisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3 üÀ@ ]©¦§¥Ûref_clksuspend_clkbus_clkotg utmi_wide'”.Lokay çìusb2-phyusb3-phyGusb@fd000000,rockchip,rk3568-dwc3snps,dwc3 ý@ ]ª©ª¨Ûref_clksuspend_clkbus_clkhost çìusb2-phyusb3-phy utmi_wide'•.Lokayinterrupt-controller@fd400000 ,arm,gic-v3  ý@ýF ] NctýA~(‰{ ˜¼msi-controller@fd440000,arm,gic-v3-its ýD˜‰¨¼iusb@fd800000 ,generic-ehci ý€ ]‚½¾¼çìusbLokayusb@fd840000 ,generic-ohci ý„ ]ƒ½¾¼çìusbLokayusb@fd880000 ,generic-ehci ýˆ ]…¿À¼çìusb Ldisabledusb@fd8c0000 ,generic-ohci ýŒ ]†¿À¼çìusb Ldisabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd ý¼gio-domains&,rockchip,rk3568-pmu-io-voltage-domainLokay³ÁÏÝëù#syscon@fdc50000 ýÅ ,rockchip,rk3568-pipe-grfsyscon¼µsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd ýƼ syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon ýȼ¶syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon ýɼ·syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon ýÊ€¼¸syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon ýÊ€€¼»clock-controller@fdd00000,rockchip,rk3568-pmucru ýÐõ1¼clock-controller@fdd20000,rockchip,rk3568-cru ýÒÛxin24mõ1> N€G†Œ ëÂcz ¼i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c ýÔ ].- Ûi2cpclkÃ!Ídefault Lokayregulator@1c ,tcs,tcs4525 ‡¤vdd_cpu³ÇÙ 5ñŒ0 ü"¼regulator-state-mem)pmic@20,rockchip,rk809 >Hc–õHÛmclk°rk809-clkout1rk809-clkout2#]ÍdefaultÃ$%BSky&…&‘&�&©&µ&Á&Í&Ù&¼ßregulatorsDCDC_REG1 ¤vdd_logic³ÇåÙ¡ ñ™p qregulator-state-mem)DCDC_REG2¤vdd_gpu³ÇåÙ¡ ñ™p q¼Hregulator-state-mem)DCDC_REG3¤vcc_ddr³Çåregulator-state-memüDCDC_REG4¤vdd_npuåÙ¡ ñ™p qregulator-state-mem)DCDC_REG5¤vcc_1v8³ÇÙw@ñw@¼regulator-state-mem)LDO_REG1¤vdda0v9_imageÙ » ñ » ¼cregulator-state-mem)LDO_REG2 ¤vdda_0v9³ÇÙ » ñ » regulator-state-mem)LDO_REG3 ¤vdda0v9_pmu³ÇÙ » ñ » regulator-state-memü » LDO_REG4 ¤vccio_acodec³ÇÙ2Z ñ2Z ¼regulator-state-mem)LDO_REG5 ¤vccio_sd³ÇÙw@ñ2Z ¼regulator-state-mem)LDO_REG6 ¤vcc3v3_pmu³ÇÙ2Z ñ2Z ¼regulator-state-memü2Z LDO_REG7 ¤vcca_1v8³ÇÙw@ñw@¼¨regulator-state-mem)LDO_REG8 ¤vcca1v8_pmu³ÇÙw@ñw@regulator-state-memüw@LDO_REG9¤vcca1v8_imageÙw@ñw@¼dregulator-state-mem)SWITCH_REG1¤vcc_3v3³Ç¼regulator-state-mem)SWITCH_REG2 ¤vcc3v3_sd³Ç¼oregulator-state-mem)eeprom@50,belling,bl24c16aatmel,24c16 P09C&serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart ýÕ ]t ,Ûbaudclkapb_pclkN''Ã(ÍdefaultS` Ldisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý× 0 ÛpwmpclkÃ)Ídefaultj Ldisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý× 0 ÛpwmpclkÃ*Ídefaultj Ldisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý×  0 ÛpwmpclkÃ+Ídefaultj Ldisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý×0 0 ÛpwmpclkÃ,Ídefaultj Ldisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd ýÙpower-controller!,rockchip,rk3568-power-controlleru ¼power-domain@7 ‰-upower-domain@8 ÌÍ ‰./0upower-domain@9 ÚÛÜ ‰123upower-domain@10 ñò‰456789upower-domain@11 í‰:upower-domain@13 ‰;upower-domain@14  ‰<=>upower-domain@15  ‰?@ABCDEFugpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost ýæ@$]()' �jobmmugpuÛgpubusLokay�G H¼¥video-codec@fdea0400,rockchip,rk3568-vpu ýê ]‹�vdpuîï Ûaclkhclk¬I iommu@fdea0800,rockchip,rk3568-iommu ýê@ ]Š Ûaclkifaceîï ³¼Irga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ýë€ ]ZóôõÛaclkhclksclk'&$% Àcoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu ýî ]@ýþ Ûaclkhclk¬J iommu@fdee0800,rockchip,rk3568-iommu ýî@ ]?ýþ Ûaclkiface ³¼Jvideo-capture@fdfe0000,rockchip,rk3568-vicap ýþ ]’>ÐNᣠÎÏÐÑÛaclkhclkdclkiclk¬K('÷øùûúÀarsthrstdrstprstirstz  Ldisabledports port@0 port@1 iommu@fdfe0800,rockchip,rk3568-iommu ýþ ]’ÎÏ Ûaclkiface³Ì Ldisabled¼Kmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ@ ]d ÁÂŽ�Ûbiuciuciu-driveciu-sampleçòðÑ€'ëÀreset Ldisabled (>LIÍdefault ÃMNOWePqethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a þ] �macirqeth_wake_irq@†‰‰ÇÃĉÈWÛstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref'ì Àstmmacethz ~QŽŸR²SÅLokay>‰†c‡ÅÎinputÛT ærgmii-idïÍdefaultÃUVWXYZmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22 úN  ÃP [¼Tstmmac-axi-config(2B¼Qrx-queues-configR¼Rqueue0tx-queues-configh¼Squeue0vop@fe040000  þ0þ@~vopgamma-lut ]”(ÝÞßàá%Ûaclkhclkdclk_vp0dclk_vp1dclk_vp2¬\ z Lokay,rockchip,rk3568-vop>ßàcports ¼port@0  endpoint@2 ˆ]¼eport@1  port@2  iommu@fe043e00,rockchip,rk3568-iommu  þ>þ? ]”ÝÞ Ûaclkiface³ Lokay¼\dsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi þ ]DÛpclkèìdphyç^ Àapb'z  Ldisabledports port@0 port@1 dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi þ ]EÛpclkéìdphyç_ Àapb'z  Ldisabledports port@0 port@1 hdmi@fe0a0000,rockchip,rk3568-dw-hdmi þ  ]-(æç“(ÚÛiahbisfrcecrefÍdefault Ã`ab Sz BLokay˜c¨d¼ports port@0 endpointˆe¼]port@1 endpointˆf¼Ùqos@fe128000,rockchip,rk3568-qossyscon þ€ ¼-qos@fe138080,rockchip,rk3568-qossyscon þ€€ ¼<qos@fe138100,rockchip,rk3568-qossyscon þ� ¼=qos@fe138180,rockchip,rk3568-qossyscon þ�€ ¼>qos@fe148000,rockchip,rk3568-qossyscon þ€ ¼.qos@fe148080,rockchip,rk3568-qossyscon þ€€ ¼/qos@fe148100,rockchip,rk3568-qossyscon þ� ¼0qos@fe150000,rockchip,rk3568-qossyscon þ ¼:qos@fe158000,rockchip,rk3568-qossyscon þ€ ¼4qos@fe158100,rockchip,rk3568-qossyscon þ� ¼5qos@fe158180,rockchip,rk3568-qossyscon þ�€ ¼6qos@fe158200,rockchip,rk3568-qossyscon þ‚ ¼7qos@fe158280,rockchip,rk3568-qossyscon þ‚€ ¼8qos@fe158300,rockchip,rk3568-qossyscon þƒ ¼9qos@fe180000,rockchip,rk3568-qossyscon þ qos@fe190000,rockchip,rk3568-qossyscon þ ¼?qos@fe190280,rockchip,rk3568-qossyscon þ€ ¼Cqos@fe190300,rockchip,rk3568-qossyscon þ ¼Dqos@fe190380,rockchip,rk3568-qossyscon þ€ ¼Eqos@fe190400,rockchip,rk3568-qossyscon þ ¼Fqos@fe198000,rockchip,rk3568-qossyscon þ€ ¼;qos@fe1a8000,rockchip,rk3568-qossyscon þ€ ¼1qos@fe1a8080,rockchip,rk3568-qossyscon þ€€ ¼2qos@fe1a8100,rockchip,rk3568-qossyscon þ� ¼3dfi@fe230000,rockchip,rk3568-dfi þ# ] ¸gpcie@fe260000,rockchip,rk3568-pcie0 À@þ&ô~dbiapbconfig<]KJIHG�syspmcmsglegacyerrÅ(�‚ƒ„…$Ûaclk_mstaclk_slvaclk_dbipclkauxpcicÏ`âhhhhð    .i 6ç ìpcie-phyT{ôôô ô à@'¡Àpipe LokayÍdefaultÃj [ @Plegacy-interrupt-controllercN ]H¼hmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ+@ ]b °±Š‹Ûbiuciuciu-driveciu-sampleçòðÑ€'ÔÀresetLokay  PÍdefaultÃklmneoqmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ,@ ]c ²³Œ�Ûbiuciuciu-driveciu-sampleçòðÑ€'ÖÀreset Ldisabledspi@fe300000 ,rockchip,sfc þ0@ ]exvÛclk_sfchclk_sfcÃpÍdefaultLokay flash@0,jedec,spi-nor  [2ê m ~mmc@fe310000,rockchip,rk3568-dwcmshc þ1 ]>{}N ëÂn6(|zy{}ÛcorebusaxiblocktimerLokay �ò ë ¡IÍdefaultÃqrsteqrng@fe388000,rockchip,rk3568-rng þ8€@po Ûcoreahb'mLokayi2s@fe400000,rockchip,rk3568-i2s-tdm þ@ ]4>=ANFÏqFÏq?C9Ûmclk_txmclk_rxhclkNu °tx'PQ Àtx-mrx-mz BLokay¼ i2s@fe410000,rockchip,rk3568-i2s-tdm þA ]5>EINFÏqFÏqGK:Ûmclk_txmclk_rxhclkNuu °rxtx'RS Àtx-mrx-mz ÍdefaultÃvwxyBLokay º¼ái2s@fe420000,rockchip,rk3568-i2s-tdm þB ]6>MNFÏqOO;Ûmclk_txmclk_rxhclkNuu °txrx'TÀtx-mz ÍdefaultÃz{|}B Ldisabledi2s@fe430000,rockchip,rk3568-i2s-tdm þC ]7SW<Ûmclk_txmclk_rxhclkNuu °txrx'UV Àtx-mrx-mz B Ldisabledpdm@fe440000,rockchip,rk3568-pdm þD ]LZYÛpdm_clkpdm_hclkNu  °rxÃ~€�‚ƒÍdefault'XÀpdm-mB Ldisabledspdif@fe460000,rockchip,rk3568-spdif þF ]f Ûmclkhclk_\Nu °txÍdefaultÄB Ldisableddma-controller@fe530000,arm,pl330arm,primecell þS@]  Õ  Ûapb_pclk ì¼'dma-controller@fe550000,arm,pl330arm,primecell þU@] Õ  Ûapb_pclk ì¼ui2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þZ ]/HG Ûi2cpclkÃ…Ídefault  Ldisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ[ ]0JI Ûi2cpclkÆÍdefault  Ldisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ\ ]1LK Ûi2cpclkÇÍdefault  Ldisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ] ]2NM Ûi2cpclkÈÍdefault  Ldisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ^ ]3PO Ûi2cpclkÉÍdefault Lokayrtc@51,haoyu,hym8563 Q#]õ °rtcic_32koutÍdefaultÊkwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt þ` ]• Ûtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi þa ]gRQÛspiclkapb_pclkN'' °txrxÍdefault ËŒ�  Ldisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi þb ]hTSÛspiclkapb_pclkN'' °txrxÍdefault ÃŽ��  Ldisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi þc ]iVUÛspiclkapb_pclkN'' °txrxÍdefault Ñ’“  Ldisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi þd ]jXWÛspiclkapb_pclkN'' °txrxÍdefault Ô•–  Ldisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart þe ]uÛbaudclkapb_pclkN''×ÍdefaultS` Ldisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart þf ]v# Ûbaudclkapb_pclkN''ØÍdefaultS`Lokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart þg ]w'$Ûbaudclkapb_pclkN''ÙÍdefaultS` Ldisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart þh ]x+(Ûbaudclkapb_pclkN'' ÚÍdefaultS` Ldisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart þi ]y/,Ûbaudclkapb_pclkN' ' ÛÍdefaultS` Ldisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart þj ]z30Ûbaudclkapb_pclkN' ' ÜÍdefaultS` Ldisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart þk ]{74Ûbaudclkapb_pclkN''Ã�ÍdefaultS` Ldisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart þl ]|;8Ûbaudclkapb_pclkN'' ÞŸ ÍdefaultS` Ldisabled ÷serial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart þm ]}?<Ûbaudclkapb_pclkN''áÍdefaultS` Ldisabledthermal-zonescpu-thermal d è +¢tripscpu_alert0 ;p GÐpassive¼£cpu_alert1 ;$ø GÐpassivecpu_crit ;s GÐ criticalcooling-mapsmap0 R£0 W ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal  è +¢tripsgpu-threshold ;p GÐpassivegpu-target ;$ø GÐpassive¼¤gpu-crit ;s GÐ criticalcooling-mapsmap0 R¤ W¥ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadc þq ]s>Nf@ ®`Ûtsadcapb_pclk'�‚×z  fsÍdefaultsleepæ }§ ‡Lokay � ´¼¢saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc þr ]]Ûsaradcapb_pclk'€ Àsaradc-apb ÏLokay á¨pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þnZY ÛpwmpclkéÍdefaultj Ldisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þnZY ÛpwmpclkêÍdefaultj Ldisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þn ZY ÛpwmpclkëÍdefaultj Ldisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þn0ZY ÛpwmpclkìÍdefaultj Ldisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo]\ ÛpwmpclkíÍdefaultj Ldisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo]\ ÛpwmpclkîÍdefaultj Ldisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo ]\ ÛpwmpclkïÍdefaultj Ldisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo0]\ ÛpwmpclkðÍdefaultj Ldisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp`_ ÛpwmpclkñÍdefaultj Ldisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp`_ ÛpwmpclkòÍdefaultj Ldisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp `_ ÛpwmpclkóÍdefaultj Ldisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp0`_ ÛpwmpclkôÍdefaultj Ldisabledphy@fe830000,rockchip,rk3568-naneng-combphy þƒ"} Ûrefapbpipe>"Nõá'ÇÀphy íµ ÿ¶ Lokay¼phy@fe840000,rockchip,rk3568-naneng-combphy þ„%~ Ûrefapbpipe>%Nõá'ÉÀphy íµ ÿ· Lokay¼phy@fe870000,rockchip,rk3568-csi-dphy þ‡yÛpclk 'ºÀapbz  Ldisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy þ… Ûrefpclkz  Àapb'» Ldisabled¼^mipi-dphy@fe860000,rockchip,rk3568-dsi-dphy þ† Ûrefpclk{  Àapb'¼ Ldisabled¼_usb2phy@fe8a0000,rockchip,rk3568-usb2phy þŠÛphyclk°clk_usbphy0_480m ]‡ ¸õLokay¼host-port Lokayï¹¼otg-port Lokayﺼusb2phy@fe8b0000,rockchip,rk3568-usb2phy þ‹Ûphyclk°clk_usbphy1_480m ]ˆ »õLokayhost-port  Ldisabled¼otg-port Lokayï¹¼pinctrl,rockchip,rk3568-pinctrlz ¸g {¼¼gpio@fdd60000,rockchip,gpio-bank ýÖ ]!.  0 @¼  LNc¼#gpio@fe740000,rockchip,gpio-bank þt ]"cd 0 @¼  LNcgpio@fe750000,rockchip,gpio-bank þu ]#ef 0 @¼@  LNc¼Êgpio@fe760000,rockchip,gpio-bank þv ]$gh 0 @¼`  LNc¼[gpio@fe770000,rockchip,gpio-bank þw ]%ij 0 @¼€  LNcpcfg-pull-up X¼¿pcfg-pull-none e¼½pcfg-pull-none-drv-level-1 e r¼Ápcfg-pull-none-drv-level-2 e r¼Àpcfg-pull-none-drv-level-3 e r¼Äpcfg-pull-up-drv-level-1 X r¼Ãpcfg-pull-up-drv-level-2 X r¼¾pcfg-pull-none-smt e �¼Âacodecaudiopwmbt656bt1120camcan0can0m0-pins – ½ ½¼Õcan1can1m0-pins –½½¼Öcan2can2m0-pins – ½ ½¼×cifclk32kclk32k-out0 –½¼cpuebcedpdpemmcemmc-bus8€ – ¾ ¾¾¾¾¾¾¾¼qemmc-clk –¾¼remmc-cmd –¾¼semmc-datastrobe –½¼teth0eth1flashfspifspi-pins` –½½½½½½¼pgmac0gmac0-miim –½½¼Ïgmac0-clkinout –½¼Ôgmac0-rx-bus20 –½½½¼Ñgmac0-tx-bus20 – À À ½¼Ðgmac0-rgmii-clk –½Á¼Ògmac0-rgmii-bus@ –½½ÀÀ¼Ógmac1gmac1m1-miim –½½¼Ugmac1m1-clkinout –½¼Zgmac1m1-rx-bus20 –½½ ½¼Wgmac1m1-tx-bus20 –ÀÀ½¼Vgmac1m1-rgmii-clk –½Á¼Xgmac1m1-rgmii-bus@ –½½ÀÀ¼Ygpuhdmitxhdmitxm0-cec –½¼bhdmitx-scl –½¼`hdmitx-sda –½¼ai2c0i2c0-xfer –  Â¼!i2c1i2c1-xfer –  Â¼…i2c2i2c2m0-xfer – ¼†i2c3i2c3m0-xfer –¼‡i2c4i2c4m0-xfer –  ¼ˆi2c5i2c5m0-xfer –  ¼‰i2s1i2s1m0-lrcktx –½¼wi2s1m0-mclk –½¼%i2s1m0-sclktx –½¼vi2s1m0-sdi0 – ½¼xi2s1m0-sdo0 –½¼yi2s2i2s2m0-lrcktx –½¼{i2s2m0-sclktx –½¼zi2s2m0-sdi –½¼|i2s2m0-sdo –½¼}i2s3ispjtaglcdcmcunpupcie20pcie20m1-pins0 –½½½¼jpcie30x1pcie30x2pcie30x2m1-pins0 –½½½¼Épdmpdmm0-clk –½¼~pdmm0-clk1 –½¼pdmm0-sdi0 – ½¼€pdmm0-sdi1 – ½¼�pdmm0-sdi2 – ½¼‚pdmm0-sdi3 –½¼ƒpmicpmic-int-l –¿¼$pmupwm0pwm0m0-pins –½¼)pwm1pwm1m0-pins –½¼*pwm2pwm2m0-pins –½¼+pwm3pwm3-pins –½¼,pwm4pwm4-pins –½¼©pwm5pwm5-pins –½¼ªpwm6pwm6-pins –½¼«pwm7pwm7-pins –½¼¬pwm8pwm8m0-pins – ½¼­pwm9pwm9m0-pins – ½¼®pwm10pwm10m0-pins – ½¼¯pwm11pwm11m0-pins –½¼°pwm12pwm12m0-pins –½¼±pwm13pwm13m0-pins –½¼²pwm14pwm14m0-pins –½¼³pwm15pwm15m0-pins –½¼´refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ –¾¾¾¾¼ksdmmc0-clk –¾¼lsdmmc0-cmd –¾¼msdmmc0-det –¿¼nsdmmc1sdmmc2sdmmc2m0-bus4@ –¾¾¾¾¼Msdmmc2m0-clk –¾¼Nsdmmc2m0-cmd –¾¼Ospdifspdifm0-tx –½¼„spi0spi0m0-pins0 – ½½½¼�spi0m0-cs0 –½¼‹spi0m0-cs1 –½¼Œspi1spi1m0-pins0 – ½½½¼�spi1m0-cs0 –½¼Žspi1m0-cs1 –½¼�spi2spi2m0-pins0 –½½½¼“spi2m0-cs0 –½¼‘spi2m0-cs1 –½¼’spi3spi3m0-pins0 – ½½ ½¼–spi3m0-cs0 –½¼”spi3m0-cs1 –½¼•tsadctsadc-shutorg –½¼¦tsadc-pin –½¼§uart0uart0-xfer –¿¿¼(uart1uart1m0-xfer – ¿ ¿¼—uart2uart2m0-xfer –¿¿¼˜uart3uart3m0-xfer –¿¿¼™uart4uart4m0-xfer –¿¿¼šuart5uart5m0-xfer –¿¿¼›uart6uart6m0-xfer –¿¿¼œuart7uart7m0-xfer –¿¿¼�uart8uart8m0-xfer –¿¿¼žuart8m0-ctsn – ½¼Ÿuart8m0-rtsn – ½¼ uart9uart9m0-xfer –¿¿¼¡vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-reg-on-h – ½bt-wake-host-h – ½host-wake-bt-h – ½ir-receiverpwm3-ir –½¼Úledsled –½¼Ûpciepcie-pwren-h –½¼Ürtcrtcic-int-l –¿¼Šusbusb-host-pwren-h –½¼Ýusb-otg-pwren-h –½¼Þwifiwifi-reg-on-h –½¼àwifi-wake-host-h –½opp-table-0,operating-points-v2 ¤¼opp-408000000 ¯Q– ¶ øP øPŒ0 Äœ@opp-600000000 ¯#ÃF ¶ øP øPŒ0 Äœ@opp-816000000 ¯0£, ¶ øP øPŒ0 Äœ@ Õopp-1104000000 ¯AÍ´ ¶ »  » Œ0 Äœ@opp-1416000000 ¯Tfr ¶£è£èŒ0 Äœ@opp-1608000000 ¯_Ø" ¶ÈàÈàŒ0 Äœ@opp-1800000000 ¯kIÒ ¶Œ0Œ0Œ0 Äœ@opp-1992000000 ¯v»‚ ¶Œ0Œ0Œ0 Äœ@opp-table-1,operating-points-v2¼Gopp-200000000 ¯ ë ¶ øP øPB@opp-300000000 ¯á£ ¶ øP øPB@opp-400000000 ¯ׄ ¶ øP øPB@opp-600000000 ¯#ÃF ¶ »  » B@opp-700000000 ¯)¹' ¶~ð~ðB@opp-800000000 ¯/¯ ¶B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü–—˜Ûsatapmaliverxoob ]^ç ìsata-phyö Ldisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsyscon ýǼØqos@fe190080,rockchip,rk3568-qossyscon þ€ ¼@qos@fe190100,rockchip,rk3568-qossyscon þ ¼Aqos@fe190200,rockchip,rk3568-qossyscon þ ¼Bsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsyscon ýË€¼Åphy@fe8c0000,rockchip,rk3568-pcie3-phy þŒ &'wÛrefclk_mrefclk_npclk'¾Àphy áÅLokay¼Çpcie@fe270000,rockchip,rk3568-pcie Å(ˆ‰Š‹Œ$Ûaclk_mstaclk_slvaclk_dbipclkauxpci<] Ÿž�œ�syspmcmsglegacyerrcÏ`âÆÆÆÆð    .i 6çÇ ìpcie-phy0 À@@þ'òT{òòò ò à@@@~dbiapbconfig'±Àpipe Ldisabledlegacy-interrupt-controllerNc ]�¼Æpcie@fe280000,rockchip,rk3568-pcie Å /(��‘’“$Ûaclk_mstaclk_slvaclk_dbipclkauxpci<]¥¤£¢¡�syspmcmsglegacyerrcÏ`âÈÈÈÈð    . i  6çÇ ìpcie-phy0 À€@þ(ðT{ððð ð à€€@~dbiapbconfig'ÁÀpipeLokayÍdefaultÃÉ Êlegacy-interrupt-controllerNc ]¢¼Èethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a þ*]�macirqeth_wake_irq@‚……¸´µ…¹WÛstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref'× Àstmmacethz ~ËŽŸÌ²ÍÅLokay>…‚cƒ¶ÎinputÛÎ ærgmii-idïÍdefaultÃÏÐÑÒÓÔmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22 úN  ÃP [¼Îstmmac-axi-config(2B¼Ërx-queues-configR¼Ìqueue0tx-queues-configh¼Íqueue0can@fe570000,rockchip,rk3568v2-canfd þW ]A@ Ûbaudpclk'UT ÀcoreapbÍdefaultÃÕ Ldisabledcan@fe580000,rockchip,rk3568v2-canfd þX ]CB Ûbaudpclk'WV ÀcoreapbÍdefaultÃÖ Ldisabledcan@fe590000,rockchip,rk3568v2-canfd þY ]ED Ûbaudpclk'YX ÀcoreapbÍdefaultÃ× Ldisabledphy@fe820000,rockchip,rk3568-naneng-combphy þ‚| Ûrefapbpipe>Nõá'ÅÀphy íµ ÿØ Lokay¼chosen òserial2:1500000n8hdmi-con,hdmi-connectoraportendpointˆÙ¼fir-receiver,gpio-ir-receiver "#ÍdefaultÃÚleds ,gpio-ledsÍdefaultÃÛled-0 þ on heartbeat "# heartbeatregulator-3v3-vcc-pi6c-03,regulator-fixed 1 "#ÍdefaultÃܤvcc3v3_pi6c_03³ÇÙ2Z ñ2Z  D'"regulator-3v3-vcc-sys,regulator-fixed ¤vcc3v3_sys³ÇÙ2Z ñ2Z "¼&regulator-3v3-vcc-sys2,regulator-fixed ¤vcc3v3_sys2³ÇÙ2Z ñ2Z "¼Pregulator-5v0-vcc-sys,regulator-fixed ¤vcc5v0_sys³ÇÙLK@ñLK@¼"regulator-5v0-vcc-usb-host,regulator-fixed 1 "#ÍdefaultÃݤvcc5v0_usb_hostÙLK@ñLK@"¼¹regulator-5v0-vcc-usb-otg,regulator-fixed 1 "#ÍdefaultÃÞ¤vcc5v0_usb_otgÙLK@ñLK@"¼ºsdio-pwrseq,mmc-pwrseq-simpleß Ûext_clockÍdefaultÃà Ud lLK@ [¼Lsound,simple-audio-cardi2s Analog RK8092simple-audio-card,cpuSásimple-audio-card,codecSß interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspend#sound-dai-cellssystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltpagesizeread-onlyvcc-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modephy-supplyreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplydisable-wpspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthcap-mmc-highspeedmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfstdout-pathcolordefault-statefunctionlinux,default-triggerenable-active-highstartup-delay-uspost-power-on-delay-mspower-off-delay-us