Ð þíóÂ8çˆ( :çP %,hardkernel,odroid-m1rockchip,rk35687Hardkernel ODROID-M1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fe5c0000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fdd40000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fe650000�/serial@fdd50000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe2a0000ç/mmc@fe310000ì/mmc@fe2b0000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@100ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@200ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@300ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ l3-cache,cacheµÁ'4@F­display-subsystem,rockchip,display-subsystemÏfirmwarescmi ,arm,scmi-smcÕ‚à protocol@14ýæ­hdmi-sound,simple-audio-cardóHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NäåæçY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemýðs­timer,arm,armv8-timer0N   zxin24m ,fixed-clock‘n6¡xin24mæ­xin32k ,fixed-clock‘€¡xin32k´¾defaultæsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�Ìsatapmaliverxoob N_Ø Ýsata-phyçù =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢Ìsatapmaliverxoob N`Ø Ýsata-phyçù=okayusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ N©¦§¥Ìref_clksuspend_clkbus_clkhost utmi_wideù”=okay ØÝusb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ Nª©ª¨Ìref_clksuspend_clkbus_clkhost ØÝusb2-phyusb3-phy utmi_wideù•=okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF N 8M^ýAh(sl ‚­msi-controller@fd440000,arm,gic-v3-itsýýD‚s’­Zusb@fd800000 ,generic-ehciýý€ N‚½¾¼ØÝusb=okayusb@fd840000 ,generic-ohciýý„ Nƒ½¾¼ØÝusb=okayusb@fd880000 ,generic-ehciýýˆ N…¿À¼ØÝusb=okayusb@fd8c0000 ,generic-ohciýýŒ N†¿À¼ØÝusb=okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýý­Xio-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay�«¹ÇÕãñÿ syscon@fdc50000ýýÅ ,rockchip,rk3568-pipe-grfsyscon­£syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆ­syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈ­¤syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉ­¦syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€­§syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€­©clock-controller@fdd00000,rockchip,rk3568-pmucruýýÐæ­clock-controller@fdd20000,rockchip,rk3568-cruýýÒÌxin24mæ( 8€G†Œ ëÂMd­i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ N.- Ìi2cpclk´ ¾default =okayregulator@1c ,tcs,tcs4525ýqŽvdd_cpu�±à 5ÛŒ0óü!­regulator-state-mempmic@20,rockchip,rk809ý "N(HM–æÌmclkH¾default´#$,DU!a!m!y!…!‘!�!©!µ!Á­ÎregulatorsDCDC_REG1 Žvdd_logic�±Ïá Û™póqregulator-state-memDCDC_REG2Žvdd_gpu�Ïá Û™póq­Fregulator-state-memDCDC_REG3Žvcc_ddr�±Ïregulator-state-memæDCDC_REG4Žvdd_npuÏá Û™póqregulator-state-memDCDC_REG5Žvcc_1v8�±Ãw@Ûw@­regulator-state-memLDO_REG1Žvdda0v9_image�à » Û » ­Tregulator-state-memLDO_REG2 Žvdda_0v9�±à » Û » regulator-state-memLDO_REG3 Žvdda0v9_pmu�±à » Û » regulator-state-memæþ » LDO_REG4 Žvccio_acodec�±Ã2Z Û2Z ­regulator-state-memLDO_REG5 Žvccio_sdÃw@Û2Z ­regulator-state-memLDO_REG6 Žvcc3v3_pmu�±Ã2Z Û2Z ­regulator-state-memæþ2Z LDO_REG7 Žvcca_1v8�±Ãw@Ûw@­–regulator-state-memLDO_REG8 Žvcca1v8_pmu�±Ãw@Ûw@regulator-state-memæþw@LDO_REG9Žvcca1v8_image�Ãw@Ûw@­Uregulator-state-memSWITCH_REG1Žvcc_3v3�±­regulator-state-memSWITCH_REG2 Žvcc3v3_sd­_regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ Nt ,Ìbaudclkapb_pclk%%´&¾default, =disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´'¾default6 =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´(¾default6 =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 Ìpwmpclk´)¾default6 =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 Ìpwmpclk´*¾default6 =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controllerA ­power-domain@7ýU+Apower-domain@8ýÌÍ U,-.Apower-domain@9ý ÚÛÜ U/01Apower-domain@10ý ñòU234567Apower-domain@11ý íU8Apower-domain@13ý U9Apower-domain@14ý U:;<Apower-domain@15ý U=>?@ABCDAgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$N()' \jobmmugpuÌgpubusù=okayŽElF­“video-codec@fdea0400,rockchip,rk3568-vpuýýê N‹\vdpuîï ÌaclkhclkxGù iommu@fdea0800,rockchip,rk3568-iommuýýê@ NŠ Ìaclkifaceîïù ­Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýýë€ NZóôõÌaclkhclksclk&$% Œcoreaxiahbù video-codec@fdee0000,rockchip,rk3568-vepuýýî N@ýþ ÌaclkhclkxHù iommu@fdee0800,rockchip,rk3568-iommuýýî@ N?ýþ Ìaclkifaceù ­Hvideo-capture@fdfe0000,rockchip,rk3568-vicapýýþ N’(Ð8ᣠÎÏÐÑÌaclkhclkdclkiclkxIù(÷øùûúŒarsthrstdrstprstirstd =disabledports port@0ýport@1ýiommu@fdfe0800,rockchip,rk3568-iommuýýþ N’ÎÏ Ìaclkifaceù˜ =disabled­Immc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ Nd ÁÂŽ�Ìbiuciuciu-driveciu-sample³¾ðÑ€ëŒreset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþN \macirqeth_wake_irq@†‰‰ÇÃĉÈWÌstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refì ŒstmmacethdÌJÜíKL =disabledmdio,snps,dwmac-mdio stmmac-axi-config&6­Jrx-queues-configF­Kqueue0tx-queues-config\­Lqueue0vop@fe040000 ýþ0þ@rvopgamma-lut N”(ÝÞßàá%Ìaclkhclkdclk_vp0dclk_vp1dclk_vp2xMù d=okay,rockchip,rk3568-vop(ßàMports ­port@0ý endpoint@2ý|N­Vport@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? N”ÝÞ Ìaclkifaceù =okay­Mdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NDÌpclkèÝdphyØOù Œapbd =disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NEÌpclkéÝdphyØPù Œapbd =disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  N-(æç“(ÚÌiahbisfrcecref¾default ´QRSù dD=okayŒTœU­ports port@0ýendpoint|V­Nport@1ýendpoint|W­Èqos@fe128000,rockchip,rk3568-qossysconýþ€ ­+qos@fe138080,rockchip,rk3568-qossysconýþ€€ ­:qos@fe138100,rockchip,rk3568-qossysconýþ� ­;qos@fe138180,rockchip,rk3568-qossysconýþ�€ ­<qos@fe148000,rockchip,rk3568-qossysconýþ€ ­,qos@fe148080,rockchip,rk3568-qossysconýþ€€ ­-qos@fe148100,rockchip,rk3568-qossysconýþ� ­.qos@fe150000,rockchip,rk3568-qossysconýþ ­8qos@fe158000,rockchip,rk3568-qossysconýþ€ ­2qos@fe158100,rockchip,rk3568-qossysconýþ� ­3qos@fe158180,rockchip,rk3568-qossysconýþ�€ ­4qos@fe158200,rockchip,rk3568-qossysconýþ‚ ­5qos@fe158280,rockchip,rk3568-qossysconýþ‚€ ­6qos@fe158300,rockchip,rk3568-qossysconýþƒ ­7qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ ­=qos@fe190280,rockchip,rk3568-qossysconýþ€ ­Aqos@fe190300,rockchip,rk3568-qossysconýþ ­Bqos@fe190380,rockchip,rk3568-qossysconýþ€ ­Cqos@fe190400,rockchip,rk3568-qossysconýþ ­Dqos@fe198000,rockchip,rk3568-qossysconýþ€ ­9qos@fe1a8000,rockchip,rk3568-qossysconýþ€ ­/qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ ­0qos@fe1a8100,rockchip,rk3568-qossysconýþ� ­1dfi@fe230000,rockchip,rk3568-dfiýþ# N ¬Xpcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôrdbiapbconfig<NKJIHG\syspmcmsglegacyerr¹(�‚ƒ„…$Ìaclk_mstaclk_slvaclk_dbipclkauxñpciMÃ`ÖYYYYäõ"Z*Ø Ýpcie-phyùTlôôô ô à@¡Œpipe  =disabledlegacy-interrupt-controllerM8 NH­Ymmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ Nb °±Š‹Ìbiuciuciu-driveciu-sample³¾ðÑ€ÔŒreset=okay4> O"X¾default´[\]^cp_|mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ Nc ²³Œ�Ìbiuciuciu-driveciu-sample³¾ðÑ€ÖŒreset =disabledspi@fe300000 ,rockchip,sfcýþ0@ NexvÌclk_sfchclk_sfc´`¾default=okay flash@0,jedec,spi-norý‰õ᛬partitions,fixed-partitions partition@0½SPLýpartition@e0000 ½U-Boot Envýpartition@100000½U-Bootý partition@300000½splashý0partition@400000 ½Filesystemý@Àmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 N({}8 ëÂn6(|zy{}Ìcorebusaxiblocktimer=okay4¾ ëÂþdefault´abcdep|rng@fe388000,rockchip,rk3568-rngýþ8€@po Ìcoreahbm=okayi2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ N4(=A8FÏqFÏq?C9Ìmclk_txmclk_rxhclkfÑtxPQ Œtx-mrx-mdD=okay­ i2s@fe410000,rockchip,rk3568-i2s-tdmýþA N5(EI8FÏqFÏqGK:Ìmclk_txmclk_rxhclkffÑrxtxRS Œtx-mrx-md¾default´ghijD=okayÛ­Íi2s@fe420000,rockchip,rk3568-i2s-tdmýþB N6(M8FÏqOO;Ìmclk_txmclk_rxhclkffÑtxrxTŒtx-md¾default´klmnD =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC N7SW<Ìmclk_txmclk_rxhclkffÑtxrxUV Œtx-mrx-mdD =disabledpdm@fe440000,rockchip,rk3568-pdmýþD NLZYÌpdm_clkpdm_hclkf Ñrx´opqrst¾defaultXŒpdm-mD =disabledspdif@fe460000,rockchip,rk3568-spdifýþF Nf Ìmclkhclk_\fÑtx¾default´uD =disableddma-controller@fe530000,arm,pl330arm,primecellýþS@N ö  Ìapb_pclk ­%dma-controller@fe550000,arm,pl330arm,primecellýþU@Nö  Ìapb_pclk ­fi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ N/HG Ìi2cpclk´v¾default  =disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ N0JI Ìi2cpclk´w¾default  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ N1LK Ìi2cpclk´x¾default  =disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] N2NM Ìi2cpclk´y¾default  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ N3PO Ìi2cpclk´z¾default  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` N• Ìtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa NgRQÌspiclkapb_pclk%%Ñtxrx¾default ´{|}  =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb NhTSÌspiclkapb_pclk%%Ñtxrx¾default ´~€  =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc NiVUÌspiclkapb_pclk%%Ñtxrx¾default ´�‚ƒ  =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd NjXWÌspiclkapb_pclk%%Ñtxrx¾default ´„…†  =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe NuÌbaudclkapb_pclk%%´‡¾default, =disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf Nv# Ìbaudclkapb_pclk%%´ˆ¾default,=okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg Nw'$Ìbaudclkapb_pclk%%´‰¾default, =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh Nx+(Ìbaudclkapb_pclk%% ´Š¾default, =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi Ny/,Ìbaudclkapb_pclk% % ´‹¾default, =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj Nz30Ìbaudclkapb_pclk% % ´Œ¾default, =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk N{74Ìbaudclkapb_pclk%%´�¾default, =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl N|;8Ìbaudclkapb_pclk%%´Ž¾default, =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm N}?<Ìbaudclkapb_pclk%%´�¾default, =disabledthermal-zonescpu-thermal d .è <�tripscpu_alert0 Lp XÐøpassive­‘cpu_alert1 L$ø XÐøpassivecpu_crit Ls XÐ øcriticalcooling-mapsmap0 c‘0 h ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal  .è <�tripsgpu-threshold Lp XÐøpassivegpu-target L$ø XÐøpassive­’gpu-crit Ls XÐ øcriticalcooling-mapsmap0 c’ h“ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq Ns(8f@ ®`Ìtsadcapb_pclk�‚×d ws¾defaultsleep´” Ž• ˜=okay ® Å­�saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr N]Ìsaradcapb_pclk€ Œsaradc-apb à=okay ò–pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´—¾default6 =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´˜¾default6 =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY Ìpwmpclk´™¾default6 =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY Ìpwmpclk´š¾default6 =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´›¾default6 =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´œ¾default6 =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ Ìpwmpclk´�¾default6 =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ Ìpwmpclk´ž¾default6 =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´Ÿ¾default6 =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´ ¾default6 =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ Ìpwmpclk´¡¾default6 =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ Ìpwmpclk´¢¾default6 =disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} Ìrefapbpipe("8õáÇŒphy þ£ ¤ &=okay 1¥­phy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ Ìrefapbpipe(%8õáÉŒphy þ£ ¦ &=okay­phy@fe870000,rockchip,rk3568-csi-dphyýþ‡yÌpclk &ºŒapbd =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… Ìrefpclkz &ù Œapb» =disabled­Omipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† Ìrefpclk{ &ù Œapb¼ =disabled­Pusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠÌphyclk¡clk_usbphy0_480m N‡ <§æ=okayhost-port &=okay 1¨­otg-port &=okay 1¥­usb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹Ìphyclk¡clk_usbphy1_480m Nˆ <©æ=okayhost-port &=okay 1¨­otg-port &=okay 1¨­pinctrl,rockchip,rk3568-pinctrld¬X l­ªgpio@fdd60000,rockchip,gpio-bankýýÖ N!.  L \ª  h8M­"gpio@fe740000,rockchip,gpio-bankýþt N"cd L \ª  h8Mgpio@fe750000,rockchip,gpio-bankýþu N#ef L \ª@  h8M­¸gpio@fe760000,rockchip,gpio-bankýþv N$gh L \ª`  h8M­Ãgpio@fe770000,rockchip,gpio-bankýþw N%ij L \ª€  h8M­Ïpcfg-pull-up t­­pcfg-pull-none �­«pcfg-pull-none-drv-level-1 � Ž­¯pcfg-pull-none-drv-level-2 � Ž­®pcfg-pull-none-drv-level-3 � Ž­²pcfg-pull-up-drv-level-1 t Ž­±pcfg-pull-up-drv-level-2 t Ž­¬pcfg-pull-none-smt � �­°acodecaudiopwmbt656bt1120camcan0can0m0-pins ² « «­Äcan1can1m0-pins ²««­Åcan2can2m0-pins ² « «­Æcifclk32kclk32k-out0 ²«­cpuebcedpdpemmcemmc-rstnout ²«­eemmc-bus8€ ² ¬ ¬¬¬¬¬¬¬­aemmc-clk ²¬­bemmc-cmd ²¬­cemmc-datastrobe ²«­deth0eth1flashfspifspi-dual-io-pins@ ²««««­`gmac0gmac0-miim ²««­¾gmac0-rx-bus20 ²«««­Àgmac0-tx-bus20 ² ® ® «­¿gmac0-rgmii-clk ²«¯­Ágmac0-rgmii-bus@ ²««®®­Âgmac1gpuhdmitxhdmitxm0-cec ²«­Shdmitx-scl ²«­Qhdmitx-sda ²«­Ri2c0i2c0-xfer ² ° °­ i2c1i2c1-xfer ² ° °­vi2c2i2c2m0-xfer ² °°­wi2c3i2c3m0-xfer ²°°­xi2c4i2c4m0-xfer ² ° °­yi2c5i2c5m0-xfer ² ° °­zi2s1i2s1m0-lrcktx ²«­hi2s1m0-mclk ²«­$i2s1m0-sclktx ²«­gi2s1m0-sdi0 ² «­ii2s1m0-sdo0 ²«­ji2s2i2s2m0-lrcktx ²«­li2s2m0-sclktx ²«­ki2s2m0-sdi ²«­mi2s2m0-sdo ²«­ni2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ²«­opdmm0-clk1 ²«­ppdmm0-sdi0 ² «­qpdmm0-sdi1 ² «­rpdmm0-sdi2 ² «­spdmm0-sdi3 ²«­tpmicpmic-int-l ²­­#pmupwm0pwm0m0-pins ²«­'pwm1pwm1m0-pins ²«­(pwm2pwm2m0-pins ²«­)pwm3pwm3-pins ²«­*pwm4pwm4-pins ²«­—pwm5pwm5-pins ²«­˜pwm6pwm6-pins ²«­™pwm7pwm7-pins ²«­špwm8pwm8m0-pins ² «­›pwm9pwm9m0-pins ² «­œpwm10pwm10m0-pins ² «­�pwm11pwm11m0-pins ²«­žpwm12pwm12m0-pins ²«­Ÿpwm13pwm13m0-pins ²«­ pwm14pwm14m0-pins ²«­¡pwm15pwm15m0-pins ²«­¢refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ²¬¬¬¬­[sdmmc0-clk ²¬­\sdmmc0-cmd ²¬­]sdmmc0-det ²­­^sdmmc1sdmmc2spdifspdifm0-tx ²«­uspi0spi0m0-pins0 ² «««­}spi0m0-cs0 ²«­{spi0m0-cs1 ²«­|spi1spi1m0-pins0 ² «««­€spi1m0-cs0 ²«­~spi1m0-cs1 ²«­spi2spi2m0-pins0 ²«««­ƒspi2m0-cs0 ²«­�spi2m0-cs1 ²«­‚spi3spi3m0-pins0 ² «« «­†spi3m0-cs0 ²«­„spi3m0-cs1 ²«­…tsadctsadc-shutorg ²«­”tsadc-pin ²«­•uart0uart0-xfer ²­­­&uart1uart1m0-xfer ² ­ ­­‡uart2uart2m0-xfer ²­­­ˆuart3uart3m0-xfer ²­­­‰uart4uart4m0-xfer ²­­­Šuart5uart5m0-xfer ²­­­‹uart6uart6m0-xfer ²­­­Œuart7uart7m0-xfer ²­­­�uart8uart8m0-xfer ²­­­Žuart9uart9m0-xfer ²­­­�vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ir-receiverir-receiver-pin ²«­Éledsled-power-pin ²«­Êled-work-pin ²«­Ëpciepcie-reset-pin ²«­·vcc3v3-pcie-en-pin ²«­Ðrk809hp-det-pin ²«­Ìusbvcc5v0-usb-host-en-pin ²«­Òvcc5v0-usb-dr-en-pin ²«­Ôopp-table-0,operating-points-v2 À­opp-408000000 ËQ– Ò øP øPŒ0 àœ@opp-600000000 Ë#ÃF Ò øP øPŒ0 àœ@opp-816000000 Ë0£, Ò øP øPŒ0 àœ@ ñopp-1104000000 ËAÍ´ Ò »  » Œ0 àœ@opp-1416000000 ËTfr Ò£è£èŒ0 àœ@opp-1608000000 Ë_Ø" ÒÈàÈàŒ0 àœ@opp-1800000000 ËkIÒ ÒŒ0Œ0Œ0 àœ@opp-1992000000 Ëv»‚ ÒŒ0Œ0Œ0 àœ@opp-table-1,operating-points-v2­Eopp-200000000 Ë ëÂ Ò øP øPB@opp-300000000 Ëá£ Ò øP øPB@opp-400000000 Ëׄ Ò øP øPB@opp-600000000 Ë#ÃF Ò »  » B@opp-700000000 Ë)¹' Ò~ð~ðB@opp-800000000 Ë/¯ ÒB@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü–—˜Ìsatapmaliverxoob N^Ø Ýsata-phyçù =disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconýýÇ­Çqos@fe190080,rockchip,rk3568-qossysconýþ€ ­>qos@fe190100,rockchip,rk3568-qossysconýþ ­?qos@fe190200,rockchip,rk3568-qossysconýþ ­@syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconýýË€­³phy@fe8c0000,rockchip,rk3568-pcie3-phyýþŒ &&'wÌrefclk_mrefclk_npclk¾Œphy ý³=okay­µpcie@fe270000,rockchip,rk3568-pcie ¹(ˆ‰Š‹Œ$Ìaclk_mstaclk_slvaclk_dbipclkauxñpci<N Ÿž�œ\syspmcmsglegacyerrMÃ`Ö´´´´äõ"Z*ص Ýpcie-phyù0ýÀ@@þ'òTlòòò ò à@@@rdbiapbconfig±Œpipe =disabledlegacy-interrupt-controller8M N�­´pcie@fe280000,rockchip,rk3568-pcie ¹ /(��‘’“$Ìaclk_mstaclk_slvaclk_dbipclkauxñpci<N¥¤£¢¡\syspmcmsglegacyerrMÃ`Ö¶¶¶¶äõ" Z *ص Ýpcie-phyù0ýÀ€@þ(ðTlððð ð à€€@rdbiapbconfigÁŒpipe=okay¾default´· ¸ ¹legacy-interrupt-controller8M N¢­¶ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ*N\macirqeth_wake_irq@‚……¸´µ…¹WÌstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref× Œstmmacethd̺Üí»¼=okay(…‚Mƒ8sY@ *output 7½ Brgmii 1!¾default´¾¿ÀÁ KO T-mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ý ]N  m†  í½stmmac-axi-config&6­ºrx-queues-configF­»queue0tx-queues-config\­¼queue0can@fe570000,rockchip,rk3568v2-canfdýþW NA@ ÌbaudpclkUT Œcoreapb¾default´Ä =disabledcan@fe580000,rockchip,rk3568v2-canfdýþX NCB ÌbaudpclkWV Œcoreapb¾default´Å =disabledcan@fe590000,rockchip,rk3568v2-canfdýþY NED ÌbaudpclkYX Œcoreapb¾default´Æ =disabledphy@fe820000,rockchip,rk3568-naneng-combphyýþ‚| Ìrefapbpipe(8õáÅŒphy þ£ Ç &=okay 1¨­chosen serial2:1500000n8regulator-dc-12v,regulator-fixedŽdc_12v�±÷Û·­Ñhdmi-con,hdmi-connectorøaportendpoint|È­Wir-receiver,gpio-ir-receiver R"¾default´Éleds ,gpio-ledsled-0 R" ‹power ” škeep ¨default-on¾default´Êled-1 R" ‹heartbeat ” ¨heartbeat¾default´Ërk809-sound,simple-audio-card¾default´Ì óAnalog RK817 i2s ¾"#% ÝHeadphoneHeadphonesSpeakerSpeaker- ÷HeadphonesHPOLHeadphonesHPORSpeakerSPKOsimple-audio-card,cpuDÍsimple-audio-card,codecDÎregulator-vcc3v3-pcie,regulator-fixed Žvcc3v3_pcie  $Ͼdefault´ÐÃ2Z Û2Z  )ˆ!­¹regulator-vcc3v3-sys,regulator-fixed Žvcc3v3_sys�±Ã2Z Û2Z Ñ­!regulator-vcc5v0-sys,regulator-fixed Žvcc5v0_sys�±ÃLK@ÛLK@Ñ­Óregulator-vcc5v0-usb-host,regulator-fixedŽvcc5v0_usb_host  $"¾default´ÒÃLK@ÛLK@Ó­¨regulator-vcc5v0-usb-otg,regulator-fixedŽvcc5v0_usb_otg  $"¾default´ÔÃLK@ÛLK@Ó­¥ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplyspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthlabelnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsphy-supplyrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delayreset-assert-usreset-deassert-usstdout-pathfunctioncolordefault-statelinux,default-triggersimple-audio-card,hp-det-gpiossimple-audio-card,widgetssimple-audio-card,routingenable-active-highgpiostartup-delay-us