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²power-domain@7B,.power-domain@8ÌÍ B-./.power-domain@9 ÚÛÜ B012.power-domain@10 ñòB345678.power-domain@11 íB9.power-domain@13 B:.power-domain@14 B;<=.power-domain@15 B>?@ABCDE.gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýæ@$S()' IjobmmugpuÑgpubus þBokay“FYG²œvideo-codec@fdea0400,rockchip,rk3568-vpuýê S‹Ivdpuîï ÑaclkhclkeHþ iommu@fdea0800,rockchip,rk3568-iommuýê@ SŠ Ñaclkifaceîïþ l²Hrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýë€ SZóôõÑaclkhclksclk&$% ycoreaxiahbþ video-codec@fdee0000,rockchip,rk3568-vepuýî S@ýþ ÑaclkhclkeIþ iommu@fdee0800,rockchip,rk3568-iommuýî@ S?ýþ Ñaclkifaceþ l²Ivideo-capture@fdfe0000,rockchip,rk3568-vicapýþ S’&Ð6ᣠÎÏÐÑÑaclkhclkdclkiclkeJþ(÷øùûúyarsthrstdrstprstirstb  Bdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommuýþ S’ÎÏ Ñaclkifacelþ… Bdisabled²Jmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ@ Sd ÁÂŽ�Ñbiuciuciu-driveciu-sample «ðÑ€ëyreset Bdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aþS 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²8qos@fe180000,rockchip,rk3568-qossysconþ qos@fe190000,rockchip,rk3568-qossysconþ ²>qos@fe190280,rockchip,rk3568-qossysconþ€ ²Bqos@fe190300,rockchip,rk3568-qossysconþ ²Cqos@fe190380,rockchip,rk3568-qossysconþ€ ²Dqos@fe190400,rockchip,rk3568-qossysconþ ²Eqos@fe198000,rockchip,rk3568-qossysconþ€ ²:qos@fe1a8000,rockchip,rk3568-qossysconþ€ ²0qos@fe1a8080,rockchip,rk3568-qossysconþ€€ ²1qos@fe1a8100,rockchip,rk3568-qossysconþ� ²2dfi@fe230000,rockchip,rk3568-dfiþ# S ªYpcie@fe260000,rockchip,rk3568-pcie0À@þ&ô_dbiapbconfig<SKJIHGIsyspmcmsglegacyerr·(�‚ƒ„…$Ñaclk_mstaclk_slvaclk_dbipclkauxöpciYÁ`ÔZZZZâó [(Ý âpcie-phyþTqôôô ô à@¡ypipe Bokay 2#legacy-interrupt-controllerYD SH²Zmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ+@ Sb °±Š‹Ñbiuciuciu-driveciu-sample «ðÑ€ÔyresetBokay>FMWiz…\‘Ãdefault¹]^_`mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ,@ Sc ²³Œ�Ñbiuciuciu-driveciu-sample «ðÑ€Öyreset Bdisabledspi@fe300000 ,rockchip,sfcþ0@ SexvÑclk_sfchclk_sfc¹aÃdefault Bdisabledmmc@fe310000,rockchip,rk3568-dwcmshcþ1 S&{}6 ëÂn6(|zy{}ÑcorebusaxiblocktimerBokayM« ëž­Ãdefault¹bcde…‘rng@fe388000,rockchip,rk3568-rngþ8€@po ÑcoreahbmBokayi2s@fe400000,rockchip,rk3568-i2s-tdmþ@ S4&=A6FÏqFÏq?C9Ñmclk_txmclk_rxhclkf»txPQ ytx-mrx-mb yBokay² i2s@fe410000,rockchip,rk3568-i2s-tdmþA S5&EI6FÏqFÏqGK:Ñmclk_txmclk_rxhclkff»rxtxRS ytx-mrx-mb Ãdefault0¹ghijklmnopqry Bdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmþB S6&M6FÏqOO;Ñmclk_txmclk_rxhclkff»txrxTytx-mb Ãdefault¹stuvy Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmþC S7SW<Ñmclk_txmclk_rxhclkff»txrxUV ytx-mrx-mb y Bdisabledpdm@fe440000,rockchip,rk3568-pdmþD SLZYÑpdm_clkpdm_hclkf »rx¹wxyz{|ÃdefaultXypdm-my Bdisabledspdif@fe460000,rockchip,rk3568-spdifþF Sf Ñmclkhclk_\f»txÃdefault¹}y Bdisableddma-controller@fe530000,arm,pl330arm,primecellþS@S Å  Ñapb_pclkܲ&dma-controller@fe550000,arm,pl330arm,primecellþU@SÅ  Ñapb_pclkܲfi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþZ S/HG Ñi2cpclk¹~Ãdefault  Bdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ[ S0JI Ñi2cpclk¹Ãdefault  Bdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ\ S1LK Ñi2cpclk¹€Ãdefault  Bdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ] S2NM Ñi2cpclk¹�Ãdefault  Bdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ^ S3PO Ñi2cpclk¹‚Ãdefault Bokayrtc@51,haoyu,hym8563Q#Së ¦rtcic_32koutÃdefault¹ƒ®watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtþ` S• Ñtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiþa SgRQÑspiclkapb_pclk&&»txrxÃdefault ¹„…†  Bdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiþb ShTSÑspiclkapb_pclk&&»txrxÃdefault ¹‡ˆ‰  Bdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiþc SiVUÑspiclkapb_pclk&&»txrxÃdefault ¹Š‹Œ  Bdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiþd SjXWÑspiclkapb_pclk&&»txrxÃdefault ¹�Ž�  Bdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartþe SuÑbaudclkapb_pclk&&¹�Ãdefault  Bdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartþf Sv# Ñbaudclkapb_pclk&&¹‘Ãdefault Bokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartþg Sw'$Ñbaudclkapb_pclk&&¹’Ãdefault  Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartþh Sx+(Ñbaudclkapb_pclk&& ¹“Ãdefault  Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartþi Sy/,Ñbaudclkapb_pclk& & ¹”Ãdefault  Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartþj Sz30Ñbaudclkapb_pclk& & ¹•Ãdefault  Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartþk S{74Ñbaudclkapb_pclk&&¹–Ãdefault  Bdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartþl S|;8Ñbaudclkapb_pclk&&¹—Ãdefault  Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartþm S}?<Ñbaudclkapb_pclk&&¹˜Ãdefault  Bdisabledthermal-zonescpu-thermalçdýè ™tripscpu_alert0 p 'Ðýpassive²šcpu_alert1 $ø 'Ðýpassivecpu_crit s 'Ð ýcriticalcooling-mapsmap0 2š0 7 ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalçýè ™tripsgpu-threshold p 'Ðýpassivegpu-target $ø 'Ðýpassive²›gpu-crit s 'Ð ýcriticalcooling-mapsmap0 2› 7œÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcþq Ss&6f@ ®`Ñtsadcapb_pclk�‚×b  FsÃdefaultsleep¹� ]ž gBokay } ”²™saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcþr S]Ñsaradcapb_pclk€ ysaradc-apb ¯Bokay ÁŸ²Ðpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþnZY Ñpwmpclk¹ Ãdefault# Bdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþnZY Ñpwmpclk¹¡Ãdefault# Bdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn ZY Ñpwmpclk¹¢Ãdefault# Bdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn0ZY Ñpwmpclk¹£Ãdefault# Bdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo]\ Ñpwmpclk¹¤Ãdefault# Bdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo]\ Ñpwmpclk¹¥Ãdefault# Bdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo ]\ Ñpwmpclk¹¦Ãdefault# Bdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo0]\ Ñpwmpclk¹§Ãdefault# Bdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp`_ Ñpwmpclk¹¨Ãdefault# Bdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp`_ Ñpwmpclk¹©Ãdefault# Bdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp `_ Ñpwmpclk¹ªÃdefault# Bdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp0`_ Ñpwmpclk¹«Ãdefault# Bdisabledphy@fe830000,rockchip,rk3568-naneng-combphyþƒ"} Ñrefapbpipe&"6õáÇyphy ͬ ß­ õBokay²phy@fe840000,rockchip,rk3568-naneng-combphyþ„%~ Ñrefapbpipe&%6õáÉyphy ͬ ß® õBokay²phy@fe870000,rockchip,rk3568-csi-dphyþ‡yÑpclk õºyapbb  Bdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyþ… Ñrefpclkz õþ yapb» Bdisabled²Pmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyþ† Ñrefpclk{ õþ yapb¼ Bdisabled²Qusb2phy@fe8a0000,rockchip,rk3568-usb2phyþŠÑphyclk¦clk_usbphy0_480m S‡ ¯ëBokay²host-port õBokay °²otg-port õBokay²usb2phy@fe8b0000,rockchip,rk3568-usb2phyþ‹Ñphyclk¦clk_usbphy1_480m Sˆ ±ëBokayhost-port õBokay ²²otg-port õBokay²pinctrl,rockchip,rk3568-pinctrlb ªY q²³gpio@fdd60000,rockchip,gpio-bankýÖ S!.   +³  7DY²#gpio@fe740000,rockchip,gpio-bankþt S"cd  +³  7DYgpio@fe750000,rockchip,gpio-bankþu S#ef  +³@  7DY²Ágpio@fe760000,rockchip,gpio-bankþv S$gh  +³`  7DY²Ügpio@fe770000,rockchip,gpio-bankþw S%ij  +³€  7DY²×pcfg-pull-up C²¶pcfg-pull-none P²´pcfg-pull-none-drv-level-1 P ]²¸pcfg-pull-none-drv-level-2 P ]²·pcfg-pull-none-drv-level-3 P ]²»pcfg-pull-up-drv-level-1 C ]²ºpcfg-pull-up-drv-level-2 C ]²µpcfg-pull-none-smt P l²¹acodecaudiopwmbt656bt1120camcan0can0m0-pins � ´ ´²Ìcan1can1m0-pins �´´²Ícan2can2m0-pins � ´ ´²Îcifclk32kclk32k-out0 �´²cpuebcedpdpemmcemmc-bus8€ � µ µµµµµµµ²bemmc-clk �µ²cemmc-cmd �µ²demmc-datastrobe �´²eeth0eth1flashfspifspi-pins` �´´´´´´²agmac0gmac0-miim �´´²Ægmac0-rx-bus20 �´´´²Ègmac0-tx-bus20 � · · ´²Çgmac0-rgmii-clk �´¸²Égmac0-rgmii-bus@ �´´··²Êeth-phy0-reset-pin �¶²Ëgmac1gpuhdmitxhdmitxm0-cec �´²Thdmitx-scl �´²Rhdmitx-sda �´²Si2c0i2c0-xfer � ¹ ¹²!i2c1i2c1-xfer � ¹ ¹²~i2c2i2c2m0-xfer � ¹¹²i2c3i2c3m0-xfer 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Œvdd_usbc›¯ÁLK@ÙLK@²Òregulator-vcc3v3-sys,regulator-fixed Œvcc3v3_sys›¯Á2Z Ù2Z Ò²%regulator-vcc5v0-sys,regulator-fixed Œvcc5v0_sys›¯ÁLK@ÙLK@Ò²"regulator-vcc3v3-pcie,regulator-fixed Œvcc3v3_pcieÁ2Z Ù2Z  â 8# õ @"²¿regulator-vcc5v0-usb,regulator-fixed Œvcc5v0_usb›¯ÁLK@ÙLK@Ò²Ôregulator-vcc5v0-usb-host,regulator-fixed â $#Ãdefault¹ÓŒvcc5v0_usb_host›¯ÁLK@ÙLK@Ô²°regulator-vcc5v0-usb-otg,regulator-fixed â $#Ãdefault¹ÕŒvcc5v0_usb_otgÁLK@ÙLK@Ô²²regulator-pcie30-avdd0v9,regulator-fixedŒpcie30_avdd0v9›¯Á » Ù » %regulator-pcie30-avdd1v8,regulator-fixedŒpcie30_avdd1v8›¯Áw@Ùw@%gpio-keys ,gpio-keys¹ÖÃdefaultbutton-reset 2 8× ·RESET ½˜gpio-leds ,gpio-ledsÃdefault¹ØÙÚÛled-lan1  off ,lan 5 8Ü ·LAN-1led-lan2  off ,lan 5 8Ü ·LAN-2led-sys  ,power 8× ·SYS Iheartbeatled-wan  off ,wan 8Á ·WAN interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1rtc0ethernet0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesvpcie3v3-supplyclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaystdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-active-highstartup-delay-usdebounce-intervalcolordefault-statefunctionfunction-enumeratorlinux,default-trigger