Ð þíñÊ8æ( ÊåÈ ',friendlyarm,nanopi-r5crockchip,rk35687FriendlyElec NanoPi R5Caliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/mmc@fe2b0000â/mmc@fe310000ç/i2c@fe5e0000/rtc@51cpus cpu@0ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ cpu@100ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ cpu@200ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ cpu@300ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ l3-cache,cache°¼"/@A¨display-subsystem,rockchip,display-subsystemÊfirmwarescmi ,arm,scmi-smcЂÛ protocol@14øá¨hdmi-sound,simple-audio-cardîHDMIi2s8okaysimple-audio-card,codec?simple-audio-card,cpu? pmu,arm,cortex-a55-pmu0IäåæçT psci ,arm,psci-1.0smcreserved-memory gshmem@10f000,arm,scmi-shmemøðn¨timer,arm,armv8-timer0I   uxin24m ,fixed-clockŒn6œxin24má¨xin32k ,fixed-clockŒ€œxin32k¯¹defaultásata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciøü@ü›œ�Çsatapmaliverxoob I_Ó Øsata-phyâô 8disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciøü€ü ¡¢Çsatapmaliverxoob I`Ó Øsata-phyâô 8disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3øüÀ@ I©ü¦§¥Çref_clksuspend_clkbus_clkhost  utmi_wideô”8okay ÓØusb2-phyusb3-phy3usb@fd000000,rockchip,rk3568-dwc3snps,dwc3øý@ Iªü©ª¨Çref_clksuspend_clkbus_clkhost ÓØusb2-phyusb3-phy  utmi_wideô•8okayinterrupt-controller@fd400000 ,arm,gic-v3 øý@ýF I :O`ýAj(ug „¨msi-controller@fd440000,arm,gic-v3-itsøýD„u”¨[usb@fd800000 ,generic-ehciøý€ I‚ü½¾¼ÓØusb8okayusb@fd840000 ,generic-ohciøý„ Iƒü½¾¼ÓØusb8okayusb@fd880000 ,generic-ehciøýˆ I…ü¿À¼ÓØusb8okayusb@fd8c0000 ,generic-ohciøýŒ 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Ï™pçqregulator-state-memDCDC_REG5‚vcc_1v8‘¥·w@Ïw@¨regulator-state-memLDO_REG1‚vdda0v9_image·~ðÏ~ð¨Uregulator-state-memLDO_REG2 ‚vdda_0v9‘¥· » Ï » regulator-state-memLDO_REG3 ‚vdda0v9_pmu‘¥· » Ï » regulator-state-memÉá » LDO_REG4 ‚vccio_acodec·2Z Ï2Z ¨regulator-state-memLDO_REG5 ‚vccio_sd·w@Ï2Z ¨regulator-state-memLDO_REG6 ‚vcc3v3_pmu‘¥·2Z Ï2Z ¨regulator-state-memÉá2Z LDO_REG7 ‚vcca_1v8‘¥·w@Ïw@¨¡regulator-state-memLDO_REG8 ‚vcca1v8_pmu‘¥·w@Ïw@regulator-state-memÉáw@LDO_REG9‚vcca1v8_image·w@Ïw@¨Vregulator-state-memSWITCH_REG1‚vcc_3v3‘¥¨regulator-state-memSWITCH_REG2 ‚vcc3v3_sd‘¥¨^regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartøýÕ Itü ,Çbaudclkapb_pclký&&¯'¹default 8disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×ü 0 Çpwmpclk¯(¹default 8disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×ü 0 Çpwmpclk¯)¹default 8disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý× ü 0 Çpwmpclk¯*¹default 8disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×0ü 0 Çpwmpclk¯+¹default 8disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdøýÙpower-controller!,rockchip,rk3568-power-controller$ ¨power-domain@7øü8,$power-domain@8øüÌÍ 8-./$power-domain@9ø üÚÛÜ 8012$power-domain@10ø üñò8345678$power-domain@11ø üí89$power-domain@13üø 8:$power-domain@14øü 8;<=$power-domain@15øü 8>?@ABCDE$gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostøýæ@$I()' ?jobmmugpuüÇgpubusô8okay‰FOG¨žvideo-codec@fdea0400,rockchip,rk3568-vpuøýê I‹?vdpuüîï Çaclkhclk[Hô iommu@fdea0800,rockchip,rk3568-iommuøýê@ IŠ Çaclkifaceüîïô b¨Hrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaøýë€ IZüóôõÇaclkhclksclk&$% ocoreaxiahbô video-codec@fdee0000,rockchip,rk3568-vepuøýî I@üýþ Çaclkhclk[Iô iommu@fdee0800,rockchip,rk3568-iommuøýî@ I?üýþ Çaclkifaceô b¨Ivideo-capture@fdfe0000,rockchip,rk3568-vicapøýþ I’Ð,ᣠüÎÏÐÑÇaclkhclkdclkiclk[Jô(÷øùûúoarsthrstdrstprstirstX  8disabledports port@0øport@1øiommu@fdfe0800,rockchip,rk3568-iommuøýþ I’üÎÏ Çaclkifacebô{ 8disabled¨Jmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ@ Id üÁÂŽ�Çbiuciuciu-driveciu-sample–¡ðÑ€ëoreset 8disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aøþI ?macirqeth_wake_irq@ü†‰‰ÇÃĉÈWÇstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refì ostmmacethX ¯K¿ÐLãMö 8disabledmdio,snps,dwmac-mdio stmmac-axi-configÿ ¨Krx-queues-config)¨Lqueue0tx-queues-config?¨Mqueue0vop@fe040000 øþ0þ@Uvopgamma-lut I”(üÝÞßàá%Çaclkhclkdclk_vp0dclk_vp1dclk_vp2[Nô X 8okay,rockchip,rk3568-vopßàAports ¨port@0ø endpoint@2ø_O¨Wport@1ø port@2ø iommu@fe043e00,rockchip,rk3568-iommu øþ>þ? I”üÝÞ Çaclkifacebô 8okay¨Ndsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiøþ IDÇpclküèØdphyÓPô oapbX  8disabledports port@0øport@1ødsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiøþ IEÇpclküéØdphyÓQô oapbX  8disabledports port@0øport@1øhdmi@fe0a0000,rockchip,rk3568-dw-hdmiøþ  I-(üæç“(ÚÇiahbisfrcecref¹default ¯RSTô X o8okay€U�V¨ports port@0øendpoint_W¨Oport@1øendpoint_X¨Ëqos@fe128000,rockchip,rk3568-qossysconøþ€ ¨,qos@fe138080,rockchip,rk3568-qossysconøþ€€ ¨;qos@fe138100,rockchip,rk3568-qossysconøþ� ¨<qos@fe138180,rockchip,rk3568-qossysconøþ�€ ¨=qos@fe148000,rockchip,rk3568-qossysconøþ€ ¨-qos@fe148080,rockchip,rk3568-qossysconøþ€€ ¨.qos@fe148100,rockchip,rk3568-qossysconøþ� ¨/qos@fe150000,rockchip,rk3568-qossysconøþ ¨9qos@fe158000,rockchip,rk3568-qossysconøþ€ ¨3qos@fe158100,rockchip,rk3568-qossysconøþ� ¨4qos@fe158180,rockchip,rk3568-qossysconøþ�€ ¨5qos@fe158200,rockchip,rk3568-qossysconøþ‚ ¨6qos@fe158280,rockchip,rk3568-qossysconøþ‚€ ¨7qos@fe158300,rockchip,rk3568-qossysconøþƒ ¨8qos@fe180000,rockchip,rk3568-qossysconøþ qos@fe190000,rockchip,rk3568-qossysconøþ ¨>qos@fe190280,rockchip,rk3568-qossysconøþ€ ¨Bqos@fe190300,rockchip,rk3568-qossysconøþ ¨Cqos@fe190380,rockchip,rk3568-qossysconøþ€ ¨Dqos@fe190400,rockchip,rk3568-qossysconøþ ¨Eqos@fe198000,rockchip,rk3568-qossysconøþ€ ¨:qos@fe1a8000,rockchip,rk3568-qossysconøþ€ ¨0qos@fe1a8080,rockchip,rk3568-qossysconøþ€€ ¨1qos@fe1a8100,rockchip,rk3568-qossysconøþ� ¨2dfi@fe230000,rockchip,rk3568-dfiøþ# I  Ypcie@fe260000,rockchip,rk3568-pcie0øÀ@þ&ôUdbiapbconfig<IKJIHG?syspmcmsglegacyerr­(ü�‚ƒ„…$Çaclk_mstaclk_slvaclk_dbipclkauxìpciO·`ÊZZZZØéø[Ó Øpcie-phyôTgôôô ô à@¡opipe 8okay¹default¯\ (]legacy-interrupt-controllerO: IH¨Zmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ+@ Ib ü°±Š‹Çbiuciuciu-driveciu-sample–¡ðÑ€Ôoreset8okay4<CM_p{^‡¹default¯_`abmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ,@ Ic ü²³Œ�Çbiuciuciu-driveciu-sample–¡ðÑ€Öoreset 8disabledspi@fe300000 ,rockchip,sfcøþ0@ IeüxvÇclk_sfchclk_sfc¯c¹default 8disabledmmc@fe310000,rockchip,rk3568-dwcmshcøþ1 I{}, ëÂn6(ü|zy{}Çcorebusaxiblocktimer8okayC¡ 딣¹default¯defg{‡rng@fe388000,rockchip,rk3568-rngøþ8€@üpo Çcoreahbm8okayi2s@fe400000,rockchip,rk3568-i2s-tdmøþ@ I4=A,FÏqFÏqü?C9Çmclk_txmclk_rxhclkýh±txPQ otx-mrx-mX o8okay¨ i2s@fe410000,rockchip,rk3568-i2s-tdmøþA I5EI,FÏqFÏqüGK:Çmclk_txmclk_rxhclkýhh±rxtxRS otx-mrx-mX ¹default0¯ijklmnopqrsto 8disabledi2s@fe420000,rockchip,rk3568-i2s-tdmøþB I6M,FÏqüOO;Çmclk_txmclk_rxhclkýhh±txrxTotx-mX ¹default¯uvwxo 8disabledi2s@fe430000,rockchip,rk3568-i2s-tdmøþC I7üSW<Çmclk_txmclk_rxhclkýhh±txrxUV otx-mrx-mX o 8disabledpdm@fe440000,rockchip,rk3568-pdmøþD ILüZYÇpdm_clkpdm_hclkýh ±rx¯yz{|}~¹defaultXopdm-mo 8disabledspdif@fe460000,rockchip,rk3568-spdiføþF If Çmclkhclkü_\ýh±tx¹default¯o 8disableddma-controller@fe530000,arm,pl330arm,primecelløþS@I »ü  Çapb_pclkÒ¨&dma-controller@fe550000,arm,pl330arm,primecelløþU@I»ü  Çapb_pclkÒ¨hi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþZ I/üHG Çi2cpclk¯€¹default  8disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ[ I0üJI Çi2cpclk¯�¹default  8disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ\ I1üLK Çi2cpclk¯‚¹default  8disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ] I2üNM Çi2cpclk¯ƒ¹default  8disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ^ I3üPO Çi2cpclk¯„¹default 8okayrtc@51,haoyu,hym8563øQ#Iá œrtcic_32kout¹default¯…¤watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtøþ` I•ü Çtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiøþa IgüRQÇspiclkapb_pclký&&±txrx¹default ¯†‡ˆ  8disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiøþb IhüTSÇspiclkapb_pclký&&±txrx¹default ¯‰Š‹  8disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiøþc IiüVUÇspiclkapb_pclký&&±txrx¹default ¯Œ�Ž  8disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiøþd IjüXWÇspiclkapb_pclký&&±txrx¹default ¯��‘  8disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartøþe IuüÇbaudclkapb_pclký&&¯’¹default 8disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartøþf Ivü# Çbaudclkapb_pclký&&¯“¹default8okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartøþg Iwü'$Çbaudclkapb_pclký&&¯”¹default 8disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartøþh Ixü+(Çbaudclkapb_pclký&& ¯•¹default 8disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartøþi Iyü/,Çbaudclkapb_pclký& & ¯–¹default 8disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþj Izü30Çbaudclkapb_pclký& & ¯—¹default 8disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþk I{ü74Çbaudclkapb_pclký&&¯˜¹default 8disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþl I|ü;8Çbaudclkapb_pclký&&¯™¹default 8disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþm I}ü?<Çbaudclkapb_pclký&&¯š¹default 8disabledthermal-zonescpu-thermalÝdóè ›tripscpu_alert0 p Ðópassive¨œcpu_alert1 $ø Ðópassivecpu_crit s Ð ócriticalcooling-mapsmap0 (œ0 - ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalÝóè ›tripsgpu-threshold p Ðópassivegpu-target $ø Ðópassive¨�gpu-crit s Ð ócriticalcooling-mapsmap0 (� -žÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcøþq Is,f@ ®`üÇtsadcapb_pclk�‚×X  <s¹defaultsleep¯Ÿ S  ]8okay s Ѝ›saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcøþr I]üÇsaradcapb_pclk€ osaradc-apb ¥8okay ·¡¨Êpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþnüZY Çpwmpclk¯¢¹default 8disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþnüZY Çpwmpclk¯£¹default 8disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþn üZY Çpwmpclk¯¤¹default 8disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþn0üZY Çpwmpclk¯¥¹default 8disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþoü]\ Çpwmpclk¯¦¹default 8disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþoü]\ Çpwmpclk¯§¹default 8disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþo ü]\ Çpwmpclk¯¨¹default 8disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþo0ü]\ Çpwmpclk¯©¹default 8disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþpü`_ Çpwmpclk¯ª¹default 8disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþpü`_ Çpwmpclk¯«¹default 8disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþp ü`_ Çpwmpclk¯¬¹default 8disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþp0ü`_ Çpwmpclk¯­¹default 8disabledphy@fe830000,rockchip,rk3568-naneng-combphyøþƒü"} Çrefapbpipe",õáÇophy î Õ¯ ë8okay¨phy@fe840000,rockchip,rk3568-naneng-combphyøþ„ü%~ Çrefapbpipe%,õáÉophy î Õ° ë8okay¨phy@fe870000,rockchip,rk3568-csi-dphyøþ‡üyÇpclk ëºoapbX  8disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyøþ… Çrefpclküz ëô oapb» 8disabled¨Pmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyøþ† Çrefpclkü{ ëô oapb¼ 8disabled¨Qusb2phy@fe8a0000,rockchip,rk3568-usb2phyøþŠüÇphyclkœclk_usbphy0_480m I‡ ö±á8okay¨host-port ë8okay ²¨otg-port ë8okay¨usb2phy@fe8b0000,rockchip,rk3568-usb2phyøþ‹üÇphyclkœclk_usbphy1_480m Iˆ ö³á8okayhost-port ë8okay ´¨otg-port ë8okay¨pinctrl,rockchip,rk3568-pinctrlX  Y g¨µgpio@fdd60000,rockchip,gpio-bankøýÖ I!ü.   !µ  -:O¨#gpio@fe740000,rockchip,gpio-bankøþt I"ücd  !µ  -:Ogpio@fe750000,rockchip,gpio-bankøþu I#üef  !µ@  -:Ogpio@fe760000,rockchip,gpio-bankøþv I$ügh  !µ`  -:O¨]gpio@fe770000,rockchip,gpio-bankøþw I%üij  !µ€  -:Opcfg-pull-up 9¨¸pcfg-pull-none F¨¶pcfg-pull-none-drv-level-1 F S¨ºpcfg-pull-none-drv-level-2 F S¨¹pcfg-pull-none-drv-level-3 F S¨½pcfg-pull-up-drv-level-1 9 S¨¼pcfg-pull-up-drv-level-2 9 S¨·pcfg-pull-none-smt F b¨»acodecaudiopwmbt656bt1120camcan0can0m0-pins w ¶ ¶¨Æcan1can1m0-pins w¶¶¨Çcan2can2m0-pins w ¶ ¶¨Ècifclk32kclk32k-out0 w¶¨cpuebcedpdpemmcemmc-bus8€ w · ·······¨demmc-clk w·¨eemmc-cmd w·¨femmc-datastrobe w¶¨geth0eth1flashfspifspi-pins` w¶¶¶¶¶¶¨cgmac0gmac1gpuhdmitxhdmitxm0-cec w¶¨Thdmitx-scl w¶¨Rhdmitx-sda w¶¨Si2c0i2c0-xfer w » »¨!i2c1i2c1-xfer w » »¨€i2c2i2c2m0-xfer w »»¨�i2c3i2c3m0-xfer w»»¨‚i2c4i2c4m0-xfer w » »¨ƒi2c5i2c5m0-xfer w » »¨„i2s1i2s1m0-lrckrx w¶¨li2s1m0-lrcktx w¶¨ki2s1m0-sclkrx w¶¨ji2s1m0-sclktx w¶¨ii2s1m0-sdi0 w ¶¨mi2s1m0-sdi1 w ¶¨ni2s1m0-sdi2 w ¶¨oi2s1m0-sdi3 w¶¨pi2s1m0-sdo0 w¶¨qi2s1m0-sdo1 w¶¨ri2s1m0-sdo2 w ¶¨si2s1m0-sdo3 w ¶¨ti2s2i2s2m0-lrcktx w¶¨vi2s2m0-sclktx w¶¨ui2s2m0-sdi w¶¨wi2s2m0-sdo w¶¨xi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk w¶¨ypdmm0-clk1 w¶¨zpdmm0-sdi0 w ¶¨{pdmm0-sdi1 w ¶¨|pdmm0-sdi2 w ¶¨}pdmm0-sdi3 w¶¨~pmicpmic-int w¸¨$pmupwm0pwm0m0-pins w¶¨(pwm1pwm1m0-pins w¶¨)pwm2pwm2m0-pins w¶¨*pwm3pwm3-pins w¶¨+pwm4pwm4-pins w¶¨¢pwm5pwm5-pins w¶¨£pwm6pwm6-pins w¶¨¤pwm7pwm7-pins w¶¨¥pwm8pwm8m0-pins w ¶¨¦pwm9pwm9m0-pins w ¶¨§pwm10pwm10m0-pins w ¶¨¨pwm11pwm11m0-pins w¶¨©pwm12pwm12m0-pins w¶¨ªpwm13pwm13m0-pins w¶¨«pwm14pwm14m0-pins w¶¨¬pwm15pwm15m0-pins w¶¨­refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ w····¨_sdmmc0-clk w·¨`sdmmc0-cmd w·¨asdmmc0-det w¸¨bsdmmc1sdmmc2spdifspdifm0-tx w¶¨spi0spi0m0-pins0 w ¶¶¶¨ˆspi0m0-cs0 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à€€@UdbiapbconfigÁopipe8okay (# ÞÁlegacy-interrupt-controller:O I¢¨Âethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20aøþ*I?macirqeth_wake_irq@ü‚……¸´µ…¹WÇstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref× ostmmacethX ¯Ã¿ÐÄãÅö 8disabledmdio,snps,dwmac-mdio stmmac-axi-configÿ ¨Ãrx-queues-config)¨Äqueue0tx-queues-config?¨Åqueue0can@fe570000,rockchip,rk3568v2-canfdøþW IüA@ ÇbaudpclkUT ocoreapb¹default¯Æ 8disabledcan@fe580000,rockchip,rk3568v2-canfdøþX IüCB ÇbaudpclkWV ocoreapb¹default¯Ç 8disabledcan@fe590000,rockchip,rk3568v2-canfdøþY IüED ÇbaudpclkYX ocoreapb¹default¯È 8disabledphy@fe820000,rockchip,rk3568-naneng-combphyøþ‚ü| Çrefapbpipe,õáÅophy î ÕÉ ë8okay¨chosen îserial2:1500000n8adc-keys ,adc-keys úÊ buttons w@ 1dbutton-maskrom ?MASKROM E� Phdmi-con,hdmi-connectoróaportendpoint_˨Xregulator-vdd-usbc,regulator-fixed ‚vdd_usbc‘¥·LK@ÏLK@¨Ìregulator-vcc3v3-sys,regulator-fixed ‚vcc3v3_sys‘¥·2Z Ï2Z ų̈%regulator-vcc5v0-sys,regulator-fixed ‚vcc5v0_sys‘¥·LK@ÏLK@ų̈"regulator-vcc3v3-pcie,regulator-fixed ‚vcc3v3_pcie·2Z Ï2Z  j .# } @ü"¨Áregulator-vcc5v0-usb,regulator-fixed ‚vcc5v0_usb‘¥·LK@ÏLK@ų̈Îregulator-vcc5v0-usb-host,regulator-fixed j Ž#¹default¯Í‚vcc5v0_usb_host‘¥·LK@ÏLK@üΨ²regulator-vcc5v0-usb-otg,regulator-fixed j Ž#¹default¯Ï‚vcc5v0_usb_otg·LK@ÏLK@üΨ´regulator-pcie30-avdd0v9,regulator-fixed‚pcie30_avdd0v9‘¥· » Ï » ü%regulator-pcie30-avdd1v8,regulator-fixed‚pcie30_avdd1v8‘¥·w@Ïw@ü%gpio-keys ,gpio-keys¹default¯Ðbutton-reset “2 .# ?reset E˜gpio-leds ,gpio-leds¹default¯ÑÒÓÔled-lan ¥ «lan .]led-power ¥ «power ´heartbeat .]led-wan ¥ «wan .]led-wlan ¥ «wlan .] interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1rtc0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesvpcie3v3-supplystdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-active-highstartup-delay-usgpiodebounce-intervalcolorfunctionlinux,default-trigger