Ð þíóß8çü( ãçÄ %,embedfire,lubancat-2rockchip,rk35687EmbedFire LubanCat 2aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe2a0000ç/ethernet@fe010000ñ/mmc@fe2b0000ö/mmc@fe310000cpus cpu@0ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· cpu@100ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· cpu@200ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· cpu@300ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· l3-cache,cache¿Ë1>@P·display-subsystem,rockchip,display-subsystemÙfirmwarescmi ,arm,scmi-smcß‚ê protocol@14ð·hdmi-sound,simple-audio-cardýHDMIi2s-Gokaysimple-audio-card,codecNsimple-audio-card,cpuN pmu,arm,cortex-a55-pmu0Xäåæçc psci ,arm,psci-1.0(smcreserved-memory vshmem@10f000,arm,scmi-shmemð}·timer,arm,armv8-timer0X   „xin24m ,fixed-clock›n6«xin24mð·xin32k ,fixed-clock›€«xin32k¾Èdefaultðsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü@ ›œ�Ösatapmaliverxoob X_â çsata-phyñ Gdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü€  ¡¢Ösatapmaliverxoob X`â çsata-phyñ Gdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3üÀ@ X© ¦§¥Öref_clksuspend_clkbus_clkhost utmi_wide"”)Gokayâ çusb2-phyB Ihigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ý@ Xª ©ª¨Öref_clksuspend_clkbus_clkhost âçusb2-phyusb3-phy utmi_wide"•)Gokayinterrupt-controller@fd400000 ,arm,gic-v3 ý@ýF X Wl}ýA‡^å!’v ¡·msi-controller@fd440000,arm,gic-v3-itsýD¡’±·ausb@fd800000 ,generic-ehciý€ X‚ ½¾¼âçusbGokayusb@fd840000 ,generic-ohciý„ Xƒ ½¾¼âçusbGokayusb@fd880000 ,generic-ehciýˆ X… ¿À¼âçusbGokayusb@fd8c0000 ,generic-ohciýŒ X† ¿À¼âçusbGokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdý·_io-domains&,rockchip,rk3568-pmu-io-voltage-domainGokay¼ÊØæôsyscon@fdc50000ýÅ ,rockchip,rk3568-pipe-grfsyscon·¯syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýÆ·syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýÈ·°syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýÉ·±syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýÊ€·²syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýÊ€€·µclock-controller@fdd00000,rockchip,rk3568-pmucruýÐð·clock-controller@fdd20000,rockchip,rk3568-cruýÒ Öxin24mð+ ;€G†Œ ëÂPg·i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýÔ X. - Öi2cpclk¾ Èdefault Gokayregulator@1c ,tcs,tcs4525t‘vdd_cpu ´Æ 5ÞŒ0öü !·regulator-state-mempmic@20,rockchip,rk809 "X+HP–ðÖmclk HÈdefault¾#/GX$d$p$|$ˆ$”$ $¬$¸$ÄregulatorsDCDC_REG1 ‘vdd_logic ´Æ¡ Þ™pöqÒregulator-state-memDCDC_REG2‘vdd_gpu ´Æ¡ Þ™pöqÒ·Fregulator-state-memDCDC_REG3‘vcc_ddr ´Òregulator-state-meméDCDC_REG4‘vdd_npu ´Æ¡ Þ™pöqÒregulator-state-memDCDC_REG5‘vcc_1v8 ´Æw@Þw@·regulator-state-memLDO_REG1‘vdda0v9_image´ Æ » Þ » ·[regulator-state-memLDO_REG2 ‘vdda_0v9 ´Æ » Þ » regulator-state-memLDO_REG3 ‘vdda0v9_pmu ´Æ » Þ » regulator-state-memé » LDO_REG4 ‘vccio_acodec ´Æ2Z Þ2Z ·regulator-state-memLDO_REG5 ‘vccio_sd ´Æw@Þ2Z ·regulator-state-memLDO_REG6 ‘vcc3v3_pmu ´Æ2Z Þ2Z ·regulator-state-memé2Z LDO_REG7 ‘vcca_1v8 ´Æw@Þw@·¢regulator-state-memLDO_REG8 ‘vcca1v8_pmu ´Æw@Þw@regulator-state-meméw@LDO_REG9‘vcca1v8_image ´Æw@Þw@·\regulator-state-memSWITCH_REG1‘vcc_3v3 ´·regulator-state-memSWITCH_REG2 ‘vcc3v3_sd ´·cregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýÕ Xt  ,Öbaudclkapb_pclk%%¾&Èdefault"/ Gdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×  0 Öpwmpclk¾'Èdefault9 Gdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×  0 Öpwmpclk¾(Èdefault9 Gdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×   0 Öpwmpclk¾)Èdefault9 Gdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×0  0 Öpwmpclk¾*Èdefault9 Gdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýÙpower-controller!,rockchip,rk3568-power-controllerD ·power-domain@7 X+Dpower-domain@8 ÌÍ X,-.Dpower-domain@9  ÚÛÜ X/01Dpower-domain@10  ñòX234567Dpower-domain@11  íX8Dpower-domain@13  X9Dpower-domain@14  X:;<Dpower-domain@15  X=>?@ABCDDgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýæ@$X()' _jobmmugpu ÖgpubusGokay˜EoF·Ÿvideo-codec@fdea0400,rockchip,rk3568-vpuýê X‹_vdpu îï Öaclkhclk{G iommu@fdea0800,rockchip,rk3568-iommuýê@ XŠ Öaclkiface îï ‚·Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýë€ XZ óôõÖaclkhclksclk"&$% �coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepuýî X@ ýþ Öaclkhclk{H iommu@fdee0800,rockchip,rk3568-iommuýî@ X? ýþ Öaclkiface ‚·Hvideo-capture@fdfe0000,rockchip,rk3568-vicapýþ X’+Ð;ᣠ ÎÏÐÑÖaclkhclkdclkiclk{I("÷øùûú�arsthrstdrstprstirstg Gdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommuýþ X’ ÎÏ Öaclkiface‚› Gdisabled·Immc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ@ Xd  ÁÂŽ�Öbiuciuciu-driveciu-sample¶ÁðÑ€"ë�reset Gdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aþX _macirqeth_wake_irq@ †‰‰ÇÃĉÈWÖstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref"ì �stmmacethgÏJßðKLGokayrgmii(output 5ME [N † +‰†P‡ÅÈdefault¾NOPQRp!y‚Smdio,snps,dwmac-mdio phy@0,ethernet-phy-ieee802.3-c22·Sstmmac-axi-config�—§·Jrx-queues-config··Kqueue0tx-queues-configÍ·Lqueue0vop@fe040000 þ0þ@ãvopgamma-lut X”( ÝÞßàá%Öaclkhclkdclk_vp0dclk_vp1dclk_vp2{T gGokay,rockchip,rk3568-vop+ßàPports ·port@0 endpoint@2íU·]port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu þ>þ? X” ÝÞ Öaclkiface‚ Gokay·Tdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiþ XDÖpclk èçdphyâV �apb"g Gdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiþ XEÖpclk éçdphyâW �apb"g Gdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmiþ  X-( æç“(ÚÖiahbisfrcecrefÈdefault ¾XYZ "gGGokayý[ \·ports port@0endpointí]·Uport@1endpointí^·Õqos@fe128000,rockchip,rk3568-qossysconþ€ ·+qos@fe138080,rockchip,rk3568-qossysconþ€€ ·:qos@fe138100,rockchip,rk3568-qossysconþ� ·;qos@fe138180,rockchip,rk3568-qossysconþ�€ ·<qos@fe148000,rockchip,rk3568-qossysconþ€ ·,qos@fe148080,rockchip,rk3568-qossysconþ€€ ·-qos@fe148100,rockchip,rk3568-qossysconþ� ·.qos@fe150000,rockchip,rk3568-qossysconþ ·8qos@fe158000,rockchip,rk3568-qossysconþ€ ·2qos@fe158100,rockchip,rk3568-qossysconþ� ·3qos@fe158180,rockchip,rk3568-qossysconþ�€ ·4qos@fe158200,rockchip,rk3568-qossysconþ‚ ·5qos@fe158280,rockchip,rk3568-qossysconþ‚€ ·6qos@fe158300,rockchip,rk3568-qossysconþƒ ·7qos@fe180000,rockchip,rk3568-qossysconþ qos@fe190000,rockchip,rk3568-qossysconþ ·=qos@fe190280,rockchip,rk3568-qossysconþ€ ·Aqos@fe190300,rockchip,rk3568-qossysconþ ·Bqos@fe190380,rockchip,rk3568-qossysconþ€ ·Cqos@fe190400,rockchip,rk3568-qossysconþ ·Dqos@fe198000,rockchip,rk3568-qossysconþ€ ·9qos@fe1a8000,rockchip,rk3568-qossysconþ€ ·/qos@fe1a8080,rockchip,rk3568-qossysconþ€€ ·0qos@fe1a8100,rockchip,rk3568-qossysconþ� ·1dfi@fe230000,rockchip,rk3568-dfiþ# X _pcie@fe260000,rockchip,rk3568-pcie0À@þ&ôãdbiapbconfig<XKJIHG_syspmcmsglegacyerr*( �‚ƒ„…$Öaclk_mstaclk_slvaclk_dbipclkauxûpcil4`G````Ufu„“a›â çpcie-phyTvôôô ô à@"¡�pipe Gokay ¥M±blegacy-interrupt-controllerlW XH·`mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ+@ Xb  °±Š‹Öbiuciuciu-driveciu-sample¶ÁðÑ€"Ô�resetGokayÁÉÐÚìý  c "Èdefault¾defgmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ,@ Xc  ²³Œ�Öbiuciuciu-driveciu-sample¶ÁðÑ€"Ö�reset Gdisabledspi@fe300000 ,rockchip,sfcþ0@ Xe xvÖclk_sfchclk_sfc¾hÈdefault Gdisabledmmc@fe310000,rockchip,rk3568-dwcmshcþ1 X+{}| ; ëÂn6 ëÂ( |zy{}ÖcorebusaxiblocktimerGokayÐÁ ë / >Èdefault ¾ijkrng@fe388000,rockchip,rk3568-rngþ8€@ po Öcoreahb"mGokayi2s@fe400000,rockchip,rk3568-i2s-tdmþ@ X4+=A;FÏqFÏq ?C9Ömclk_txmclk_rxhclkl Ltx"PQ �tx-mrx-mgG Gdisabled· i2s@fe410000,rockchip,rk3568-i2s-tdmþA X5+EI;FÏqFÏq GK:Ömclk_txmclk_rxhclkll Lrxtx"RS �tx-mrx-mgÈdefault0¾mnopqrstuvwxGGokay Vi2s@fe420000,rockchip,rk3568-i2s-tdmþB X6+M;FÏq OO;Ömclk_txmclk_rxhclkll Ltxrx"T�tx-mgÈdefault¾yz{|G Gdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmþC X7 SW<Ömclk_txmclk_rxhclkll Ltxrx"UV �tx-mrx-mgG Gdisabledpdm@fe440000,rockchip,rk3568-pdmþD XL ZYÖpdm_clkpdm_hclkl  Lrx¾}~€�‚Èdefault"X�pdm-mG Gdisabledspdif@fe460000,rockchip,rk3568-spdifþF Xf Ömclkhclk _\l LtxÈdefault¾ƒG Gdisableddma-controller@fe530000,arm,pl330arm,primecellþS@X  q   Öapb_pclk ˆ·%dma-controller@fe550000,arm,pl330arm,primecellþU@X q   Öapb_pclk ˆ·li2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþZ X/ HG Öi2cpclk¾„Èdefault  Gdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ[ X0 JI Öi2cpclk¾…Èdefault  Gdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ\ X1 LK Öi2cpclk¾†Èdefault  Gdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ] X2 NM Öi2cpclk¾‡Èdefault  Gdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ^ X3 PO Öi2cpclk¾ˆÈdefault  Gdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtþ` X•  Ötclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiþa Xg RQÖspiclkapb_pclk%% LtxrxÈdefault ¾‰Š‹  Gdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiþb Xh TSÖspiclkapb_pclk%% LtxrxÈdefault ¾Œ�Ž  Gdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiþc Xi VUÖspiclkapb_pclk%% LtxrxÈdefault ¾��‘  Gdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiþd Xj XWÖspiclkapb_pclk%% LtxrxÈdefault¾’  Gdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartþe Xu Öbaudclkapb_pclk%%¾“Èdefault"/ Gdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartþf Xv # Öbaudclkapb_pclk%%¾”Èdefault"/Gokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartþg Xw '$Öbaudclkapb_pclk%%¾•Èdefault"/ Gdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartþh Xx +(Öbaudclkapb_pclk%% ¾–Èdefault"/ Gdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartþi Xy /,Öbaudclkapb_pclk% % ¾—Èdefault"/ Gdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartþj Xz 30Öbaudclkapb_pclk% % ¾˜Èdefault"/ Gdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartþk X{ 74Öbaudclkapb_pclk%%¾™Èdefault"/ Gdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartþl X| ;8Öbaudclkapb_pclk%%¾šÈdefault"/ Gdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartþm X} ?<Öbaudclkapb_pclk%%¾›Èdefault"/ Gdisabledthermal-zonescpu-thermal “d ©è ·œtripscpu_alert0 Çp ÓÐpassive·�cpu_alert1 Ç$ø ÓÐpassivecpu_crit Çs ÓÐ criticalcooling-mapsmap0 Þ�0 ã ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal “ ©è ·œtripsgpu-threshold Çp ÓÐpassivegpu-target Ç$ø ÓÐpassive·žgpu-crit Çs ÓÐ criticalcooling-mapsmap0 Þž ãŸÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcþq Xs+;f@ ®` Ötsadcapb_pclk"�‚×g òsÈdefaultsleep¾  ¡ Gokay ) @·œsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcþr X] Ösaradcapb_pclk"€ �saradc-apb [Gokay m¢pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn ZY Öpwmpclk¾£Èdefault9 Gdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn ZY Öpwmpclk¾¤Èdefault9 Gdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn  ZY Öpwmpclk¾¥Èdefault9 Gdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn0 ZY Öpwmpclk¾¦Èdefault9 Gdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo ]\ Öpwmpclk¾§Èdefault9Gokaypwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo ]\ Öpwmpclk¾¨Èdefault9 Gdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo  ]\ Öpwmpclk¾©Èdefault9 Gdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo0 ]\ Öpwmpclk¾ªÈdefault9 Gdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp `_ Öpwmpclk¾«Èdefault9 Gdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp `_ Öpwmpclk¾¬Èdefault9 Gdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp  `_ Öpwmpclk¾­Èdefault9 Gdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp0 `_ Öpwmpclk¾®Èdefault9 Gdisabledphy@fe830000,rockchip,rk3568-naneng-combphyþƒ "} Örefapbpipe+";õá"Ç�phy y¯ ‹° ¡Gokay·phy@fe840000,rockchip,rk3568-naneng-combphyþ„ %~ Örefapbpipe+%;õá"É�phy y¯ ‹± ¡Gokay·phy@fe870000,rockchip,rk3568-csi-dphyþ‡ yÖpclk ¡"º�apbg Gdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyþ… Örefpclk z ¡ �apb"» Gdisabled·Vmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyþ† Örefpclk { ¡ �apb"¼ Gdisabled·Wusb2phy@fe8a0000,rockchip,rk3568-usb2phyþŠ Öphyclk«clk_usbphy0_480m X‡ ¬²ðGokay·host-port ¡Gokay ¼³·otg-port ¡Gokay ¼´·usb2phy@fe8b0000,rockchip,rk3568-usb2phyþ‹ Öphyclk«clk_usbphy1_480m Xˆ ¬µðGokayhost-port ¡Gokay·otg-port ¡Gokay ¼¶·pinctrl,rockchip,rk3568-pinctrlg_ v··gpio@fdd60000,rockchip,gpio-bankýÖ X! .  Ç ×·  ãWl·"gpio@fe740000,rockchip,gpio-bankþt X" cd Ç ×·  ãWlgpio@fe750000,rockchip,gpio-bankþu X# ef Ç ×·@  ãWl·Ågpio@fe760000,rockchip,gpio-bankþv X$ gh Ç ×·`  ãWl·Mgpio@fe770000,rockchip,gpio-bankþw X% ij Ç ×·€  ãWlpcfg-pull-up ï·ºpcfg-pull-none ü·¸pcfg-pull-none-drv-level-1 ü ·¼pcfg-pull-none-drv-level-2 ü ·»pcfg-pull-none-drv-level-3 ü ·¿pcfg-pull-up-drv-level-1 ï ·¾pcfg-pull-up-drv-level-2 ï ·¹pcfg-pull-none-smt ü ·½acodecaudiopwmbt656bt1120camcan0can0m0-pins - ¸ ¸·Ðcan1can1m0-pins -¸¸·Ñcan2can2m0-pins - ¸ ¸·Òcifclk32kclk32k-out0 -¸·cpuebcedpdpemmcemmc-bus8€ - ¹ ¹¹¹¹¹¹¹·iemmc-clk -¹·jemmc-cmd -¹·keth0eth1flashfspifspi-pins` -¸¸¸¸¸¸·hgmac0gmac0-miim -¸¸·Êgmac0-rx-bus20 -¸¸¸·Ìgmac0-tx-bus20 - » » ¸·Ëgmac0-rgmii-clk -¸¼·Ígmac0-rgmii-bus@ -¸¸»»·Îgmac1gmac1m1-miim -¸¸·Ngmac1m1-rx-bus20 -¸¸ ¸·Pgmac1m1-tx-bus20 -»»¸·Ogmac1m1-rgmii-clk -¸¼·Qgmac1m1-rgmii-bus@ -¸¸»»·Rgpuhdmitxhdmitxm0-cec -¸·Zhdmitx-scl -¸·Xhdmitx-sda -¸·Yi2c0i2c0-xfer - ½ ½· i2c1i2c1-xfer - ½ ½·„i2c2i2c2m0-xfer - ½½·…i2c3i2c3m0-xfer -½½·†i2c4i2c4m0-xfer - ½ ½·‡i2c5i2c5m0-xfer - ½ ½·ˆi2s1i2s1m0-lrckrx -¸·pi2s1m0-lrcktx -¸·oi2s1m0-sclkrx -¸·ni2s1m0-sclktx -¸·mi2s1m0-sdi0 - ¸·qi2s1m0-sdi1 - ¸·ri2s1m0-sdi2 - ¸·si2s1m0-sdi3 -¸·ti2s1m0-sdo0 -¸·ui2s1m0-sdo1 -¸·vi2s1m0-sdo2 - ¸·wi2s1m0-sdo3 - ¸·xi2s2i2s2m0-lrcktx -¸·zi2s2m0-sclktx -¸·yi2s2m0-sdi -¸·{i2s2m0-sdo -¸·|i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk -¸·}pdmm0-clk1 -¸·~pdmm0-sdi0 - ¸·pdmm0-sdi1 - ¸·€pdmm0-sdi2 - ¸·�pdmm0-sdi3 -¸·‚pmicpmic-int -º·#pmupwm0pwm0m0-pins -¸·'pwm1pwm1m0-pins -¸·(pwm2pwm2m0-pins -¸·)pwm3pwm3-pins -¸·*pwm4pwm4-pins -¸·£pwm5pwm5-pins -¸·¤pwm6pwm6-pins -¸·¥pwm7pwm7-pins -¸·¦pwm8pwm8m0-pins - ¸·§pwm9pwm9m0-pins - ¸·¨pwm10pwm10m0-pins - ¸·©pwm11pwm11m0-pins -¸·ªpwm12pwm12m0-pins -¸·«pwm13pwm13m0-pins -¸·¬pwm14pwm14m0-pins -¸·­pwm15pwm15m0-pins -¸·®refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ -¹¹¹¹·dsdmmc0-clk -¹·esdmmc0-cmd -¹·fsdmmc0-det -º·gsdmmc1sdmmc2spdifspdifm0-tx -¸·ƒspi0spi0m0-pins0 - ¸¸¸·‹spi0m0-cs0 -¸·‰spi0m0-cs1 -¸·Šspi1spi1m0-pins0 - ¸¸¸·Žspi1m0-cs0 -¸·Œspi1m0-cs1 -¸·�spi2spi2m0-pins0 -¸¸¸·‘spi2m0-cs0 -¸·�spi2m0-cs1 -¸·�spi3spi3m1-pins0 -¸¸¸·’tsadctsadc-shutorg -¸· tsadc-pin -¸·¡uart0uart0-xfer -ºº·&uart1uart1m0-xfer - º º·“uart2uart2m0-xfer -ºº·”uart3uart3m1-xfer -ºº·•uart4uart4m0-xfer -ºº·–uart5uart5m0-xfer -ºº·—uart6uart6m0-xfer -ºº·˜uart7uart7m0-xfer -ºº·™uart8uart8m0-xfer -ºº·šuart9uart9m0-xfer -ºº·›vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ledsuser-status-led-pin -¸·Ôusbvcc5v0-usb20-host-en -¸·Ùvcc5v0-usb30-host-en -¸·Úvcc5v0-otg-vbus-en -¸·Ûpcievcc3v3-m2-pcie-en -¸·×vcc3v3-mini-pcie-en -¸·Øopp-table-0,operating-points-v2 ;·opp-408000000 FQ– M øP øPŒ0 [œ@opp-600000000 F#ÃF M øP øPŒ0 [œ@opp-816000000 F0£, M øP øPŒ0 [œ@ lopp-1104000000 FAÍ´ M »  » Œ0 [œ@opp-1416000000 FTfr M£è£èŒ0 [œ@opp-1608000000 F_Ø" MÈàÈàŒ0 [œ@opp-1800000000 FkIÒ MŒ0Œ0Œ0 [œ@opp-1992000000 Fv»‚ MŒ0Œ0Œ0 [œ@opp-table-1,operating-points-v2·Eopp-200000000 F ë M øP øPB@opp-300000000 FᣠM øP øPB@opp-400000000 Fׄ M øP øPB@opp-600000000 F#ÃF M »  » B@opp-700000000 F)¹' M~ð~ðB@opp-800000000 F/¯ MB@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü –—˜Ösatapmaliverxoob X^âÀ çsata-phyñGokaysyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconýÇ·Óqos@fe190080,rockchip,rk3568-qossysconþ€ ·>qos@fe190100,rockchip,rk3568-qossysconþ ·?qos@fe190200,rockchip,rk3568-qossysconþ ·@syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconýË€·Áphy@fe8c0000,rockchip,rk3568-pcie3-phyþŒ ¡ &'wÖrefclk_mrefclk_npclk"¾�phy xÁGokay·Ãpcie@fe270000,rockchip,rk3568-pcie *( ˆ‰Š‹Œ$Öaclk_mstaclk_slvaclk_dbipclkauxûpci<X Ÿž�œ_syspmcmsglegacyerrl4`GÂÂÂÂUfu„“a›âà çpcie-phy0À@@þ'òTvòòò ò à@@@ãdbiapbconfig"±�pipe Gdisabledlegacy-interrupt-controllerWl X�·Âpcie@fe280000,rockchip,rk3568-pcie * /( ��‘’“$Öaclk_mstaclk_slvaclk_dbipclkauxûpci<X¥¤£¢¡_syspmcmsglegacyerrl4`GÄÄÄÄUfu„“ a ›âà çpcie-phy0À€@þ(ðTvððð ð à€€@ãdbiapbconfig"Á�pipeGokay ¥Å±Ælegacy-interrupt-controllerWl X¢·Äethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20aþ*X_macirqeth_wake_irq@ ‚……¸´µ…¹WÖstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref"× �stmmacethgÏÇßðÈÉGokayrgmii(output 5ÅE [N † +…‚Pƒ¶Èdefault¾ÊËÌÍÎp"y‚Ïmdio,snps,dwmac-mdio phy@0,ethernet-phy-ieee802.3-c22·Ïstmmac-axi-config�—§·Çrx-queues-config··Èqueue0tx-queues-configÍ·Équeue0can@fe570000,rockchip,rk3568v2-canfdþW X A@ Öbaudpclk"UT �coreapbÈdefault¾Ð Gdisabledcan@fe580000,rockchip,rk3568v2-canfdþX X CB Öbaudpclk"WV �coreapbÈdefault¾Ñ Gdisabledcan@fe590000,rockchip,rk3568v2-canfdþY X ED Öbaudpclk"YX �coreapbÈdefault¾Ò Gdisabledphy@fe820000,rockchip,rk3568-naneng-combphyþ‚ | Örefapbpipe+;õá"Å�phy y¯ ‹Ó ¡Gokay·Àchosen ‰serial2:1500000n8leds ,gpio-ledsuser-led •user_led ›heartbeat ±on «"Èdefault¾Ôhdmi-con,hdmi-connectoraportendpointíÕ·^regulator-dc-5v,regulator-fixed‘dc_5v ´ÆLK@ÞLK@·Öregulator-vcc3v3-sys,regulator-fixed ‘vcc3v3_sys ´Æ2Z Þ2Z  !·$regulator-vcc5v0-sys,regulator-fixed ‘vcc5v0_sys ´ÆLK@ÞLK@ Ö·!regulator-vcc3v3-m2-pcie,regulator-fixed ‘m2_pcie_3v3 ¿Æ2Z Þ2Z  «"¾×Èdefault Ò @ !·Æregulator-vcc3v3-mini-pcie,regulator-fixed ‘minipcie_3v3 ¿Æ2Z Þ2Z  @M¾ØÈdefault Òˆ !·bregulator-vcc5v0-usb20-host,regulator-fixed‘vcc5v0_usb20_host ¿ @"¾ÙÈdefault·¶regulator-vcc5v0-usb30-host,regulator-fixed‘vcc5v0_usb30_host ¿ @"¾ÚÈdefault·³regulator-vcc5v0-otg-vbus,regulator-fixed‘vcc5v0_otg_vbus ¿ÆLK@ÞLK@ @"¾ÛÈdefault·´ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfstdout-pathlabellinux,default-triggerdefault-stateenable-active-highstartup-delay-us