Ð þíù‘8í8( Yí ),rockchip,rk3568-evb1-v10rockchip,rk3568$7Rockchip RK3568 EVB1 DDR4 V10 Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe2a0000ç/ethernet@fe010000ñ/mmc@fe2b0000ö/mmc@fe310000cpus cpu@0ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· cpu@100ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· cpu@200ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· cpu@300ûcpu,arm,cortex-a55 !psci/€<@N€[€h@z€‡˜¬· l3-cache,cache¿Ë1>@P·display-subsystem,rockchip,display-subsystemÙfirmwarescmi ,arm,scmi-smcß‚ê protocol@14ð·hdmi-sound,simple-audio-cardýHDMIi2s-Gokaysimple-audio-card,codecNsimple-audio-card,cpuN pmu,arm,cortex-a55-pmu0Xäåæçc psci ,arm,psci-1.0(smcreserved-memory vshmem@10f000,arm,scmi-shmemð}·timer,arm,armv8-timer0X   „xin24m ,fixed-clock›n6«xin24mð·xin32k ,fixed-clock›€«xin32k¾Èdefaultðsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü@ ›œ�Ösatapmaliverxoob X_â çsata-phyñ Gdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü€  ¡¢Ösatapmaliverxoob X`â çsata-phyñ Gdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3üÀ@ X© ¦§¥Öref_clksuspend_clkbus_clkotg utmi_wide"”)Gokay âçusb2-phyusb3-phyBusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ý@ Xª ©ª¨Öref_clksuspend_clkbus_clkhost âçusb2-phyusb3-phy utmi_wide"•)Gokayinterrupt-controller@fd400000 ,arm,gic-v3 ý@ýF X I^oýAy(„v “·msi-controller@fd440000,arm,gic-v3-itsýD“„£·jusb@fd800000 ,generic-ehciý€ X‚ ½¾¼âçusbGokayusb@fd840000 ,generic-ohciý„ Xƒ ½¾¼âçusbGokayusb@fd880000 ,generic-ehciýˆ X… ¿À¼âçusbGokayusb@fd8c0000 ,generic-ohciýŒ X† ¿À¼âçusbGokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdý·hio-domains&,rockchip,rk3568-pmu-io-voltage-domainGokay®¼ÊØæôsyscon@fdc50000ýÅ ,rockchip,rk3568-pipe-grfsyscon·¼syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýÆ· syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýÈ·½syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýÉ·¾syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýÊ€·¿syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýÊ€€·Âclock-controller@fdd00000,rockchip,rk3568-pmucruýÐð,·clock-controller@fdd20000,rockchip,rk3568-cruýÒ Öxin24mð,9 I€G†Œ ëÂ^u ·i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýÔ X. - Öi2cpclk¾!Èdefault Gokayregulator@1c ,tcs,tcs4525‚Ÿvdd_cpu®ÂÔ 5ìŒ0ü"·regulator-state-mem$pmic@20,rockchip,rk809 #X9H^–ðÖmclk HÈdefault¾$%=Uf&r&~&Š&–&¢&®&º&Æ&Ò·áregulatorsDCDC_REG1 Ÿvdd_logic®ÂàÔ¡ ì™pqregulator-state-mem$DCDC_REG2Ÿvdd_gpu®àÔ¡ ì™pq·Hregulator-state-mem$DCDC_REG3Ÿvcc_ddr®Âàregulator-state-mem÷DCDC_REG4Ÿvdd_npuàÔ¡ ì™pqregulator-state-mem$DCDC_REG5Ÿvcc_1v8®ÂÔw@ìw@·regulator-state-mem$LDO_REG1Ÿvdda0v9_imageÔ » ì » ·dregulator-state-mem$LDO_REG2 Ÿvdda_0v9®ÂÔ » ì » regulator-state-mem$LDO_REG3 Ÿvdda0v9_pmu®ÂÔ » ì » regulator-state-mem÷ » LDO_REG4 Ÿvccio_acodec®Ô2Z ì2Z ·regulator-state-mem$LDO_REG5 Ÿvccio_sdÔw@ì2Z ·regulator-state-mem$LDO_REG6 Ÿvcc3v3_pmu®ÂÔ2Z ì2Z ·regulator-state-mem÷2Z LDO_REG7 Ÿvcca_1v8®ÂÔw@ìw@·¯regulator-state-mem$LDO_REG8 Ÿvcca1v8_pmu®ÂÔw@ìw@regulator-state-mem÷w@LDO_REG9Ÿvcca1v8_imageÔw@ìw@·eregulator-state-mem$SWITCH_REG1Ÿvcc_3v3®Â·regulator-state-mem$SWITCH_REG2 Ÿvcc3v3_sd·oregulator-state-mem$codec+serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýÕ Xt  ,Öbaudclkapb_pclkH''¾(ÈdefaultMZ Gdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×  0 Öpwmpclk¾)Èdefaultd Gdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×  0 Öpwmpclk¾*Èdefaultd Gdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×   0 Öpwmpclk¾+Èdefaultd Gdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmý×0  0 Öpwmpclk¾,Èdefaultd Gdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýÙpower-controller!,rockchip,rk3568-power-controllero ·power-domain@7 ƒ-opower-domain@8 ÌÍ ƒ./0opower-domain@9  ÚÛÜ ƒ123opower-domain@10  ñòƒ456789opower-domain@11  íƒ:opower-domain@13  ƒ;opower-domain@14  ƒ<=>opower-domain@15  ƒ?@ABCDEFogpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýæ@$X()' Šjobmmugpu ÖgpubusGokay˜GšH·¬video-codec@fdea0400,rockchip,rk3568-vpuýê X‹Švdpu îï Öaclkhclk¦I iommu@fdea0800,rockchip,rk3568-iommuýê@ XŠ Öaclkiface îï ­·Irga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýë€ XZ óôõÖaclkhclksclk"&$% ºcoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepuýî X@ ýþ Öaclkhclk¦J iommu@fdee0800,rockchip,rk3568-iommuýî@ X? ýþ Öaclkiface ­·Jvideo-capture@fdfe0000,rockchip,rk3568-vicapýþ X’9ÐIᣠ ÎÏÐÑÖaclkhclkdclkiclk¦K("÷øùûúºarsthrstdrstprstirstu  Gdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommuýþ X’ ÎÏ Öaclkiface­Æ Gdisabled·Kmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ@ Xd  ÁÂŽ�Öbiuciuciu-driveciu-sampleáìðÑ€"ëºreset Gdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aþX Šmacirqeth_wake_irq@ †‰‰ÇÃĉÈWÖstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref"ì ºstmmacethu úL M.NAGokay9‰†^‡IsY@JoutputWO brgmii-idÈdefault¾PQRSTmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22kN {†  �U·Ostmmac-axi-config™£³·Lrx-queues-config÷Mqueue0tx-queues-configÙ·Nqueue0vop@fe040000 þ0þ@ïvopgamma-lut X”( ÝÞßàá%Öaclkhclkdclk_vp0dclk_vp1dclk_vp2¦V u Gokay,rockchip,rk3568-vop9ßà^ IÞ)Þ)ports ·port@0 endpoint@2ùW·fport@1 endpoint@4ùX·Zport@2 iommu@fe043e00,rockchip,rk3568-iommu þ>þ? X” ÝÞ Öaclkiface­ Gokay·Vdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiþ XDÖpclk èçdphyâY ºapb"u Gokay  ports port@0endpointùZ·Xport@1endpointù[·_panel@0(,wanchanglong,w552793baaraydium,rm67200\ ] �^ -]8"C"portendpointù_·[dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiþ XEÖpclk éçdphyâ` ºapb"u  Gdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmiþ  X-( æç“(ÚÖiahbisfrcecrefÈdefault ¾abc Mu UGokayNd^e·ports port@0endpointùf·Wport@1endpointùg·Þqos@fe128000,rockchip,rk3568-qossysconþ€ ·-qos@fe138080,rockchip,rk3568-qossysconþ€€ ·<qos@fe138100,rockchip,rk3568-qossysconþ� ·=qos@fe138180,rockchip,rk3568-qossysconþ�€ ·>qos@fe148000,rockchip,rk3568-qossysconþ€ ·.qos@fe148080,rockchip,rk3568-qossysconþ€€ ·/qos@fe148100,rockchip,rk3568-qossysconþ� ·0qos@fe150000,rockchip,rk3568-qossysconþ ·:qos@fe158000,rockchip,rk3568-qossysconþ€ ·4qos@fe158100,rockchip,rk3568-qossysconþ� ·5qos@fe158180,rockchip,rk3568-qossysconþ�€ ·6qos@fe158200,rockchip,rk3568-qossysconþ‚ ·7qos@fe158280,rockchip,rk3568-qossysconþ‚€ ·8qos@fe158300,rockchip,rk3568-qossysconþƒ ·9qos@fe180000,rockchip,rk3568-qossysconþ qos@fe190000,rockchip,rk3568-qossysconþ ·?qos@fe190280,rockchip,rk3568-qossysconþ€ ·Cqos@fe190300,rockchip,rk3568-qossysconþ ·Dqos@fe190380,rockchip,rk3568-qossysconþ€ ·Eqos@fe190400,rockchip,rk3568-qossysconþ ·Fqos@fe198000,rockchip,rk3568-qossysconþ€ ·;qos@fe1a8000,rockchip,rk3568-qossysconþ€ ·1qos@fe1a8080,rockchip,rk3568-qossysconþ€€ ·2qos@fe1a8100,rockchip,rk3568-qossysconþ� ·3dfi@fe230000,rockchip,rk3568-dfiþ# X nhpcie@fe260000,rockchip,rk3568-pcie0À@þ&ôïdbiapbconfig<XKJIHGŠsyspmcmsglegacyerr{( �‚ƒ„…$Öaclk_mstaclk_slvaclk_dbipclkauxûpci^…`˜iiii¦·ÆÕäjìâ çpcie-phyTvôôô ô à@"¡ºpipe  Gdisabledlegacy-interrupt-controller^I XH·immc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ+@ Xb  °±Š‹Öbiuciuciu-driveciu-sampleáìðÑ€"ÔºresetGokayö  # Èdefault¾klmn % 3o ?mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ,@ Xc  ²³Œ�Öbiuciuciu-driveciu-sampleáìðÑ€"Öºreset Gdisabledspi@fe300000 ,rockchip,sfcþ0@ Xe xvÖclk_sfchclk_sfc¾pÈdefault Gdisabledmmc@fe310000,rockchip,rk3568-dwcmshcþ1 X9{}I ëÂn6( |zy{}ÖcorebusaxiblocktimerGokayöì ë LÈdefault¾qrstrng@fe388000,rockchip,rk3568-rngþ8€@ po Öcoreahb"mGokayi2s@fe400000,rockchip,rk3568-i2s-tdmþ@ X49=AIFÏqFÏq ?C9Ömclk_txmclk_rxhclkHu Ztx"PQ ºtx-mrx-mu UGokay· i2s@fe410000,rockchip,rk3568-i2s-tdmþA X59EIIFÏqFÏq GK:Ömclk_txmclk_rxhclkHuu Zrxtx"RS ºtx-mrx-mu Èdefault0¾vwxyz{|}~€�UGokay d·ài2s@fe420000,rockchip,rk3568-i2s-tdmþB X69MIFÏq OO;Ömclk_txmclk_rxhclkHuu Ztxrx"Tºtx-mu Èdefault¾‚ƒ„…U Gdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmþC X7 SW<Ömclk_txmclk_rxhclkHuu Ztxrx"UV ºtx-mrx-mu U Gdisabledpdm@fe440000,rockchip,rk3568-pdmþD XL ZYÖpdm_clkpdm_hclkHu  Zrx¾†‡ˆ‰Š‹Èdefault"Xºpdm-mU Gdisabledspdif@fe460000,rockchip,rk3568-spdifþF Xf Ömclkhclk _\Hu ZtxÈdefault¾ŒU Gdisableddma-controller@fe530000,arm,pl330arm,primecellþS@X     Öapb_pclk –·'dma-controller@fe550000,arm,pl330arm,primecellþU@X    Öapb_pclk –·ui2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþZ X/ HG Öi2cpclk¾�Èdefault Gokaygoodix@14,goodix,gt1151#X  ¡] ¯# Èdefault¾Ž� �# ¹]i2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ[ X0 JI Öi2cpclk¾�Èdefault  Gdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ\ X1 LK Öi2cpclk¾‘Èdefault  Gdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ] X2 NM Öi2cpclk¾’Èdefault  Gdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ^ X3 PO Öi2cpclk¾“Èdefault  Gdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtþ` X•  Ötclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiþa Xg RQÖspiclkapb_pclkH'' ZtxrxÈdefault ¾”•–  Gdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiþb Xh TSÖspiclkapb_pclkH'' ZtxrxÈdefault ¾—˜™  Gdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiþc Xi VUÖspiclkapb_pclkH'' ZtxrxÈdefault ¾š›œ  Gdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiþd Xj XWÖspiclkapb_pclkH'' ZtxrxÈdefault ¾�žŸ  Gdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartþe Xu Öbaudclkapb_pclkH''¾ ÈdefaultMZ Gdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartþf Xv # Öbaudclkapb_pclkH''¾¡ÈdefaultMZGokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartþg Xw '$Öbaudclkapb_pclkH''¾¢ÈdefaultMZ Gdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartþh Xx +(Öbaudclkapb_pclkH'' ¾£ÈdefaultMZ Gdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartþi Xy /,Öbaudclkapb_pclkH' ' ¾¤ÈdefaultMZ Gdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartþj Xz 30Öbaudclkapb_pclkH' ' ¾¥ÈdefaultMZ Gdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartþk X{ 74Öbaudclkapb_pclkH''¾¦ÈdefaultMZ Gdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartþl X| ;8Öbaudclkapb_pclkH''¾§ÈdefaultMZ Gdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartþm X} ?<Öbaudclkapb_pclkH''¾¨ÈdefaultMZ Gdisabledthermal-zonescpu-thermal Æd Üè ê©tripscpu_alert0 úp Ðpassive·ªcpu_alert1 ú$ø Ðpassivecpu_crit ús Ð criticalcooling-mapsmap0 ª0  ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal Æ Üè ê©tripsgpu-threshold úp Ðpassivegpu-target ú$ø Ðpassive·«gpu-crit ús Ð criticalcooling-mapsmap0 « ¬ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcþq Xs9If@ ®` Ötsadcapb_pclk"�‚×u  %sÈdefaultsleep¾­ <® FGokay \ s·©saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcþr X] Ösaradcapb_pclk"€ ºsaradc-apb ŽGokay  ¯pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn ZY Öpwmpclk¾°ÈdefaultdGokay·Ýpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn ZY Öpwmpclk¾±Èdefaultd Gdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn  ZY Öpwmpclk¾²Èdefaultd Gdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn0 ZY Öpwmpclk¾³Èdefaultd Gdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo ]\ Öpwmpclk¾´Èdefaultd Gdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo ]\ Öpwmpclk¾µÈdefaultd Gdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo  ]\ Öpwmpclk¾¶Èdefaultd Gdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo0 ]\ Öpwmpclk¾·Èdefaultd Gdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp `_ Öpwmpclk¾¸Èdefaultd Gdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp `_ Öpwmpclk¾¹Èdefaultd Gdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp  `_ Öpwmpclk¾ºÈdefaultd Gdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp0 `_ Öpwmpclk¾»Èdefaultd Gdisabledphy@fe830000,rockchip,rk3568-naneng-combphyþƒ "} Örefapbpipe9"Iõá"Ǻphy ¬¼ ¾½ ÔGokay·phy@fe840000,rockchip,rk3568-naneng-combphyþ„ %~ Örefapbpipe9%Iõá"ɺphy ¬¼ ¾¾ Ô Gdisabled·phy@fe870000,rockchip,rk3568-csi-dphyþ‡ yÖpclk Ô"ººapbu  Gdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyþ… Örefpclk z Ô ºapb"»Gokay·Ymipi-dphy@fe860000,rockchip,rk3568-dsi-dphyþ† Örefpclk { Ô ºapb"¼ Gdisabled·`usb2phy@fe8a0000,rockchip,rk3568-usb2phyþŠ Öphyclk«clk_usbphy0_480m X‡ ß¿ðGokay·host-port ÔGokay ïÀ·otg-port ÔGokay ïÁ·usb2phy@fe8b0000,rockchip,rk3568-usb2phyþ‹ Öphyclk«clk_usbphy1_480m Xˆ ßÂðGokayhost-port ÔGokay ïÀ·otg-port ÔGokay ïÀ·pinctrl,rockchip,rk3568-pinctrlu nh v·Ãgpio@fdd60000,rockchip,gpio-bankýÖ X! .  ú à  I^·#gpio@fe740000,rockchip,gpio-bankþt X" cd ú à  I^gpio@fe750000,rockchip,gpio-bankþu X# ef ú Ã@  I^·Ugpio@fe760000,rockchip,gpio-bankþv X$ gh ú Ã`  I^·^gpio@fe770000,rockchip,gpio-bankþw X% ij ú À  I^pcfg-pull-up "·Æpcfg-pull-none /·Äpcfg-pull-none-drv-level-1 / <·Èpcfg-pull-none-drv-level-2 / <·Çpcfg-pull-none-drv-level-3 / <·Ëpcfg-pull-up-drv-level-1 " <·Êpcfg-pull-up-drv-level-2 " <·Åpcfg-pull-none-smt / K·Éacodecaudiopwmbt656bt1120camcan0can0m0-pins ` Ä Ä·Ùcan1can1m0-pins `ÄÄ·Úcan2can2m0-pins ` Ä Ä·Ûcifclk32kclk32k-out0 `Ä·cpuebcedpdpemmcemmc-bus8€ ` Å ÅÅÅÅÅÅÅ·qemmc-clk `Å·remmc-cmd `Å·semmc-datastrobe `Ä·teth0eth1flashfspifspi-pins` `ÄÄÄÄÄÄ·pgmac0gmac0-miim `ÄÄ·Ôgmac0-rx-bus20 `ÄÄÄ·Ögmac0-tx-bus20 ` Ç Ç Ä·Õgmac0-rgmii-clk `ÄÈ·×gmac0-rgmii-bus@ `ÄÄÇÇ·Øgmac1gmac1m1-miim `ÄÄ·Pgmac1m1-rx-bus20 `ÄÄ Ä·Rgmac1m1-tx-bus20 `ÇÇÄ·Qgmac1m1-rgmii-clk `ÄÈ·Sgmac1m1-rgmii-bus@ `ÄÄÇÇ·Tgpuhdmitxhdmitxm0-cec `Ä·chdmitx-scl `Ä·ahdmitx-sda `Ä·bi2c0i2c0-xfer ` É É·!i2c1i2c1-xfer ` É É·�i2c2i2c2m0-xfer ` ÉÉ·�i2c3i2c3m0-xfer `ÉÉ·‘i2c4i2c4m0-xfer ` É É·’i2c5i2c5m0-xfer ` É É·“i2s1i2s1m0-lrckrx `Ä·yi2s1m0-lrcktx `Ä·xi2s1m0-mclk `Ä·%i2s1m0-sclkrx `Ä·wi2s1m0-sclktx `Ä·vi2s1m0-sdi0 ` Ä·zi2s1m0-sdi1 ` Ä·{i2s1m0-sdi2 ` Ä·|i2s1m0-sdi3 `Ä·}i2s1m0-sdo0 `Ä·~i2s1m0-sdo1 `Ä·i2s1m0-sdo2 ` Ä·€i2s1m0-sdo3 ` Ä·�i2s2i2s2m0-lrcktx `Ä·ƒi2s2m0-sclktx `Ä·‚i2s2m0-sdi `Ä·„i2s2m0-sdo `Ä·…i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk `Ä·†pdmm0-clk1 `Ä·‡pdmm0-sdi0 ` Ä·ˆpdmm0-sdi1 ` Ä·‰pdmm0-sdi2 ` Ä·Špdmm0-sdi3 `Ä·‹pmicpmic_int `Æ·$pmupwm0pwm0m0-pins `Ä·)pwm1pwm1m0-pins `Ä·*pwm2pwm2m0-pins `Ä·+pwm3pwm3-pins `Ä·,pwm4pwm4-pins `Ä·°pwm5pwm5-pins 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`Ä·�usbvcc5v0_usb_host_en `Ä·ãvcc5v0_usb_otg_en `Ä·åopp-table-0,operating-points-v2 n·opp-408000000 yQ– € øP øPŒ0 Žœ@opp-600000000 y#ÃF € øP øPŒ0 Žœ@opp-816000000 y0£, € øP øPŒ0 Žœ@ Ÿopp-1104000000 yAÍ´ € »  » Œ0 Žœ@opp-1416000000 yTfr €£è£èŒ0 Žœ@opp-1608000000 y_Ø" €ÈàÈàŒ0 Žœ@opp-1800000000 ykIÒ €Œ0Œ0Œ0 Žœ@opp-1992000000 yv»‚ €Œ0Œ0Œ0 Žœ@opp-table-1,operating-points-v2·Gopp-200000000 y ë € øP øPB@opp-300000000 yᣠ€ øP øPB@opp-400000000 yׄ € øP øPB@opp-600000000 y#ÃF € »  » B@opp-700000000 y)¹' €~ð~ðB@opp-800000000 y/¯ €B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü –—˜Ösatapmaliverxoob X^â çsata-phyñ Gdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconýÇ·Üqos@fe190080,rockchip,rk3568-qossysconþ€ ·@qos@fe190100,rockchip,rk3568-qossysconþ ·Aqos@fe190200,rockchip,rk3568-qossysconþ ·Bsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconýË€·Ìphy@fe8c0000,rockchip,rk3568-pcie3-phyþŒ Ô &'wÖrefclk_mrefclk_npclk"¾ºphy «Ì Gdisabled·Îpcie@fe270000,rockchip,rk3568-pcie {( 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltrockchip,mic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointclock-masterbacklightiovcc-supplyvdd-supplyvsn-supplyvsp-supplyavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsAVDD28-supplyirq-gpiosVDDIO-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfbrightness-levelsdefault-brightness-levelnum-interpolated-stepspower-supplypwmsstdout-pathfunctioncolorlinux,default-triggerenable-active-highgpio