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,arm,psci-1.0#smcreserved-memory qshmem@10f000,arm,scmi-shmemðx²timer,arm,armv8-timer0S   xin24m ,fixed-clock–n6¦xin24më²xin32k ,fixed-clock–€¦xin32k¹Ãdefaultësata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü@›œ�Ñsatapmaliverxoob S_Ý âsata-phyìþ Bdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü€ ¡¢Ñsatapmaliverxoob S`Ý âsata-phyìþ Bdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3üÀ@ S©¦§¥Ñref_clksuspend_clkbus_clk  peripheral utmi_wideþ”$BokayÝ âusb2-phy= Dhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ý@ Sª©ª¨Ñref_clksuspend_clkbus_clk host Ýâusb2-phyusb3-phy utmi_wideþ•$Bokayinterrupt-controller@fd400000 ,arm,gic-v3 ý@ýF S RgxýA‚(�q œ²msi-controller@fd440000,arm,gic-v3-itsýDœ�¬²busb@fd800000 ,generic-ehciý€ S‚½¾¼Ýâusb Bdisabledusb@fd840000 ,generic-ohciý„ Sƒ½¾¼Ýâusb Bdisabledusb@fd880000 ,generic-ehciýˆ S…¿À¼Ýâusb Bdisabledusb@fd8c0000 ,generic-ohciýŒ S†¿À¼Ýâusb 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²7qos@fe180000,rockchip,rk3568-qossysconþ qos@fe190000,rockchip,rk3568-qossysconþ ²=qos@fe190280,rockchip,rk3568-qossysconþ€ ²Aqos@fe190300,rockchip,rk3568-qossysconþ ²Bqos@fe190380,rockchip,rk3568-qossysconþ€ ²Cqos@fe190400,rockchip,rk3568-qossysconþ ²Dqos@fe198000,rockchip,rk3568-qossysconþ€ ²9qos@fe1a8000,rockchip,rk3568-qossysconþ€ ²/qos@fe1a8080,rockchip,rk3568-qossysconþ€€ ²0qos@fe1a8100,rockchip,rk3568-qossysconþ� ²1dfi@fe230000,rockchip,rk3568-dfiþ# S ú`pcie@fe260000,rockchip,rk3568-pcie0À@þ&ô¯dbiapbconfig<SKJIHGWsyspmcmsglegacyerr(�‚ƒ„…$Ñaclk_mstaclk_slvaclk_dbipclkauxöpcig`$aaaa2CRapbxÝ âpcie-phyþTqôôô ô à@¡‡pipe Bokay Mc‚$legacy-interrupt-controllergR SH²ammc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ+@ Sb °±Š‹Ñbiuciuciu-driveciu-sample®¹ðÑ€Ô‡reset Bdisabledmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ,@ Sc ²³Œ�Ñbiuciuciu-driveciu-sample®¹ðÑ€Ö‡reset Bdisabledspi@fe300000 ,rockchip,sfcþ0@ SexvÑclk_sfchclk_sfc¹dÃdefault Bdisabledmmc@fe310000,rockchip,rk3568-dwcmshcþ1 S4{}D ëÂn6(|zy{}ÑcorebusaxiblocktimerBokay’¹ ëœÃdefault¹efghrng@fe388000,rockchip,rk3568-rngþ8€@po ÑcoreahbmBokayi2s@fe400000,rockchip,rk3568-i2s-tdmþ@ S44=ADFÏqFÏq?C9Ñmclk_txmclk_rxhclkiªtxPQ ‡tx-mrx-mpÉBokay² i2s@fe410000,rockchip,rk3568-i2s-tdmþA S54EIDFÏqFÏqGK:Ñmclk_txmclk_rxhclkiiªrxtxRS ‡tx-mrx-mpÃdefault0¹jklmnopqrstuÉ Bdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmþB S64MDFÏqOO;Ñmclk_txmclk_rxhclkiiªtxrxT‡tx-mpÃdefault¹vwxyÉ Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmþC S7SW<Ñmclk_txmclk_rxhclkiiªtxrxUV ‡tx-mrx-mpÉ Bdisabledpdm@fe440000,rockchip,rk3568-pdmþD SLZYÑpdm_clkpdm_hclki ªrx¹z{|}~ÃdefaultX‡pdm-mÉ Bdisabledspdif@fe460000,rockchip,rk3568-spdifþF Sf Ñmclkhclk_\iªtxÃdefault¹€É Bdisableddma-controller@fe530000,arm,pl330arm,primecellþS@S ´  Ñapb_pclk˲%dma-controller@fe550000,arm,pl330arm,primecellþU@S´  Ñapb_pclk˲ii2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþZ S/HG Ñi2cpclk¹�Ãdefault  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Bdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartþf Sv# Ñbaudclkapb_pclk%%¹“Ãdefault'Bokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartþg Sw'$Ñbaudclkapb_pclk%%¹”Ãdefault' Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartþh Sx+(Ñbaudclkapb_pclk%% ¹•Ãdefault' Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartþi Sy/,Ñbaudclkapb_pclk% % ¹–Ãdefault' Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartþj Sz30Ñbaudclkapb_pclk% % ¹—Ãdefault' Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartþk S{74Ñbaudclkapb_pclk%%¹˜Ãdefault' Bdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartþl S|;8Ñbaudclkapb_pclk%%¹™Ãdefault' Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartþm S}?<Ñbaudclkapb_pclk%%¹šÃdefault' Bdisabledthermal-zonescpu-thermalÖdìèú›tripscpu_alert0 p Ðýpassive²œcpu_alert1 $ø Ðýpassivecpu_crit s Ð ýcriticalcooling-mapsmap0 !œ0 & ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalÖìèú›tripsgpu-threshold p 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Bdisabled²pinctrl,rockchip,rk3568-pinctrlpú` q²³gpio@fdd60000,rockchip,gpio-bankýÖ S!.   ³  &Rg²"gpio@fe740000,rockchip,gpio-bankþt S"cd  ³  &Rggpio@fe750000,rockchip,gpio-bankþu S#ef  ³@  &Rg²Tgpio@fe760000,rockchip,gpio-bankþv S$gh  ³`  &Rg²cgpio@fe770000,rockchip,gpio-bankþw S%ij  ³€  &Rgpcfg-pull-up 2²¶pcfg-pull-none ?²´pcfg-pull-none-drv-level-1 ? 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplybus-widthnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltcolorfunctionlinux,default-triggerenable-active-highgpio