Ð þíàd8Ô4( 0Óü 8,pine64,soquartz-model-apine64,soquartzrockchip,rk3566)7Pine64 SOQuartz on Model A carrier boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/mmc@fe2b0000â/mmc@fe310000ç/mmc@fe2c0000ì/ethernet@fe010000cpus cpu@0öcpu,arm,cortex-a55 psci*€7@I€V€c@u€‚“§² cpu@100öcpu,arm,cortex-a55 psci*€7@I€V€c@u€‚“§² cpu@200öcpu,arm,cortex-a55 psci*€7@I€V€c@u€‚“§² cpu@300öcpu,arm,cortex-a55 psci*€7@I€V€c@u€‚“§² l3-cache,cacheºÆ,9@K²display-subsystem,rockchip,display-subsystemÔfirmwarescmi ,arm,scmi-smcÚ‚å protocol@14ë²hdmi-sound,simple-audio-cardøHDMIi2s(Bokaysimple-audio-card,codecIsimple-audio-card,cpuI pmu,arm,cortex-a55-pmu0Säåæç^ psci ,arm,psci-1.0#smcreserved-memory qshmem@10f000,arm,scmi-shmemðx²timer,arm,armv8-timer0S   xin24m ,fixed-clock–n6¦xin24më²xin32k ,fixed-clock–€¦xin32k¹Ãdefaultësata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü@›œ�Ñsatapmaliverxoob S_Ý âsata-phyìþ Bdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciü€ ¡¢Ñsatapmaliverxoob S`Ý âsata-phyìþ Bdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3üÀ@ S©¦§¥Ñref_clksuspend_clkbus_clk otg utmi_wideþ”$BokayÝ âusb2-phy= Dhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ý@ Sª©ª¨Ñref_clksuspend_clkbus_clk host Ýâusb2-phyusb3-phy utmi_wideþ•$ Bdisabledinterrupt-controller@fd400000 ,arm,gic-v3 ý@ýF S RgxýA‚(�q œ²msi-controller@fd440000,arm,gic-v3-itsýDœ�¬²^usb@fd800000 ,generic-ehciý€ S‚½¾¼Ýâusb Bdisabledusb@fd840000 ,generic-ohciý„ Sƒ½¾¼Ýâusb Bdisabledusb@fd880000 ,generic-ehciýˆ S…¿À¼Ýâusb Bdisabledusb@fd8c0000 ,generic-ohciýŒ S†¿À¼Ýâusb Bdisabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdý²\io-domains&,rockchip,rk3568-pmu-io-voltage-domainBokay·ÅÓáïý 'syscon@fdc50000ýÅ ,rockchip,rk3566-pipe-grfsyscon²¹syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýƲsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýȲºsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýɲ»syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýÊ€²¼syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýÊ€€²¾clock-controller@fdd00000,rockchip,rk3568-pmucruýÐë5²clock-controller@fdd20000,rockchip,rk3568-cruýÒÑxin24më5B R€G†Œ ëÂg~²i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýÔ S.- Ñi2cpclk¹Ãdefault Bokayregulator@1c ,tcs,tcs4525‹¨vdd_cpu· 5ÏŒ0çüü" ²regulator-state-mem-pmic@20,rockchip,rk809 !Së¦rk808-clkout1rk808-clkout2Ãdefault¹"F^l#x#„#�#œ#¨#´#À#Ì#²˜regulatorsDCDC_REG1 ¨vdd_logicü·¡ Ï™pçqØregulator-state-memï » DCDC_REG2¨vdd_gpuü·¡ Ï™pçqزBregulator-state-mem-DCDC_REG3üبvcc_ddrregulator-state-memïDCDC_REG4ü·¡ Ï™pبvdd_npuregulator-state-mem-DCDC_REG5¨vcc_1v8ü·w@Ïw@²regulator-state-memïw@LDO_REG1ü· » Ï » ¨vdda0v9_image²Xregulator-state-memï » LDO_REG2ü· » Ï »  ¨vdda_0v9regulator-state-mem-LDO_REG3ü· » Ï »  ¨vdda0v9_pmuregulator-state-memï » LDO_REG4ü·2Z Ï2Z  ¨vccio_acodecregulator-state-mem-LDO_REG5ü·w@Ï2Z  ¨vccio_sd²regulator-state-mem-LDO_REG6ü·2Z Ï2Z  ¨vcc3v3_pmu²regulator-state-memï2Z LDO_REG7ü·w@Ïw@ ¨vcca_1v8²¬regulator-state-mem-LDO_REG8ü·w@Ïw@ ¨vcca1v8_pmu²�regulator-state-mem-LDO_REG9ü·w@Ïw@¨vcca1v8_image²Yregulator-state-mem-SWITCH_REG1¨vcc_3v3²regulator-state-mem-SWITCH_REG2 ¨vcc3v3_sdBokayü·2Z Ï2Z ²fregulator-state-memïserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýÕ St ,Ñbaudclkapb_pclk#$$¹%Ãdefault(5 Bdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmý× 0 Ñpwmpclk¹&Ãdefault? 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S”ÝÞ Ñaclkifaceˆþ Bokay²Qdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiþ SDÑpclkèâdphyÝSþ •apb~ Bdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiþ SEÑpclkéâdphyÝTþ •apb~ Bdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmiþ  S-(æç“(ÚÑiahbisfrcecrefÃdefault ¹UVWþ (~BokayX/Y²ports port@0endpointþZ²Rport@1endpointþ[²Éqos@fe128000,rockchip,rk3568-qossysconþ€ ²*qos@fe138080,rockchip,rk3568-qossysconþ€€ ²9qos@fe138100,rockchip,rk3568-qossysconþ� ²:qos@fe138180,rockchip,rk3568-qossysconþ�€ ²;qos@fe148000,rockchip,rk3568-qossysconþ€ ²+qos@fe148080,rockchip,rk3568-qossysconþ€€ ²,qos@fe148100,rockchip,rk3568-qossysconþ� ²-qos@fe150000,rockchip,rk3568-qossysconþ ²7qos@fe158000,rockchip,rk3568-qossysconþ€ ²1qos@fe158100,rockchip,rk3568-qossysconþ� ²2qos@fe158180,rockchip,rk3568-qossysconþ�€ ²3qos@fe158200,rockchip,rk3568-qossysconþ‚ ²4qos@fe158280,rockchip,rk3568-qossysconþ‚€ ²5qos@fe158300,rockchip,rk3568-qossysconþƒ ²6qos@fe180000,rockchip,rk3568-qossysconþ qos@fe190000,rockchip,rk3568-qossysconþ ²<qos@fe190280,rockchip,rk3568-qossysconþ€ ²=qos@fe190300,rockchip,rk3568-qossysconþ ²>qos@fe190380,rockchip,rk3568-qossysconþ€ ²?qos@fe190400,rockchip,rk3568-qossysconþ ²@qos@fe198000,rockchip,rk3568-qossysconþ€ ²8qos@fe1a8000,rockchip,rk3568-qossysconþ€ ².qos@fe1a8080,rockchip,rk3568-qossysconþ€€ ²/qos@fe1a8100,rockchip,rk3568-qossysconþ� ²0dfi@fe230000,rockchip,rk3568-dfiþ# S ?\pcie@fe260000,rockchip,rk3568-pcie0À@þ&ôôdbiapbconfig<SKJIHGesyspmcmsglegacyerrL(�‚ƒ„…$Ñaclk_mstaclk_slvaclk_dbipclkauxöpcigV`i]]]]wˆ—¦µ^½Ý âpcie-phyþTqôôô ô à@¡•pipe BokayÃdefault¹_ Ç` Óalegacy-interrupt-controllergR SH²]mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ+@ Sb °±Š‹Ñbiuciuciu-driveciu-sample¼ÇðÑ€Ô•resetBokayãí÷ Ãdefault¹bcde  fmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcþ,@ Sc ²³Œ�Ñbiuciuciu-driveciu-sample¼ÇðÑ€Ö•resetBokayí÷ , 9 Og ZÃdefault ¹hij h # spi@fe300000 ,rockchip,sfcþ0@ SexvÑclk_sfchclk_sfc¹kÃdefault Bdisabledmmc@fe310000,rockchip,rk3568-dwcmshcþ1 SB{}R ëÂn6(|zy{}ÑcorebusaxiblocktimerBokayí u Z  rng@fe388000,rockchip,rk3568-rngþ8€@po Ñcoreahbm Bdisabledi2s@fe400000,rockchip,rk3568-i2s-tdmþ@ S4B=ARFÏqFÏq?C9Ñmclk_txmclk_rxhclk#l „txPQ •tx-mrx-m~Bokay² i2s@fe410000,rockchip,rk3568-i2s-tdmþA S5BEIRFÏqFÏqGK:Ñmclk_txmclk_rxhclk#ll „rxtxRS •tx-mrx-m~Ãdefault0¹mnopqrstuvwx Bdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmþB S6BMRFÏqOO;Ñmclk_txmclk_rxhclk#ll „txrxT•tx-m~Ãdefault¹yz{| Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmþC S7SW<Ñmclk_txmclk_rxhclk#ll „txrxUV •tx-mrx-m~ Bdisabledpdm@fe440000,rockchip,rk3568-pdmþD SLZYÑpdm_clkpdm_hclk#l  „rx¹}~€�‚ÃdefaultX•pdm-m Bdisabledspdif@fe460000,rockchip,rk3568-spdifþF Sf Ñmclkhclk_\#l „txÃdefault¹ƒ Bdisableddma-controller@fe530000,arm,pl330arm,primecellþS@S  Ž  Ñapb_pclk ¥²$dma-controller@fe550000,arm,pl330arm,primecellþU@S Ž  Ñapb_pclk ¥²li2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþZ S/HG Ñi2cpclk¹„Ãdefault Bokayrtc@51 ,nxp,pcf85063Qi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ[ S0JI Ñi2cpclk¹…Ãdefault  Bdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ\ S1LK Ñi2cpclk¹†Ãdefault  Bdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ] S2NM Ñi2cpclk¹‡Ãdefault  Bdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cþ^ S3PO Ñi2cpclk¹ˆÃdefault  Bdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtþ` S• Ñtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiþa SgRQÑspiclkapb_pclk#$$ „txrxÃdefault ¹‰Š‹  Bdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiþb ShTSÑspiclkapb_pclk#$$ „txrxÃdefault ¹Œ�Ž  Bdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiþc SiVUÑspiclkapb_pclk#$$ „txrxÃdefault ¹��‘  Bdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiþd SjXWÑspiclkapb_pclk#$$ „txrxÃdefault ¹’“”  Bdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartþe SuÑbaudclkapb_pclk#$$ ¹•–—Ãdefault(5Bokay „txrx °bluetooth,brcm,bcm43438-bt˜Ñlpo À™ Ô™ æ™Ãdefault ¹š›œ õ# �serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartþf Sv# Ñbaudclkapb_pclk#$$¹žÃdefault(5Bokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartþg Sw'$Ñbaudclkapb_pclk#$$¹ŸÃdefault(5 Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartþh Sx+(Ñbaudclkapb_pclk#$$ ¹ Ãdefault(5 Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartþi Sy/,Ñbaudclkapb_pclk#$ $ ¹¡Ãdefault(5 Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartþj Sz30Ñbaudclkapb_pclk#$ $ ¹¢Ãdefault(5 Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartþk S{74Ñbaudclkapb_pclk#$$¹£Ãdefault(5Bokayserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartþl S|;8Ñbaudclkapb_pclk#$$¹¤Ãdefault(5 Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartþm S}?<Ñbaudclkapb_pclk#$$¹¥Ãdefault(5 Bdisabledthermal-zonescpu-thermal d $è 2¦tripscpu_alert0 Bp NÐýpassive²§cpu_alert1 B$ø NÐýpassivecpu_crit Bs NÐ ýcriticalcooling-mapsmap0 Y§0 ^ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal  $è 2¦tripsgpu-threshold Bp NÐýpassivegpu-target B$ø NÐýpassive²¨gpu-crit Bs NÐ ýcriticalcooling-mapsmap0 Y¨ ^©ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcþq SsBRf@ ®`Ñtsadcapb_pclk�‚×~ msÃdefaultsleep¹ª „« ŽBokay²¦saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcþr S]Ñsaradcapb_pclk€ •saradc-apb ¤ Bdisabled ¶¬pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþnZY Ñpwmpclk¹­Ãdefault? Bdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþnZY Ñpwmpclk¹®Ãdefault? Bdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn ZY Ñpwmpclk¹¯Ãdefault? Bdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþn0ZY Ñpwmpclk¹°Ãdefault? Bdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo]\ Ñpwmpclk¹±Ãdefault? Bdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo]\ Ñpwmpclk¹²Ãdefault? Bdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo ]\ Ñpwmpclk¹³Ãdefault? Bdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþo0]\ Ñpwmpclk¹´Ãdefault? Bdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp`_ Ñpwmpclk¹µÃdefault? Bdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp`_ Ñpwmpclk¹¶Ãdefault? Bdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp `_ Ñpwmpclk¹·Ãdefault? Bdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmþp0`_ Ñpwmpclk¹¸Ãdefault? Bdisabledphy@fe830000,rockchip,rk3568-naneng-combphyþƒ"} ÑrefapbpipeB"RõáÇ•phy ¹ Ôº ê Bdisabled²phy@fe840000,rockchip,rk3568-naneng-combphyþ„%~ ÑrefapbpipeB%RõáÉ•phy ¹ Ô» êBokay2#²phy@fe870000,rockchip,rk3568-csi-dphyþ‡yÑpclk 꺕apb~ Bdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyþ… Ñrefpclkz êþ •apb» Bdisabled²Smipi-dphy@fe860000,rockchip,rk3568-dsi-dphyþ† Ñrefpclk{ êþ •apb¼ Bdisabled²Tusb2phy@fe8a0000,rockchip,rk3568-usb2phyþŠÑphyclk¦clk_usbphy0_480m S‡ õ¼ëBokay²host-port ê Bdisabled²otg-port êBokay2½²usb2phy@fe8b0000,rockchip,rk3568-usb2phyþ‹Ñphyclk¦clk_usbphy1_480m Sˆ õ¾ë Bdisabledhost-port ê Bdisabled²otg-port ê Bdisabled²pinctrl,rockchip,rk3568-pinctrl~?\ q²¿gpio@fdd60000,rockchip,gpio-bankýÖ S!.   ¿  !Rg²!nextrst-hog -Í 6nEXTRST @gpio@fe740000,rockchip,gpio-bankþt S"cd  ¿  !Rg²`gpio@fe750000,rockchip,gpio-bankþu S#ef  ¿@  !Rg²™gpio@fe760000,rockchip,gpio-bankþv S$gh  ¿`  !Rggpio@fe770000,rockchip,gpio-bankþw S%ij  ¿€  !Rgpcfg-pull-up K²Âpcfg-pull-down X²Èpcfg-pull-none g²Àpcfg-pull-none-drv-level-1 g t²Äpcfg-pull-none-drv-level-2 g t²Ãpcfg-pull-none-drv-level-3 g t²Çpcfg-pull-up-drv-level-1 K t²Æpcfg-pull-up-drv-level-2 K t²Ápcfg-pull-none-smt g ƒ²Åacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ˜À²cpuebcedpdpemmceth0eth1flashfspifspi-pins` ˜ÀÀÀÀÀÀ²kgmac0gmac1gmac1m0-miim ˜ÀÀ²Jgmac1m0-clkinout ˜À²Ngmac1m0-rx-bus20 ˜ À À À²Lgmac1m0-tx-bus20 ˜ ÃÃÀ²Kgmac1m0-rgmii-clk ˜ÀIJMgmac1m0-rgmii-bus@ ˜ÀÀÃòOgpuhdmitxhdmitxm0-cec ˜À²Whdmitx-scl ˜À²Uhdmitx-sda ˜À²Vi2c0i2c0-xfer ˜ ŠŲi2c1i2c1-xfer ˜ ŠŲ„i2c2i2c2m1-xfer ˜ ŠŲ…i2c3i2c3m0-xfer ˜ÅŲ†i2c4i2c4m1-xfer ˜ ŠŲ‡i2c5i2c5m0-xfer ˜ ŠŲˆi2s1i2s1m1-lrckrx ˜À²pi2s1m1-lrcktx ˜À²oi2s1m1-sclkrx ˜À²ni2s1m1-sclktx ˜À²mi2s1m1-sdi0 ˜À²qi2s1m1-sdi1 ˜À²ri2s1m1-sdi2 ˜À²si2s1m1-sdi3 ˜À²ti2s1m1-sdo0 ˜À²ui2s1m1-sdo1 ˜À²vi2s1m1-sdo2 ˜ À²wi2s1m1-sdo3 ˜ À²xi2s2i2s2m0-lrcktx ˜À²zi2s2m0-sclktx ˜À²yi2s2m0-sdi ˜À²{i2s2m0-sdo ˜À²|i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ˜À²}pdmm0-clk1 ˜À²~pdmm0-sdi0 ˜ À²pdmm0-sdi1 ˜ À²€pdmm0-sdi2 ˜ À²�pdmm0-sdi3 ˜À²‚pmicpmic-int-l ˜Â²"pmupwm0pwm0m0-pins ˜À²&pwm1pwm1m0-pins ˜À²'pwm2pwm2m0-pins ˜À²(pwm3pwm3-pins ˜À²)pwm4pwm4-pins ˜À²­pwm5pwm5-pins ˜À²®pwm6pwm6-pins ˜À²¯pwm7pwm7-pins ˜À²°pwm8pwm8m0-pins ˜ À²±pwm9pwm9m0-pins ˜ À²²pwm10pwm10m0-pins ˜ À²³pwm11pwm11m0-pins ˜À²´pwm12pwm12m0-pins ˜À²µpwm13pwm13m0-pins ˜À²¶pwm14pwm14m0-pins ˜À²·pwm15pwm15m0-pins ˜À²¸refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ˜ÁÁÁÁ²bsdmmc0-clk ˜Á²csdmmc0-cmd ˜Á²dsdmmc0-det ˜Â²esdmmc1sdmmc1-bus4@ ˜ÁÁÁÁ²hsdmmc1-clk ˜Á²jsdmmc1-cmd ˜Á²isdmmc2spdifspdifm0-tx ˜À²ƒspi0spi0m0-pins0 ˜ ÀÀÀ²‹spi0m0-cs0 ˜À²‰spi0m0-cs1 ˜À²Šspi1spi1m0-pins0 ˜ ÀÀÀ²Žspi1m0-cs0 ˜À²Œspi1m0-cs1 ˜À²�spi2spi2m0-pins0 ˜ÀÀÀ²‘spi2m0-cs0 ˜À²�spi2m0-cs1 ˜À²�spi3spi3m0-pins0 ˜ ÀÀ À²”spi3m0-cs0 ˜À²’spi3m0-cs1 ˜À²“tsadctsadc-shutorg ˜À²ªtsadc-pin ˜À²«uart0uart0-xfer ˜Â²%uart1uart1m0-xfer ˜  ²•uart1m0-ctsn ˜À²–uart1m0-rtsn ˜ À²—uart2uart2m0-xfer ˜Â²žuart3uart3m0-xfer ˜Â²Ÿuart4uart4m0-xfer ˜Â² uart5uart5m0-xfer ˜Â²¡uart6uart6m0-xfer ˜Â²¢uart7uart7m2-xfer ˜Â²£uart8uart8m0-xfer ˜Â²¤uart9uart9m0-xfer ˜Â²¥vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h ˜À²œbt-host-wake-l ˜È²šbt-wake-l ˜À²›ledswork-led-enable-h ˜À²Ëdiy-led-enable-h ˜À²Êpciepcie-clkreq-h ˜Àpcie-reset-h ˜ À²_sdio-pwrseqwifi-enable-h ˜À²Ìopp-table-0,operating-points-v2 ¦²opp-408000000 ±Q– ¸ øP øPŒ0 Æœ@opp-600000000 ±#ÃF ¸ øP øPŒ0 Æœ@opp-816000000 ±0£, ¸ øP øPŒ0 Æœ@ ×opp-1104000000 ±AÍ´ ¸ »  » Œ0 Æœ@opp-1416000000 ±Tfr ¸£è£èŒ0 Æœ@opp-1608000000 ±_Ø" ¸ÈàÈàŒ0 Æœ@opp-1800000000 ±kIÒ ¸Œ0Œ0Œ0 Æœ@opp-table-1,operating-points-v2²Aopp-200000000 ± ë ¸ øP øPB@opp-300000000 ±á£ ¸ øP øPB@opp-400000000 ±ׄ ¸ øP øPB@opp-600000000 ±#ÃF ¸ »  » B@opp-700000000 ±)¹' ¸~ð~ðB@opp-800000000 ±/¯ ¸B@B@B@chosen ãserial2:1500000n8external-gmac1-clock ,fixed-clock–sY@ ¦gmac1_clkinë²Ihdmi-con,hdmi-connectorýaportendpointþɲ[leds ,gpio-ledsled-diy ïdiy-led õon Í! heartbeatÃdefault¹Ê Bokayled-work ïwork-led õoff Í!Ãdefault¹Ë Bokaysdio-pwrseqBokay,mmc-pwrseq-simple˜ Ñext_clockÃdefault¹Ì Ç™²gregulator-vbus,regulator-fixed¨vbusü·LK@ÏLK@"½²Íregulator-vcc5v0-sys,regulator-fixed ¨vcc5v0_sysü·LK@ÏLK@"Ͳ regulator-vcc3v3-sys,regulator-fixed ¨vcc3v3_sysü·2Z Ï2Z " ²#regulator-vcc12v-dcin,regulator-fixed ¨vcc12v_dcinü··Ï·²Îregulator-vcc5v0-usb,regulator-fixed ¨vcc5v0_usbü·LK@ÏLK@"β½regulator-vcc3v0-sd,regulator-fixed ¨vcc3v0_sdü·2Z Ï2Z "#regulator-vcc3v3-pcie,regulator-fixed ¨vcc3v3_pcieü·2Z Ï2Z "βaregulator-vcc12v-pcie,regulator-fixed ¨vcc12v_pcieü··Ï·"Î interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2ethernet0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybroken-cdbus-widthcap-sd-highspeeddisable-wpvqmmc-supplyvmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr50mmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsgpio-hogline-nameoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathlabeldefault-statelinux,default-triggerretain-state-suspended