Ð þíßÚ8ÓÔ( Óœ ',radxa,cm3-ioradxa,cm3rockchip,rk3566%7Radxa Compute Module 3(CM3) IO Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/mmc@fe310000â/ethernet@fe010000ì/mmc@fe2b0000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@100ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@200ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@300ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ l3-cache,cacheµÁ'4@F­display-subsystem,rockchip,display-subsystemÏfirmwarescmi ,arm,scmi-smcÕ‚à protocol@14ýæ­hdmi-sound,simple-audio-cardóHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NäåæçY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemýðs­timer,arm,armv8-timer0N   zxin24m ,fixed-clock‘n6¡xin24mæ­xin32k ,fixed-clock‘€¡xin32k´¾defaultæsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�Ìsatapmaliverxoob N_Ø Ýsata-phyçù =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢Ìsatapmaliverxoob N`Ø Ýsata-phyçù =disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ N©¦§¥Ìref_clksuspend_clkbus_clkotg utmi_wideù”=okayØ Ýusb2-phy8 ?high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ Nª©ª¨Ìref_clksuspend_clkbus_clkhost ØÝusb2-phyusb3-phy utmi_wideù•=okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF N MbsýA}(ˆl —­msi-controller@fd440000,arm,gic-v3-itsýýD—ˆ§­_usb@fd800000 ,generic-ehciýý€ N‚½¾¼ØÝusb=okayusb@fd840000 ,generic-ohciýý„ Nƒ½¾¼ØÝusb =disabledusb@fd880000 ,generic-ehciýýˆ N…¿À¼ØÝusb =disabledusb@fd8c0000 ,generic-ohciýýŒ N†¿À¼ØÝusb =disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýý­]io-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay²ÀÎÜêø"syscon@fdc50000ýýÅ ,rockchip,rk3566-pipe-grfsyscon­»syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆ­syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈ­¼syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉ­½syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€­¾syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€­Àclock-controller@fdd00000,rockchip,rk3568-pmucruýýÐæ0­clock-controller@fdd20000,rockchip,rk3568-cruýýÒÌxin24mæ0= M€G†Œ ëÂby­i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ N.- Ìi2cpclk´ ¾default =okayregulator@1c ,tcs,tcs4525ý†£vdd_cpu²ÆØ ß4ð5°ü!­regulator-state-mem(pmic@20,rockchip,rk817ý æ¡rk817-clkout1rk817-clkout2"N¾default´#AYg!s!!‹!—!£!¯!­œregulatorsDCDC_REG1 £vdd_logic²Æ»Ø¡ ð™pqregulator-state-memÒê » DCDC_REG2 £vdd_gpu_npu²Æ»Ø¡ ð™pq­Bregulator-state-mem(DCDC_REG3£vcc_ddr²Æ»regulator-state-memÒDCDC_REG4 £vcc3v3_sys²Æ»Ø2Z ð2Z ­Îregulator-state-memÒê2Z LDO_REG1 £vcca1v8_pmu²ÆØw@ðw@regulator-state-memÒêw@LDO_REG2 £vdda_0v9²ÆØ » ð » ­Óregulator-state-mem(LDO_REG3 £vdda0v9_pmu²ÆØ » ð » regulator-state-memÒê » LDO_REG4 £vccio_acodec²ÆØ2Z ð2Z ­regulator-state-mem(LDO_REG5 £vccio_sd²ÆØw@ð2Z ­regulator-state-mem(LDO_REG6 £vcc3v3_pmu²ÆØ2Z ð2Z ­regulator-state-memÒê2Z LDO_REG7 £vcc_1v8_p²ÆØw@ðw@­Íregulator-state-mem(LDO_REG8 £vcc1v8_dvp²ÆØw@ðw@regulator-state-mem(LDO_REG9 £vcc2v8_dvp²ÆØ*¹€ð*¹€regulator-state-mem(serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ Nt ,Ìbaudclkapb_pclk$$´%¾default  =disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´&¾default" =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´'¾default" =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 Ìpwmpclk´(¾default" =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 Ìpwmpclk´)¾default" =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controller- ­power-domain@7ýA*-power-domain@8ýÌÍ A+,--power-domain@9ý ÚÛÜ A./0-power-domain@10ý ñòA123456-power-domain@11ý íA7-power-domain@13ý A8-power-domain@14ý A9:;-power-domain@15ýA<=>?@-gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$N()' HjobmmugpuÌgpubusù=okayŽAXB­«video-codec@fdea0400,rockchip,rk3568-vpuýýê N‹Hvdpuîï ÌaclkhclkdCù iommu@fdea0800,rockchip,rk3568-iommuýýê@ NŠ Ìaclkifaceîïù k­Crga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýýë€ NZóôõÌaclkhclksclk&$% xcoreaxiahbù video-codec@fdee0000,rockchip,rk3568-vepuýýî N@ýþ ÌaclkhclkdDù iommu@fdee0800,rockchip,rk3568-iommuýýî@ N?ýþ Ìaclkifaceù k­Dvideo-capture@fdfe0000,rockchip,rk3568-vicapýýþ N’=ÐMᣠÎÏÐÑÌaclkhclkdclkiclkdEù(÷øùûúxarsthrstdrstprstirsty =disabledports port@0ýport@1ýiommu@fdfe0800,rockchip,rk3568-iommuýýþ N’ÎÏ Ìaclkifacekù„ =disabled­Emmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ Nd ÁÂŽ�Ìbiuciuciu-driveciu-sampleŸªðÑ€ëxreset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþN Hmacirqeth_wake_irq@†‰‰ÇÃĉÈWÌstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refì xstmmacethy¸FÈÙGìHÿ=okay=‰† b‡IMsY@inputJ rgmii¾default´KLMNOP )Q9 ON † dFm.mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ý­Jstmmac-axi-configv€�­Frx-queues-config ­Gqueue0tx-queues-config¶­Hqueue0vop@fe040000 ýþ0þ@Ìvopgamma-lut N”(ÝÞßàá%Ìaclkhclkdclk_vp0dclk_vp1dclk_vp2dRù y=okay,rockchip,rk3566-vop=ßàbports ­port@0ý endpoint@2ýÖS­[port@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? N”ÝÞ Ìaclkifacekù =okay­Rdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NDÌpclkèÝdphyØTù xapby =disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NEÌpclkéÝdphyØUù xapby =disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  N-(æç“(ÚÌiahbisfrcecref¾default ´VWXù  yæ=okay÷YZ­ports port@0ýendpointÖ[­Sport@1ýendpointÖ\­Ðqos@fe128000,rockchip,rk3568-qossysconýþ€ ­*qos@fe138080,rockchip,rk3568-qossysconýþ€€ ­9qos@fe138100,rockchip,rk3568-qossysconýþ� ­:qos@fe138180,rockchip,rk3568-qossysconýþ�€ ­;qos@fe148000,rockchip,rk3568-qossysconýþ€ ­+qos@fe148080,rockchip,rk3568-qossysconýþ€€ ­,qos@fe148100,rockchip,rk3568-qossysconýþ� ­-qos@fe150000,rockchip,rk3568-qossysconýþ ­7qos@fe158000,rockchip,rk3568-qossysconýþ€ ­1qos@fe158100,rockchip,rk3568-qossysconýþ� ­2qos@fe158180,rockchip,rk3568-qossysconýþ�€ ­3qos@fe158200,rockchip,rk3568-qossysconýþ‚ ­4qos@fe158280,rockchip,rk3568-qossysconýþ‚€ ­5qos@fe158300,rockchip,rk3568-qossysconýþƒ ­6qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ ­<qos@fe190280,rockchip,rk3568-qossysconýþ€ ­=qos@fe190300,rockchip,rk3568-qossysconýþ ­>qos@fe190380,rockchip,rk3568-qossysconýþ€ ­?qos@fe190400,rockchip,rk3568-qossysconýþ ­@qos@fe198000,rockchip,rk3568-qossysconýþ€ ­8qos@fe1a8000,rockchip,rk3568-qossysconýþ€ ­.qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ ­/qos@fe1a8100,rockchip,rk3568-qossysconýþ� ­0dfi@fe230000,rockchip,rk3568-dfiýþ# N ]pcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôÌdbiapbconfig<NKJIHGHsyspmcmsglegacyerr$(�‚ƒ„…$Ìaclk_mstaclk_slvaclk_dbipclkauxñpcib.`A^^^^O`o~�_•Ø Ýpcie-phyùTlôôô ô à@¡xpipe  =disabledlegacy-interrupt-controllerbM NH­^mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ Nb °±Š‹Ìbiuciuciu-driveciu-sampleŸªðÑ€Ôxreset=okayŸ©»Ì×¾default´`abcdmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ Nc ²³Œ�Ìbiuciuciu-driveciu-sampleŸªðÑ€Öxreset=okay ŸÌ»äñ e ¾default ´fgh  .×wifi@1,brcm,bcm43455-fmacýiN Hhost-wake¾default´jspi@fe300000 ,rockchip,sfcýþ0@ NexvÌclk_sfchclk_sfc´k¾default =disabledmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 N={}M ëÂn6(|zy{}Ìcorebusaxiblocktimer=okayŸª ë : ¾default´lmno .×rng@fe388000,rockchip,rk3568-rngýþ8€@po Ìcoreahbm =disabledi2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ N4==AMFÏqFÏq?C9Ìmclk_txmclk_rxhclkp ItxPQ xtx-mrx-myæ =disabled­ i2s@fe410000,rockchip,rk3568-i2s-tdmýþA N5=EIMFÏqFÏqGK:Ìmclk_txmclk_rxhclkpp IrxtxRS xtx-mrx-my¾default0´qrstuvwxyz{|æ =disabledi2s@fe420000,rockchip,rk3568-i2s-tdmýþB N6=MMFÏqOO;Ìmclk_txmclk_rxhclkpp ItxrxTxtx-my¾default´}~€æ =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC N7SW<Ìmclk_txmclk_rxhclkpp ItxrxUV xtx-mrx-myæ =disabledpdm@fe440000,rockchip,rk3568-pdmýþD NLZYÌpdm_clkpdm_hclkp  Irx´�‚ƒ„…†¾defaultXxpdm-mæ =disabledspdif@fe460000,rockchip,rk3568-spdifýþF Nf Ìmclkhclk_\p Itx¾default´‡æ =disableddma-controller@fe530000,arm,pl330arm,primecellýþS@N  S  Ìapb_pclk j­$dma-controller@fe550000,arm,pl330arm,primecellýþU@N S  Ìapb_pclk j­pi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ N/HG Ìi2cpclk´ˆ¾default  =disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ N0JI Ìi2cpclk´‰¾default  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ N1LK Ìi2cpclk´Š¾default  =disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] N2NM Ìi2cpclk´‹¾default  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ N3PO Ìi2cpclk´Œ¾default  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` N• Ìtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa NgRQÌspiclkapb_pclk$$ Itxrx¾default ´�Ž�  =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb NhTSÌspiclkapb_pclk$$ Itxrx¾default ´�‘’  =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc NiVUÌspiclkapb_pclk$$ Itxrx¾default ´“”•  =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd NjXWÌspiclkapb_pclk$$ Itxrx¾default ´–—˜  =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe NuÌbaudclkapb_pclk$$ ´™š›¾default =okaybluetooth,brcm,bcm4345c5œÌlpo ui  ‰i ¾default ´�žŸ ›i ª ¶serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf Nv# Ìbaudclkapb_pclk$$´ ¾default =okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg Nw'$Ìbaudclkapb_pclk$$´¡¾default  =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh Nx+(Ìbaudclkapb_pclk$$ ´¢¾default  =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi Ny/,Ìbaudclkapb_pclk$ $ ´£¾default  =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj Nz30Ìbaudclkapb_pclk$ $ ´¤¾default  =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk N{74Ìbaudclkapb_pclk$$´¥¾default  =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl N|;8Ìbaudclkapb_pclk$$´¦¾default  =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm N}?<Ìbaudclkapb_pclk$$´§¾default  =disabledthermal-zonescpu-thermal Ãd Ùè ç¨tripscpu_alert0 ÷p Ðøpassive­©cpu_alert1 ÷$ø Ðøpassivecpu_crit ÷s Ð øcriticalcooling-mapsmap0 ©0  ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal à Ùè ç¨tripsgpu-threshold ÷p Ðøpassivegpu-target ÷$ø Ðøpassive­ªgpu-crit ÷s Ð øcriticalcooling-mapsmap0 ª «ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq Ns=Mf@ ®`Ìtsadcapb_pclk�‚×y "s¾defaultsleep´¬ 9­ C=okay Y p­¨saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr N]Ìsaradcapb_pclk€ xsaradc-apb ‹=okay �®pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´¯¾default" =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´°¾default" =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY Ìpwmpclk´±¾default" =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY Ìpwmpclk´²¾default" =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´³¾default" =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´´¾default" =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ Ìpwmpclk´µ¾default" =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ Ìpwmpclk´¶¾default" =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´·¾default" =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´¸¾default" =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ Ìpwmpclk´¹¾default" =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ Ìpwmpclk´º¾default" =disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} Ìrefapbpipe="MõáÇxphy ©» »¼ Ñ=okay­phy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ Ìrefapbpipe=%MõáÉxphy ©» »½ Ñ =disabled­phy@fe870000,rockchip,rk3568-csi-dphyýþ‡yÌpclk Ѻxapby =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… Ìrefpclkz Ñù xapb» =disabled­Tmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† Ìrefpclk{ Ñù xapb¼ =disabled­Uusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠÌphyclk¡clk_usbphy0_480m N‡ ܾæ=okay­host-port Ñ=okay ì¿­otg-port Ñ=okay­usb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹Ìphyclk¡clk_usbphy1_480m Nˆ ÜÀæ=okayhost-port Ñ=okay­otg-port Ñ=okay­pinctrl,rockchip,rk3568-pinctrly] l­Ágpio@fdd60000,rockchip,gpio-bankýýÖ N!.  ÷ Á  Mb­"gpio@fe740000,rockchip,gpio-bankýþt N"cd ÷ Á  Mbgpio@fe750000,rockchip,gpio-bankýþu N#ef ÷ Á@  Mb­igpio@fe760000,rockchip,gpio-bankýþv N$gh ÷ Á`  Mb­Ñgpio@fe770000,rockchip,gpio-bankýþw N%ij ÷ Á€  Mb­Qpcfg-pull-up ­Äpcfg-pull-none ,­Âpcfg-pull-none-drv-level-1 , 9­Æpcfg-pull-none-drv-level-2 , 9­Åpcfg-pull-none-drv-level-3 , 9­Êpcfg-pull-none-drv-level-15 , 9­Çpcfg-pull-up-drv-level-1  9­Épcfg-pull-up-drv-level-2  9­Ãpcfg-pull-none-smt , H­Èacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ]­cpuebcedpdpemmcemmc-bus8€ ] à ÃÃÃÃÃÃílemmc-clk ]ímemmc-cmd ]ínemmc-datastrobe ]­oeth0eth1flashfspifspi-pins` ]­kgmac0gmac1gmac1m0-miim ]ÇÇ­Kgmac1m0-clkinout ]Ç­Pgmac1m0-rx-bus20 ] Ç Ç Ç­Mgmac1m0-tx-bus20 ] ÇÇÇ­Lgmac1m0-rgmii-clk ]ÇÇ­Ngmac1m0-rgmii-bus@ ]ÇÇÇÇ­Ogpuhdmitxhdmitxm0-cec ]­Xhdmitx-scl ]­Vhdmitx-sda ]­Wi2c0i2c0-xfer ] È È­ i2c1i2c1-xfer ] È È­ˆi2c2i2c2m0-xfer ] ÈÈ­‰i2c3i2c3m0-xfer ]ÈÈ­Ši2c4i2c4m0-xfer ] È È­‹i2c5i2c5m0-xfer ] È È­Œi2s1i2s1m0-lrckrx ]­ti2s1m0-lrcktx ]­si2s1m0-sclkrx ]­ri2s1m0-sclktx ]­qi2s1m0-sdi0 ] ­ui2s1m0-sdi1 ] ­vi2s1m0-sdi2 ] ­wi2s1m0-sdi3 ]­xi2s1m0-sdo0 ]­yi2s1m0-sdo1 ]­zi2s1m0-sdo2 ] ­{i2s1m0-sdo3 ] ­|i2s2i2s2m0-lrcktx ]­~i2s2m0-sclktx ]­}i2s2m0-sdi ]­i2s2m0-sdo ]­€i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ]­�pdmm0-clk1 ]­‚pdmm0-sdi0 ] ­ƒpdmm0-sdi1 ] ­„pdmm0-sdi2 ] ­…pdmm0-sdi3 ]­†pmicpmic-int-l ]Ä­#pmupwm0pwm0m0-pins ]­&pwm1pwm1m0-pins ]­'pwm2pwm2m0-pins ]­(pwm3pwm3-pins ]­)pwm4pwm4-pins ]­¯pwm5pwm5-pins ]­°pwm6pwm6-pins ]­±pwm7pwm7-pins ]­²pwm8pwm8m0-pins ] ­³pwm9pwm9m0-pins ] ­´pwm10pwm10m0-pins ] ­µpwm11pwm11m0-pins ]­¶pwm12pwm12m0-pins ]­·pwm13pwm13m0-pins ]­¸pwm14pwm14m0-pins ]­¹pwm15pwm15m0-pins ]­ºrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0ethernet0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaysnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplymmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendcolorfunctionlinux,default-triggerdefault-statereset-gpiosstdout-pathenable-active-high