Ð þíä 8×$( çÖì ",pine64,quartz64-arockchip,rk35667Pine64 Quartz64 Model Aaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe010000ç/mmc@fe2b0000ì/mmc@fe310000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@100ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@200ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@300ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ l3-cache,cacheµÁ'4@F­display-subsystem,rockchip,display-subsystemÏfirmwarescmi ,arm,scmi-smcÕ‚à protocol@14ýæ­hdmi-sound,simple-audio-cardóHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NäåæçY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemýðs­timer,arm,armv8-timer0N   zxin24m ,fixed-clock‘n6¡xin24mæ­xin32k ,fixed-clock‘€¡xin32k´¾defaultæsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�Ìsatapmaliverxoob N_Ø Ýsata-phyçù =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢Ìsatapmaliverxoob N`Ø Ýsata-phyçù =disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ N©¦§¥Ìref_clksuspend_clkbus_clkhost utmi_wideù”=okayØ Ýusb2-phy8 ?high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ Nª©ª¨Ìref_clksuspend_clkbus_clkhost ØÝusb2-phyusb3-phy utmi_wideù•=okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF N MbsýA}(ˆl —­msi-controller@fd440000,arm,gic-v3-itsýýD—ˆ§­`usb@fd800000 ,generic-ehciýý€ N‚½¾¼ØÝusb=okayusb@fd840000 ,generic-ohciýý„ Nƒ½¾¼ØÝusb=okayusb@fd880000 ,generic-ehciýýˆ N…¿À¼ØÝusb=okayusb@fd8c0000 ,generic-ohciýýŒ N†¿À¼ØÝusb=okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýý­^io-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay²ÀÎÜêø"syscon@fdc50000ýýÅ ,rockchip,rk3566-pipe-grfsyscon­´syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆ­ syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈ­µsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉ­¶syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€­·syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€­ºclock-controller@fdd00000,rockchip,rk3568-pmucruýýÐæ0­clock-controller@fdd20000,rockchip,rk3568-cruýýÒÌxin24mæ0= M€G†Œ ëÂby ­i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ N.- Ìi2cpclk´!¾default =okayregulator@1c ,tcs,tcs4525ý†£vdd_cpu² 5ÊŒ0âü÷ "­regulator-state-mem(pmic@20,rockchip,rk817ý #N=Hb–ÌmclkH¡rk808-clkout1rk808-clkout2æ¾default´$%AYjx"„"�"œ"¨"´"À"Ì"Ø&­’regulatorsDCDC_REG1÷ ²¡ Ê™pâqä £vdd_logicregulator-state-memû » DCDC_REG2÷ ²¡ Ê™pâqä£vdd_gpu­Eregulator-state-mem(DCDC_REG3÷ ä£vcc_ddrregulator-state-memûDCDC_REG4÷ ²2Z Ê2Z ä£vcc_3v3­regulator-state-mem(LDO_REG1÷ ²w@Êw@ £vcca1v8_pmu­—regulator-state-memûw@LDO_REG2÷ ² » Ê »  £vdda_0v9­[regulator-state-mem(LDO_REG3÷ ² » Ê »  £vdda0v9_pmuregulator-state-memû » LDO_REG4÷ ²2Z Ê2Z  £vccio_acodec­regulator-state-mem(LDO_REG5÷ ²w@Ê2Z  £vccio_sd­regulator-state-mem(LDO_REG6÷ ²2Z Ê2Z  £vcc3v3_pmu­regulator-state-memû2Z LDO_REG7÷ ²w@Êw@£vcc_1v8­regulator-state-mem(LDO_REG8÷ ²w@Êw@ £vcc1v8_dvp­regulator-state-mem(LDO_REG9÷ ²*¹€Ê*¹€ £vcc2v8_dvpregulator-state-mem(BOOST÷ ²LK@ÊLK@£boost­&regulator-state-mem(OTG_SWITCH £otg_switchregulator-state-mem(serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ Nt ,Ìbaudclkapb_pclk/''´(¾default4A=okaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´)¾defaultK =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´*¾defaultK =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 Ìpwmpclk´+¾defaultK =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 Ìpwmpclk´,¾defaultK =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controllerV ­power-domain@7ýj-Vpower-domain@8ýÌÍ j./0Vpower-domain@9ý ÚÛÜ j123Vpower-domain@10ý ñòj456789Vpower-domain@11ý íj:Vpower-domain@13ý j;Vpower-domain@14ý j<=>Vpower-domain@15ýj?@ABCVgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$N()' qjobmmugpuÌgpubusù=okayŽD�E­¥video-codec@fdea0400,rockchip,rk3568-vpuýýê N‹qvdpuîï Ìaclkhclk�Fù iommu@fdea0800,rockchip,rk3568-iommuýýê@ NŠ Ìaclkifaceîïù ”­Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýýë€ NZóôõÌaclkhclksclk&$% ¡coreaxiahbù video-codec@fdee0000,rockchip,rk3568-vepuýýî N@ýþ Ìaclkhclk�Gù iommu@fdee0800,rockchip,rk3568-iommuýýî@ N?ýþ Ìaclkifaceù ”­Gvideo-capture@fdfe0000,rockchip,rk3568-vicapýýþ N’=ÐMᣠÎÏÐÑÌaclkhclkdclkiclk�Hù(÷øùûú¡arsthrstdrstprstirsty  =disabledports port@0ýport@1ýiommu@fdfe0800,rockchip,rk3568-iommuýýþ N’ÎÏ Ìaclkiface”ù­ =disabled­Hmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ Nd ÁÂŽ�Ìbiuciuciu-driveciu-sampleÈÓðÑ€ë¡reset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþN qmacirqeth_wake_irq@†‰‰ÇÃĉÈWÌstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refì ¡stmmacethy áIñJK(=okay=‰‡†b‡†L1input>Irgmii¾default´MNOPQR R#b xN † �0–ŸSmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ý­Sstmmac-axi-configª´Ä­Irx-queues-configÔ­Jqueue0tx-queues-configê­Kqueue0vop@fe040000 ýþ0þ@vopgamma-lut N”(ÝÞßàá%Ìaclkhclkdclk_vp0dclk_vp1dclk_vp2�Tù y =okay,rockchip,rk3566-vop=ßàbports ­port@0ý endpoint@2ý U­\port@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? N”ÝÞ Ìaclkiface”ù =okay­Tdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NDÌpclkèÝdphyØVù ¡apby  =disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NEÌpclkéÝdphyØWù ¡apby  =disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  N-(æç“(ÚÌiahbisfrcecref¾default ´XYZù 4y Y=okay[*­ports port@0ýendpoint \­Uport@1ýendpoint ]­Çqos@fe128000,rockchip,rk3568-qossysconýþ€ ­-qos@fe138080,rockchip,rk3568-qossysconýþ€€ ­<qos@fe138100,rockchip,rk3568-qossysconýþ� ­=qos@fe138180,rockchip,rk3568-qossysconýþ�€ ­>qos@fe148000,rockchip,rk3568-qossysconýþ€ ­.qos@fe148080,rockchip,rk3568-qossysconýþ€€ ­/qos@fe148100,rockchip,rk3568-qossysconýþ� ­0qos@fe150000,rockchip,rk3568-qossysconýþ ­:qos@fe158000,rockchip,rk3568-qossysconýþ€ ­4qos@fe158100,rockchip,rk3568-qossysconýþ� ­5qos@fe158180,rockchip,rk3568-qossysconýþ�€ ­6qos@fe158200,rockchip,rk3568-qossysconýþ‚ ­7qos@fe158280,rockchip,rk3568-qossysconýþ‚€ ­8qos@fe158300,rockchip,rk3568-qossysconýþƒ ­9qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ ­?qos@fe190280,rockchip,rk3568-qossysconýþ€ ­@qos@fe190300,rockchip,rk3568-qossysconýþ ­Aqos@fe190380,rockchip,rk3568-qossysconýþ€ ­Bqos@fe190400,rockchip,rk3568-qossysconýþ ­Cqos@fe198000,rockchip,rk3568-qossysconýþ€ ­;qos@fe1a8000,rockchip,rk3568-qossysconýþ€ ­1qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ ­2qos@fe1a8100,rockchip,rk3568-qossysconýþ� ­3dfi@fe230000,rockchip,rk3568-dfiýþ# N :^pcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôdbiapbconfig<NKJIHGqsyspmcmsglegacyerrG(�‚ƒ„…$Ìaclk_mstaclk_slvaclk_dbipclkauxñpcibQ`d____rƒ’¡°`¸Ø Ýpcie-phyùTlôôô ô à@¡¡pipe =okay¾default´a Âb Îclegacy-interrupt-controllerbM NH­_mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ Nb °±Š‹Ìbiuciuciu-driveciu-sampleÈÓðÑ€Ô¡reset=okayÞè ù# ¾default´defg  h 'mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ Nc ²³Œ�Ìbiuciuciu-driveciu-sampleÈÓðÑ€Ö¡reset=okayÞè 4 A Wi b¾default ´jkl  m 'spi@fe300000 ,rockchip,sfcýþ0@ NexvÌclk_sfchclk_sfc´n¾default =disabled flash@0,jedec,spi-norý pn6 ‚ “mmc@fe310000,rockchip,rk3568-dwcmshcýþ1 N={}M ëÂn6(|zy{}Ìcorebusaxiblocktimer=okayÞ ¤ b  'rng@fe388000,rockchip,rk3568-rngýþ8€@po Ìcoreahbm =disabledi2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ N4==AMFÏqFÏq?C9Ìmclk_txmclk_rxhclk/o ³txPQ ¡tx-mrx-my Y=okay­ i2s@fe410000,rockchip,rk3568-i2s-tdmýþA N5=EIMFÏqFÏqGK:Ìmclk_txmclk_rxhclk/oo ³rxtxRS ¡tx-mrx-my ¾default´pqrsY=okay ½­Êi2s@fe420000,rockchip,rk3568-i2s-tdmýþB N6=MMFÏqOO;Ìmclk_txmclk_rxhclk/oo ³txrxT¡tx-my ¾default´tuvwY =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC N7SW<Ìmclk_txmclk_rxhclk/oo ³txrxUV ¡tx-mrx-my Y =disabledpdm@fe440000,rockchip,rk3568-pdmýþD NLZYÌpdm_clkpdm_hclk/o  ³rx´xyz{|}¾defaultX¡pdm-mY =disabledspdif@fe460000,rockchip,rk3568-spdifýþF Nf Ìmclkhclk_\/o ³tx¾default´~Y=okay­Ìdma-controller@fe530000,arm,pl330arm,primecellýþS@N  Ø  Ìapb_pclk ï­'dma-controller@fe550000,arm,pl330arm,primecellýþU@N Ø  Ìapb_pclk ï­oi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ N/HG Ìi2cpclk´¾default  =disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ N0JI Ìi2cpclk´€¾default  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ N1LK Ìi2cpclk´�¾default =okayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] N2NM Ìi2cpclk´‚¾default  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ N3PO Ìi2cpclk´ƒ¾default  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` N• Ìtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa NgRQÌspiclkapb_pclk/'' ³txrx¾default ´„…†  =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb NhTSÌspiclkapb_pclk/'' ³txrx¾default´‡ˆ  =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc NiVUÌspiclkapb_pclk/'' ³txrx¾default ´‰Š‹  =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd NjXWÌspiclkapb_pclk/'' ³txrx¾default ´Œ�Ž  =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe NuÌbaudclkapb_pclk/'' ´��‘¾default4A=okay ³txrx úbluetooth,brcm,bcm43438-bt’Ìlpo “ “ 0“¾default ´”•– ?" K— X-ÆÀserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf Nv# Ìbaudclkapb_pclk/''´˜¾default4A=okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg Nw'$Ìbaudclkapb_pclk/''´™¾default4A =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh Nx+(Ìbaudclkapb_pclk/'' ´š¾default4A =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi Ny/,Ìbaudclkapb_pclk/' ' ´›¾default4A =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj Nz30Ìbaudclkapb_pclk/' ' ´œ¾default4A =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk N{74Ìbaudclkapb_pclk/''´�¾default4A =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl N|;8Ìbaudclkapb_pclk/''´ž¾default4A =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm N}?<Ìbaudclkapb_pclk/''´Ÿ¾default4A =disabledthermal-zonescpu-thermal bd xè † tripscpu_alert0 –p ¢Ðøpassive­¡cpu_alert1 –$ø ¢Ðøpassivecpu_crit –s ¢Ð øcriticalcpu_hot –ÖØ ¢Ðøactive­¢cooling-mapsmap0 ­¡0 ² ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿmap1 ­¢ ²£ÿÿÿÿÿÿÿÿgpu-thermal b xè † tripsgpu-threshold –p ¢Ðøpassivegpu-target –$ø ¢Ðøpassive­¤gpu-crit –s ¢Ð øcriticalcooling-mapsmap0 ­¤ ²¥ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq Ns=Mf@ ®`Ìtsadcapb_pclk�‚×y  Ás¾defaultsleep´¦ ا â=okay ø ­ saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr N]Ìsaradcapb_pclk€ ¡saradc-apb * =disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´¨¾defaultK =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´©¾defaultK =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY Ìpwmpclk´ª¾defaultK =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY Ìpwmpclk´«¾defaultK =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´¬¾defaultK =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´­¾defaultK =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ Ìpwmpclk´®¾defaultK =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ Ìpwmpclk´¯¾defaultK =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´°¾defaultK =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´±¾defaultK =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ Ìpwmpclk´²¾defaultK =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ Ìpwmpclk´³¾defaultK =disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} Ìrefapbpipe="MõáÇ¡phy <´ Nµ d=okay­phy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ Ìrefapbpipe=%MõáÉ¡phy <´ N¶ d=okay­phy@fe870000,rockchip,rk3568-csi-dphyýþ‡yÌpclk dº¡apby  =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… Ìrefpclkz dù ¡apb» =disabled­Vmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† Ìrefpclk{ dù ¡apb¼ =disabled­Wusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠÌphyclk¡clk_usbphy0_480m N‡ o·æ=okay­host-port d=okay>¸­otg-port d=okay>¹­usb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹Ìphyclk¡clk_usbphy1_480m Nˆ oºæ=okayhost-port d=okay>¸­otg-port d=okay>¸­pinctrl,rockchip,rk3568-pinctrly :^ l­»gpio@fdd60000,rockchip,gpio-bankýýÖ N!.   �»  ›Mb­#gpio@fe740000,rockchip,gpio-bankýþt N"cd  �»  ›Mb­bgpio@fe750000,rockchip,gpio-bankýþu N#ef  �»@  ›Mb­“gpio@fe760000,rockchip,gpio-bankýþv N$gh  �»`  ›Mbgpio@fe770000,rockchip,gpio-bankýþw N%ij  �»€  ›Mb­Ïpcfg-pull-up §­¾pcfg-pull-down ´­Äpcfg-pull-none í¼pcfg-pull-none-drv-level-1 à ЭÀpcfg-pull-none-drv-level-2 à Э¿pcfg-pull-none-drv-level-3 à ЭÃpcfg-pull-up-drv-level-1 § ЭÂpcfg-pull-up-drv-level-2 § Э½pcfg-pull-none-smt à ߭Áacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ô¼­cpuebcedpdpemmceth0eth1flashfspifspi-pins` ô¼¼¼¼¼¼­ngmac0gmac1gmac1m0-miim ô¼¼­Mgmac1m0-clkinout ô¼­Qgmac1m0-rx-bus20 ô ¼ ¼ ¼­Ogmac1m0-tx-bus20 ô ¿¿¼­Ngmac1m0-rgmii-clk ô¼À­Pgmac1m0-rgmii-bus@ ô¼¼¿¿­Rgpuhdmitxhdmitxm0-cec ô¼­Zhdmitx-scl ô¼­Xhdmitx-sda ô¼­Yi2c0i2c0-xfer ô Á Á­!i2c1i2c1-xfer ô Á Á­i2c2i2c2m0-xfer ô ÁÁ­€i2c3i2c3m0-xfer ôÁÁ­�i2c4i2c4m0-xfer ô Á Á­‚i2c5i2c5m0-xfer ô Á Á­ƒi2s1i2s1m0-lrcktx ô¼­qi2s1m0-mclk ô¼­%i2s1m0-sclktx ô¼­pi2s1m0-sdi0 ô ¼­ri2s1m0-sdo0 ô¼­si2s2i2s2m0-lrcktx ô¼­ui2s2m0-sclktx ô¼­ti2s2m0-sdi ô¼­vi2s2m0-sdo ô¼­wi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ô¼­xpdmm0-clk1 ô¼­ypdmm0-sdi0 ô ¼­zpdmm0-sdi1 ô ¼­{pdmm0-sdi2 ô ¼­|pdmm0-sdi3 ô¼­}pmicpmic-int-l ô¾­$pmupwm0pwm0m0-pins ô¼­)pwm1pwm1m0-pins ô¼­*pwm2pwm2m0-pins ô¼­+pwm3pwm3-pins ô¼­,pwm4pwm4-pins ô¼­¨pwm5pwm5-pins ô¼­©pwm6pwm6-pins ô¼­ªpwm7pwm7-pins ô¼­«pwm8pwm8m0-pins ô ¼­¬pwm9pwm9m0-pins ô ¼­­pwm10pwm10m0-pins ô ¼­®pwm11pwm11m0-pins ô¼­¯pwm12pwm12m0-pins ô¼­°pwm13pwm13m0-pins ô¼­±pwm14pwm14m0-pins ô¼­²pwm15pwm15m0-pins ô¼­³refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ô½½½½­dsdmmc0-clk ô½­esdmmc0-cmd ô½­fsdmmc0-det ô¾­gsdmmc1sdmmc1-bus4@ ô½½½½­jsdmmc1-clk ô½­lsdmmc1-cmd ô½­ksdmmc2spdifspdifm0-tx ô¼­~spi0spi0m0-pins0 ô ¼¼¼­†spi0m0-cs0 ô¼­„spi0m0-cs1 ô¼­…spi1spi1m1-pins0 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctshost-wakeup-gpiosdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplymax-speedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathfan-supplygpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggerpost-power-on-delay-mspower-off-delay-usenable-active-high