Ð þíì»8Þl(OÞ4 ,powkiddy,x55rockchip,rk3566 7Powkiddy x55=handsetaliasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000�/i2c@fe5e0000†/serial@fdd50000Ž/serial@fe650000–/serial@fe660000ž/serial@fe670000¦/serial@fe680000®/serial@fe690000¶/serial@fe6a0000¾/serial@fe6b0000Æ/serial@fe6c0000Î/serial@fe6d0000Ö/spi@fe610000Û/spi@fe620000à/spi@fe630000å/spi@fe640000ê/mmc@fe310000ï/mmc@fe2b0000ô/mmc@fe000000ù/mmc@fe2c0000cpus cpu@0þcpu,arm,cortex-a55 $psci2€?@Q€^€k@}€Š›¯º cpu@100þcpu,arm,cortex-a55 $psci2€?@Q€^€k@}€Š›¯º cpu@200þcpu,arm,cortex-a55 $psci2€?@Q€^€k@}€Š›¯º cpu@300þcpu,arm,cortex-a55 $psci2€?@Q€^€k@}€Š›¯º l3-cache,cacheÂÎ4A@Sºdisplay-subsystem,rockchip,display-subsystemÜfirmwarescmi ,arm,scmi-smcâ‚í protocol@14 óºhdmi-sound,simple-audio-cardHDMIi2s0Jokaysimple-audio-card,codecQsimple-audio-card,cpuQ pmu,arm,cortex-a55-pmu0[äåæçf psci ,arm,psci-1.0+smcreserved-memory yshmem@10f000,arm,scmi-shmem ð€ºtimer,arm,armv8-timer0[   ‡xin24m ,fixed-clockžn6®xin24móºxin32k ,fixed-clockž€®xin32kÁËdefaultósata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü@›œ�Ùsatapmaliverxoob [_å êsata-phyô Jdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü€ ¡¢Ùsatapmaliverxoob [`å êsata-phyô Jdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3 üÀ@ [©¦§¥Ùref_clksuspend_clkbus_clkotg utmi_wide%”,Jokayå êusb2-phyE Lhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3 ý@ [ª©ª¨Ùref_clksuspend_clkbus_clkhost åêusb2-phyusb3-phy utmi_wide%•,Jokayinterrupt-controller@fd400000 ,arm,gic-v3  ý@ýF [ Zo€ýAŠ(•y ¤ºmsi-controller@fd440000,arm,gic-v3-its ýD¤•´ºcusb@fd800000 ,generic-ehci ý€ [‚½¾¼åêusb Jdisabledusb@fd840000 ,generic-ohci ý„ [ƒ½¾¼åêusb Jdisabledusb@fd880000 ,generic-ehci ýˆ […¿À¼åêusb Jdisabledusb@fd8c0000 ,generic-ohci ýŒ [†¿À¼åêusb Jdisabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd ýºaio-domains&,rockchip,rk3568-pmu-io-voltage-domainJokay¿ÍÛé÷!syscon@fdc50000 ýÅ ,rockchip,rk3566-pipe-grfsysconº²syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd ýƺ!syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon ýȺ³syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon ýɺ´syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon ýÊ€ºµsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon ýÊ€€º·clock-controller@fdd00000,rockchip,rk3568-pmucru ýÐó/º clock-controller@fdd20000,rockchip,rk3568-cru ýÒÙxin24mó/ <  L€G†Œ 눶a x!ºi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c ýÔ [.  - Ùi2cpclkÁ"Ëdefault Jokaypmic@20,rockchip,rk817 <Ha–Ùmclk®rk808-clkout1rk808-clkout2H#[ËdefaultÁ$%…ó“¤&°&¼&È&Ô&à&ì&ø&'ºÉregulatorsDCDC_REG1$6¡ N™pfq{ ’vdd_logicregulator-state-mem¡º » DCDC_REG2$6¡ N™pfq{’vdd_gpuºGregulator-state-mem¡DCDC_REG3${’vcc_ddrregulator-state-memÖDCDC_REG4$62Z N2Z {’vcc_3v3ºregulator-state-memÖº2Z LDO_REG1$6w@Nw@ ’vcca1v8_pmuºregulator-state-memÖºw@LDO_REG2$6 » N »  ’vdda_0v9regulator-state-mem¡LDO_REG3$6 » N »  ’vdda0v9_pmuregulator-state-memÖº » LDO_REG4$62Z N2Z  ’vccio_acodecºregulator-state-mem¡LDO_REG5$6w@N2Z  ’vccio_sdºregulator-state-mem¡LDO_REG6$62Z N2Z  ’vcc3v3_pmuºregulator-state-memÖº2Z LDO_REG7$6w@Nw@’vcc_1v8º¥regulator-state-mem¡LDO_REG8$6w@Nw@ ’vcc1v8_dvpºregulator-state-memÖLDO_REG9$6w@N2Z  ’vcc2v8_dvpºregulator-state-mem¡BOOST6G·`NReÀ’boostº'regulator-state-mem¡OTG_SWITCH ’otg_switchregulator-state-mem¡chargerî('#IðI† regulator@1c ,tcs,tcs4525 p$6 ß4N5°’vdd_cpufü�&ºregulator-state-mem¡serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart ýÕ [t ,Ùbaudclkapb_pclk˜))Á*Ëdefault�ª Jdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý× 0 ÙpwmpclkÁ+Ëdefault´ Jdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý× 0 ÙpwmpclkÁ,Ëdefault´ Jdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý×  0 ÙpwmpclkÁ-Ëdefault´ Jdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý×0 0 ÙpwmpclkÁ.Ëdefault´ Jdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd ýÙpower-controller!,rockchip,rk3568-power-controller¿ ºpower-domain@7 Ó/¿power-domain@8 ÌÍ Ó012¿power-domain@9 ÚÛÜ Ó345¿power-domain@10 ñòÓ6789:;¿power-domain@11 íÓ<¿power-domain@13 Ó=¿power-domain@14  Ó>?@¿power-domain@15 ÓABCDE¿gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost ýæ@$[()' ÚjobmmugpuÙgpubusJokay›FêGº¢video-codec@fdea0400,rockchip,rk3568-vpu ýê [‹Úvdpuîï ÙaclkhclköH iommu@fdea0800,rockchip,rk3568-iommu ýê@ [Š Ùaclkifaceîï ýºHrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ýë€ [ZóôõÙaclkhclksclk%&$%  coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu ýî [@ýþ ÙaclkhclköI iommu@fdee0800,rockchip,rk3568-iommu ýî@ [?ýþ Ùaclkiface ýºIvideo-capture@fdfe0000,rockchip,rk3568-vicap ýþ [’<ÐLᣠÎÏÐÑÙaclkhclkdclkiclköJ(%÷øùûú arsthrstdrstprstirstx! Jdisabledports port@0 port@1 iommu@fdfe0800,rockchip,rk3568-iommu ýþ [’ÎÏ Ùaclkifaceý JdisabledºJmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ@ [d ÁÂŽ�Ùbiuciuciu-driveciu-sample1<ðÑ€%ë resetJokayJTfwÁKLMNËdefault‚�ethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a þ[ Úmacirqeth_wake_irq@†‰‰ÇÃĉÈWÙstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref%ì  stmmacethx!�O­¾PÑQä Jdisabledmdio,snps,dwmac-mdio stmmac-axi-configí÷ºOrx-queues-configºPqueue0tx-queues-config-ºQqueue0vop@fe040000  þ0þ@Cvopgamma-lut [”(ÝÞßàá%Ùaclkhclkdclk_vp0dclk_vp1dclk_vp2öR x!Jokay,rockchip,rk3566-vop<ßàa ports ºport@0  endpoint@2 MSº_port@1  endpoint@4 MTºVport@2  iommu@fe043e00,rockchip,rk3568-iommu  þ>þ? [”ÝÞ Ùaclkifaceý JokayºRdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi þ [DÙpclkèêdphyåU  apb%x!Jokay ports port@0 endpointMVºTport@1 endpointMWº[panel@0 ,powkiddy,x55-panelhimax,hx8394 ]XgYËdefaultÁZ t#€iYportendpointM[ºWdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi þ [EÙpclkéêdphyå\  apb%x! Jdisabledports port@0 port@1 hdmi@fe0a0000,rockchip,rk3568-dw-hdmi þ  [-(æç“ (ÚÙiahbisfrcecrefËdefaultÁ] �x!“Jokay‰^ºports port@0 endpointM_ºSport@1 endpointM`ºÈqos@fe128000,rockchip,rk3568-qossyscon þ€ º/qos@fe138080,rockchip,rk3568-qossyscon þ€€ º>qos@fe138100,rockchip,rk3568-qossyscon þ� º?qos@fe138180,rockchip,rk3568-qossyscon þ�€ º@qos@fe148000,rockchip,rk3568-qossyscon þ€ º0qos@fe148080,rockchip,rk3568-qossyscon þ€€ º1qos@fe148100,rockchip,rk3568-qossyscon þ� º2qos@fe150000,rockchip,rk3568-qossyscon þ º<qos@fe158000,rockchip,rk3568-qossyscon þ€ º6qos@fe158100,rockchip,rk3568-qossyscon þ� º7qos@fe158180,rockchip,rk3568-qossyscon þ�€ º8qos@fe158200,rockchip,rk3568-qossyscon þ‚ º9qos@fe158280,rockchip,rk3568-qossyscon þ‚€ º:qos@fe158300,rockchip,rk3568-qossyscon þƒ º;qos@fe180000,rockchip,rk3568-qossyscon þ qos@fe190000,rockchip,rk3568-qossyscon þ ºAqos@fe190280,rockchip,rk3568-qossyscon þ€ ºBqos@fe190300,rockchip,rk3568-qossyscon þ ºCqos@fe190380,rockchip,rk3568-qossyscon þ€ ºDqos@fe190400,rockchip,rk3568-qossyscon þ ºEqos@fe198000,rockchip,rk3568-qossyscon þ€ º=qos@fe1a8000,rockchip,rk3568-qossyscon þ€ º3qos@fe1a8080,rockchip,rk3568-qossyscon þ€€ º4qos@fe1a8100,rockchip,rk3568-qossyscon þ� º5dfi@fe230000,rockchip,rk3568-dfi þ# [ •apcie@fe260000,rockchip,rk3568-pcie0 À@þ&ôCdbiapbconfig<[KJIHGÚsyspmcmsglegacyerr¢(�‚ƒ„…$Ùaclk_mstaclk_slvaclk_dbipclkauxþpcio¬`¿bbbbÍÞíü c å êpcie-phyTyôôô ô à@%¡ pipe  Jdisabledlegacy-interrupt-controlleroZ [Hºbmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ+@ [b °±Š‹Ùbiuciuciu-driveciu-sample1<ðÑ€%Ô resetJokayJTfwÁdefgËdefault‚�mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ,@ [c ²³Œ�Ùbiuciuciu-driveciu-sample1<ðÑ€%Ö resetJokayJf  * @h K ÁijkËdefault Ylspi@fe300000 ,rockchip,sfc þ0@ [exvÙclk_sfchclk_sfcÁmËdefault Jdisabledmmc@fe310000,rockchip,rk3568-dwcmshc þ1 [<{}L ëÂn6(|zy{}ÙcorebusaxiblocktimerJokayJ e KÁnopqrËdefaultrng@fe388000,rockchip,rk3568-rng þ8€@po Ùcoreahb%m Jdisabledi2s@fe400000,rockchip,rk3568-i2s-tdm þ@ [4<=ALFÏqFÏq?C9Ùmclk_txmclk_rxhclk˜s ttx%PQ  tx-mrx-mx!“Jokayº i2s@fe410000,rockchip,rk3568-i2s-tdm þA [5<EILFÏqFÏqGK:Ùmclk_txmclk_rxhclk˜ss trxtx%RS  tx-mrx-mx!ËdefaultÁtuvw“Jokay ~ºÍi2s@fe420000,rockchip,rk3568-i2s-tdm þB [6<MLFÏqOO;Ùmclk_txmclk_rxhclk˜ss ttxrx%T tx-mx!ËdefaultÁxyz{“ Jdisabledi2s@fe430000,rockchip,rk3568-i2s-tdm þC [7SW<Ùmclk_txmclk_rxhclk˜ss ttxrx%UV  tx-mrx-mx!“ Jdisabledpdm@fe440000,rockchip,rk3568-pdm þD [LZYÙpdm_clkpdm_hclk˜s  trxÁ|}~€�Ëdefault%X pdm-m“ Jdisabledspdif@fe460000,rockchip,rk3568-spdif þF [f Ùmclkhclk_\˜s ttxËdefaultÁ‚“ Jdisableddma-controller@fe530000,arm,pl330arm,primecell þS@[  ™  Ùapb_pclk °º)dma-controller@fe550000,arm,pl330arm,primecell þU@[ ™  Ùapb_pclk °ºsi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þZ [/HG Ùi2cpclkÁƒËdefault  Jdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ[ [0JI Ùi2cpclkÁ„Ëdefault  Jdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ\ [1LK Ùi2cpclkÁ…Ëdefault  Jdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ] [2NM Ùi2cpclkÁ†Ëdefault  Jdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ^ [3PO Ùi2cpclkÁ‡Ëdefault Jokayº^watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt þ` [• Ùtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi þa [gRQÙspiclkapb_pclk˜)) ttxrxËdefault Áˆ‰Š  Jdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi þb [hTSÙspiclkapb_pclk˜)) ttxrxËdefault Á‹Œ�  Jdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi þc [iVUÙspiclkapb_pclk˜)) ttxrxËdefault ÁŽ��  Jdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi þd [jXWÙspiclkapb_pclk˜)) ttxrxËdefault Á‘’“  Jdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart þe [uÙbaudclkapb_pclk˜)) Á”•–Ëdefault�ªJokay »bluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt Ë# Ý# ê# serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart þf [v# Ùbaudclkapb_pclk˜))Á—Ëdefault�ªJokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart þg [w'$Ùbaudclkapb_pclk˜))Á˜Ëdefault�ª Jdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart þh [x+(Ùbaudclkapb_pclk˜)) Á™Ëdefault�ª Jdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart þi [y/,Ùbaudclkapb_pclk˜) ) ÁšËdefault�ª Jdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart þj [z30Ùbaudclkapb_pclk˜) ) Á›Ëdefault�ª Jdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart þk [{74Ùbaudclkapb_pclk˜))ÁœËdefault�ª Jdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart þl [|;8Ùbaudclkapb_pclk˜))Á�Ëdefault�ª Jdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart þm [}?<Ùbaudclkapb_pclk˜))ÁžËdefault�ª Jdisabledthermal-zonescpu-thermal úd è Ÿtripscpu_alert0 .p :ÐEpassiveº cpu_alert1 .$ø :ÐEpassivecpu_crit .s :Ð Ecriticalcooling-mapsmap0 E 0 J ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal ú è Ÿtripsgpu-threshold .p :ÐEpassivegpu-target .$ø :ÐEpassiveº¡gpu-crit .s :Ð Ecriticalcooling-mapsmap0 E¡ J¢ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadc þq [s<Lf@ ®`Ùtsadcapb_pclk%�‚×x! YsËdefaultsleepÁ£ p¤ zJokay � §ºŸsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc þr []Ùsaradcapb_pclk%€  saradc-apb ÂJokay Ô¥ºÁpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þnZY ÙpwmpclkÁ¦Ëdefault´JokayºÂpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þnZY ÙpwmpclkÁ§Ëdefault´ Jdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þn ZY ÙpwmpclkÁ¨Ëdefault´ Jdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þn0ZY ÙpwmpclkÁ©Ëdefault´ Jdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo]\ ÙpwmpclkÁªËdefault´ Jdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo]\ ÙpwmpclkÁ«Ëdefault´ Jdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo ]\ ÙpwmpclkÁ¬Ëdefault´ Jdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo0]\ ÙpwmpclkÁ­Ëdefault´ Jdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp`_ ÙpwmpclkÁ®Ëdefault´ Jdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp`_ ÙpwmpclkÁ¯Ëdefault´ Jdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp `_ ÙpwmpclkÁ°Ëdefault´ Jdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp0`_ ÙpwmpclkÁ±Ëdefault´ Jdisabledphy@fe830000,rockchip,rk3568-naneng-combphy þƒ "} Ùrefapbpipe< "Lõá%Ç phy ಠò³ Jokayºphy@fe840000,rockchip,rk3568-naneng-combphy þ„ %~ Ùrefapbpipe< %Lõá%É phy ಠò´  Jdisabledºphy@fe870000,rockchip,rk3568-csi-dphy þ‡yÙpclk %º apbx! Jdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy þ… Ùrefpclk z   apb%»JokayºUmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy þ† Ùrefpclk {   apb%¼ Jdisabledº\usb2phy@fe8a0000,rockchip,rk3568-usb2phy þŠ Ùphyclk®clk_usbphy0_480m [‡ µóJokayºhost-port Jokay #¶ºotg-port Jokayºusb2phy@fe8b0000,rockchip,rk3568-usb2phy þ‹ Ùphyclk®clk_usbphy1_480m [ˆ ·ó Jdisabledhost-port  Jdisabledºotg-port  Jdisabledºpinctrl,rockchip,rk3568-pinctrlx!•a yº¸gpio@fdd60000,rockchip,gpio-bank ýÖ [! .  . >¸  JZoº#gpio@fe740000,rockchip,gpio-bank þt ["cd . >¸  JZogpio@fe750000,rockchip,gpio-bank þu [#ef . >¸@  JZogpio@fe760000,rockchip,gpio-bank þv [$gh . >¸`  JZoºÄgpio@fe770000,rockchip,gpio-bank þw [%ij . >¸€  JZoºÅpcfg-pull-up Vº»pcfg-pull-none cº¹pcfg-pull-none-drv-level-1 c pº½pcfg-pull-none-drv-level-2 c pº¼pcfg-pull-none-drv-level-3 c pºÀpcfg-pull-up-drv-level-1 V pº¿pcfg-pull-up-drv-level-2 V pººpcfg-pull-none-smt c º¾acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ”¹ºcpuebcedpdpemmcemmc-rstnout ”¹ºremmc-bus8€ ” º ººººººººnemmc-clk ”ººoemmc-cmd ”ººpemmc-datastrobe ”¹ºqeth0eth1flashfspifspi-pins` ”¹¹¹¹¹¹ºmgmac0gmac1gpuhdmitxhdmitxm0-cec ”¹º]i2c0i2c0-xfer ” ¾ ¾º"i2c1i2c1-xfer ” ¾ ¾ºƒi2c2i2c2m0-xfer ” ¾¾º„i2c3i2c3m0-xfer ”¾¾º…i2c4i2c4m0-xfer ” ¾ ¾º†i2c5i2c5m1-xfer ”¾¾º‡i2s1i2s1m0-lrcktx ”¹ºui2s1m0-mclk ”¹º$i2s1m0-sclktx ”¹ºti2s1m0-sdi0 ” ¹ºvi2s1m0-sdo0 ”¹ºwi2s2i2s2m0-lrcktx ”¹ºyi2s2m0-sclktx ”¹ºxi2s2m0-sdi ”¹ºzi2s2m0-sdo ”¹º{i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ”¹º|pdmm0-clk1 ”¹º}pdmm0-sdi0 ” ¹º~pdmm0-sdi1 ” ¹ºpdmm0-sdi2 ” ¹º€pdmm0-sdi3 ”¹º�pmicpmic-int-l ”»º%pmupwm0pwm0m0-pins ”¹º+pwm1pwm1m0-pins ”¹º,pwm2pwm2m0-pins ”¹º-pwm3pwm3-pins ”¹º.pwm4pwm4-pins ”¹º¦pwm5pwm5-pins ”¹º§pwm6pwm6-pins ”¹º¨pwm7pwm7-pins ”¹º©pwm8pwm8m0-pins ” ¹ºªpwm9pwm9m0-pins ” ¹º«pwm10pwm10m0-pins ” ¹º¬pwm11pwm11m0-pins ”¹º­pwm12pwm12m0-pins ”¹º®pwm13pwm13m0-pins ”¹º¯pwm14pwm14m0-pins ”¹º°pwm15pwm15m0-pins ”¹º±refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ”ºººººdsdmmc0-clk ”ººesdmmc0-cmd ”ººfsdmmc0-det ”»ºgsdmmc1sdmmc1-bus4@ ”ºººººisdmmc1-clk ”ººksdmmc1-cmd ”ººjsdmmc2sdmmc2m1-bus4@ ”ºººººKsdmmc2m1-clk ”ººMsdmmc2m1-cmd ”ººLsdmmc2m1-det ”»ºNspdifspdifm0-tx ”¹º‚spi0spi0m0-pins0 ” ¹¹¹ºŠspi0m0-cs0 ”¹ºˆspi0m0-cs1 ”¹º‰spi1spi1m0-pins0 ” ¹¹¹º�spi1m0-cs0 ”¹º‹spi1m0-cs1 ”¹ºŒspi2spi2m0-pins0 ”¹¹¹º�spi2m0-cs0 ”¹ºŽspi2m0-cs1 ”¹º�spi3spi3m0-pins0 ” ¹¹ ¹º“spi3m0-cs0 ”¹º‘spi3m0-cs1 ”¹º’tsadctsadc-shutorg ”¹º£tsadc-pin ”¹º¤uart0uart0-xfer ”»»º*uart1uart1m0-xfer ” » »º”uart1m0-ctsn ”¹º•uart1m0-rtsn ” ¹º–uart2uart2m0-xfer ”»»º—uart3uart3m0-xfer ”»»º˜uart4uart4m0-xfer ”»»º™uart5uart5m0-xfer ”»»ºšuart6uart6m0-xfer ”»»º›uart7uart7m0-xfer ”»»ºœuart8uart8m0-xfer ”»»º�uart9uart9m0-xfer ”»»ºžvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2audio-amplifierspk-amp-enable-h ”¹ºÎgpio-controlbtn-pins-ctrl ”»»»»»»»»»»»»»»»»ºÃbtn-pins-vol ”»»ºÆgpio-lcdlcd-rst ”¹ºZgpio-ledsled-pins0 ” ¹ ¹¹ºÇhp-detecthp-det ”»ºËsdio-pwrseqwifi-enable-h ”¹ºÊusbvcc5v0-host-en ”»ºÏvcc5v0-otg-en ”»vcc-lcdvcc-lcd-en ”¹ºÐvcc-wifivcc-wifi-h ”¹ºÑopp-table-0,operating-points-v2 ¢ºopp-408000000 ­Q– ´ øP øPŒ0 œ@opp-600000000 ­#ÃF ´ øP øPŒ0 œ@opp-816000000 ­0£, ´ øP øPŒ0 œ@ Óopp-1104000000 ­AÍ´ ´ »  » Œ0 œ@opp-1416000000 ­Tfr ´£è£èŒ0 œ@opp-1608000000 ­_Ø" ´ÈàÈàŒ0 œ@opp-1800000000 ­kIÒ ´Œ0Œ0Œ0 œ@opp-table-1,operating-points-v2ºFopp-200000000 ­ ë ´ øP øPB@opp-300000000 ­á£ ´ øP øPB@opp-400000000 ­ׄ ´ øP øPB@opp-600000000 ­#ÃF ´ »  » B@opp-700000000 ­)¹' ´~ð~ðB@opp-800000000 ­/¯ ´B@B@B@chosen ßserial2:1500000n8adc-joystick ,adc-joystick ëÁÁÁÁ ÷< axis@0    ÿ !axis@1    ÿ !axis@2    ÿ !axis@3    ÿ !backlight,pwm-backlight ,& 9Âa¨ºXbattery,simple-battery >=  `“à }„€ ¢Aœà Ècx ï?$ 3á@ )¨ >?$d>M8_=ïxZ=´àU=~0P=W K= pF<› A<0<;’7;,p2:Úh-:£¸(:aP#9ÿ¨9~À8ýØ8F@7@ˆ 66è3á@º(gpio-keys-control ,gpio-keysÁÃËdefaultbutton-a zÄ SEAST !1button-b zÄ SSOUTH !0button-down zÅ SDPAD-DOWN !!button-l1 zÄ STL !6button-l2 zÄ STL2 !8button-left zÄ SDPAD-LEFT !"button-right zÄ SDPAD-RIGHT !#button-select zÅ SSELECT !:button-start zÅ SSTART !;button-thumbl zÅ STHUMBL !=button-thumbr zÅ STHUMBR !>button-r1 zÄ STR !7button-r2 zÄ STR2 !9button-up zÅ SDPAD-UP ! button-x zÄ SNORTH !3button-y zÄ SWEST !4gpio-keys-vol ,gpio-keys YÁÆËdefaultbutton-voldown zÅ SVOLUMEDOWN !rbutton-volup zÅ SVOLUMEUP !sgpio-leds ,gpio-ledsËdefaultÁÇled-0 d joff zÅ  xstatusled-1 d jon zÅ  xpowerled-2 d zÅ xcharginghdmi-con,hdmi-connector‰^EcportendpointMȺ`sdio-pwrseq,mmc-pwrseq-simpleÉ Ùext_clockÁÊËdefault �È t#ºhsound,simple-audio-cardÁËËdefault rk817_ext ˜Ìi2s ³Å0C ÒMicrophoneMic JackHeadphoneHeadphonesSpeakerInternal Speakersž ìMICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSpeaker Amp OUTLInternal SpeakersSpeaker Amp OUTRSpeaker Amp INLHPOLSpeaker Amp INRHPORInternal Speakerssimple-audio-card,codecQÉsimple-audio-card,cpuQÍaudio-amplifier,simple-audio-amplifier ÝÅÁÎËdefault %Speaker AmpºÌregulator-vcc5v0-host,regulator-fixed7 JÅÁÏËdefault ’vcc5v0_host�'º¶regulator-vcc-lcd,regulator-fixed7 J#ÁÐËdefault62Z N2Z ’vcc_lcdºYregulator-vcc-sys,regulator-fixed$69ûÀN9ûÀ’vcc_sysº&regulator-vcc-wifi,regulator-fixed J#ÁÑËdefault62Z N2Z  ’vcc_wifiºl interrupt-parent#address-cells#size-cellscompatiblemodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfwakeup-source#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointbacklightiovcc-supplyreset-gpiosrotationddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablevmmc-supplymmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelspoll-intervalabs-flatabs-fuzzabs-rangelinux,codepower-supplypwmscharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0labelautorepeatcolordefault-statefunctionpost-power-on-delay-mssimple-audio-card,aux-devssimple-audio-card,hp-det-gpiossimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchessound-name-prefixenable-active-highgpio