Ð þíØh8Í0( 8Ìø ',friendlyarm,nanopi-r3srockchip,rk35667FriendlyElec NanoPi R3Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe010000ç/mmc@fe310000ì/mmc@fe2b0000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@100ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@200ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ cpu@300ñcpu,arm,cortex-a55ýpsci%€2@D€Q€^@p€}Ž¢­ l3-cache,cacheµÁ'4@F­display-subsystem,rockchip,display-subsystemÏfirmwarescmi ,arm,scmi-smcÕ‚à protocol@14ýæ­hdmi-sound,simple-audio-cardóHDMI i2s# =disabledsimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NäåæçY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemýðs­timer,arm,armv8-timer0N   zxin24m ,fixed-clock‘n6¡xin24mæ­xin32k ,fixed-clock‘€¡xin32k´¾defaultæsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�Ìsatapmaliverxoob N_Ø Ýsata-phyçù =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢Ìsatapmaliverxoob N`Ø Ýsata-phyçù =disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ N©¦§¥Ìref_clksuspend_clkbus_clkotg utmi_wideù”=okayØ Ýusb2-phy8 ?high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ Nª©ª¨Ìref_clksuspend_clkbus_clkhost ØÝusb2-phyusb3-phy utmi_wideù•=okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF N MbsýA}(ˆl —­msi-controller@fd440000,arm,gic-v3-itsýýD—ˆ§­Zusb@fd800000 ,generic-ehciýý€ N‚½¾¼ØÝusb =disabledusb@fd840000 ,generic-ohciýý„ Nƒ½¾¼ØÝusb =disabledusb@fd880000 ,generic-ehciýýˆ N…¿À¼ØÝusb =disabledusb@fd8c0000 ,generic-ohciýýŒ N†¿À¼ØÝusb =disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýý­Xio-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay²ÀÎÜêø"syscon@fdc50000ýýÅ ,rockchip,rk3566-pipe-grfsyscon­«syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆ­syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈ­¬syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉ­­syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€­®syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€­°clock-controller@fdd00000,rockchip,rk3568-pmucruýýÐæ0­clock-controller@fdd20000,rockchip,rk3568-cruýýÒÌxin24mæ0= M€G†Œ ëÂby­i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ N.- Ìi2cpclk´ ¾default =okayregulator@1c ,tcs,tcs4525ý†£vdd_cpu²ÆØ 5ðŒ0ü!­regulator-state-mem(pmic@20,rockchip,rk809ý "Næ¾default´#AY$e$q$}$‰$•$¡$­$¹$ÅregulatorsDCDC_REG1 £vdd_logic²ÆÓØ¡ ð™pqregulator-state-mem(DCDC_REG2£vdd_gpu²ÓØ¡ ð™pq­Cregulator-state-mem(DCDC_REG3£vcc_ddr²ÆÓregulator-state-memêDCDC_REG4£vdd_npuÓØ¡ ð™pqregulator-state-mem(DCDC_REG5£vcc_1v8²ÆØw@ðw@­regulator-state-mem(LDO_REG1£vdda0v9_imageØ~ðð~ðregulator-state-mem(LDO_REG2 £vdda_0v9²ÆØ » ð » regulator-state-mem(LDO_REG3 £vdda0v9_pmu²ÆØ » ð » regulator-state-memê » LDO_REG4 £vccio_acodecØ2Z ð2Z ­regulator-state-mem(LDO_REG5 £vccio_sdØw@ð2Z ­regulator-state-mem(LDO_REG6 £vcc3v3_pmu²ÆØ2Z ð2Z ­regulator-state-memê2Z LDO_REG7 £vcca_1v8²ÆØw@ðw@regulator-state-mem(LDO_REG8 £vcca1v8_pmu²ÆØw@ðw@regulator-state-memêw@LDO_REG9£vcca1v8_imageØw@ðw@regulator-state-mem(SWITCH_REG1£vcc_3v3²Æ­regulator-state-mem(SWITCH_REG2 £vcc3v3_sd²Æ­`regulator-state-mem(serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ Nt ,Ìbaudclkapb_pclk%%´&¾default#0 =disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´'¾default: =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 Ìpwmpclk´(¾default: =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 Ìpwmpclk´)¾default: =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 Ìpwmpclk´*¾default: =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controllerE ­power-domain@7ýY+Epower-domain@8ýÌÍ Y,-.Epower-domain@9ý ÚÛÜ Y/01Epower-domain@10ý ñòY234567Epower-domain@11ý íY8Epower-domain@13ý Y9Epower-domain@14ý Y:;<Epower-domain@15ýY=>?@AEgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$N()' `jobmmugpuÌgpubusù=okayŽBpC­œvideo-codec@fdea0400,rockchip,rk3568-vpuýýê N‹`vdpuîï Ìaclkhclk|Dù iommu@fdea0800,rockchip,rk3568-iommuýýê@ NŠ Ìaclkifaceîïù ƒ­Drga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýýë€ NZóôõÌaclkhclksclk&$% �coreaxiahbù video-codec@fdee0000,rockchip,rk3568-vepuýýî N@ýþ Ìaclkhclk|Eù iommu@fdee0800,rockchip,rk3568-iommuýýî@ N?ýþ Ìaclkifaceù ƒ­Evideo-capture@fdfe0000,rockchip,rk3568-vicapýýþ N’=ÐMᣠÎÏÐÑÌaclkhclkdclkiclk|Fù(÷øùûú�arsthrstdrstprstirsty =disabledports port@0ýport@1ýiommu@fdfe0800,rockchip,rk3568-iommuýýþ N’ÎÏ Ìaclkifaceƒùœ =disabled­Fmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ Nd ÁÂŽ�Ìbiuciuciu-driveciu-sample·ÂðÑ€ë�reset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþN `macirqeth_wake_irq@†‰‰ÇÃĉÈWÌstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refì �stmmacethyÐGàñHI=okay=‰†b‡ÅMsY@ output -rgmii-id6J¾default´KLMNOmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22ýPN¾default´QAN Q†  cP­Jstmmac-axi-configoy‰­Grx-queues-config™­Hqueue0tx-queues-config¯­Iqueue0vop@fe040000 ýþ0þ@Åvopgamma-lut N”(ÝÞßàá%Ìaclkhclkdclk_vp0dclk_vp1dclk_vp2|Rù y=okay,rockchip,rk3566-vop=ßàbports ­port@0ý port@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? N”ÝÞ Ìaclkifaceƒù =okay­Rdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NDÌpclkèÝdphyØSù �apby =disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ NEÌpclkéÝdphyØTù �apby =disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  N-(æç“(ÚÌiahbisfrcecref¾default ´UVWù #yÏ =disabled­ports port@0ýport@1ýqos@fe128000,rockchip,rk3568-qossysconýþ€ ­+qos@fe138080,rockchip,rk3568-qossysconýþ€€ ­:qos@fe138100,rockchip,rk3568-qossysconýþ� ­;qos@fe138180,rockchip,rk3568-qossysconýþ�€ ­<qos@fe148000,rockchip,rk3568-qossysconýþ€ ­,qos@fe148080,rockchip,rk3568-qossysconýþ€€ ­-qos@fe148100,rockchip,rk3568-qossysconýþ� ­.qos@fe150000,rockchip,rk3568-qossysconýþ ­8qos@fe158000,rockchip,rk3568-qossysconýþ€ ­2qos@fe158100,rockchip,rk3568-qossysconýþ� ­3qos@fe158180,rockchip,rk3568-qossysconýþ�€ ­4qos@fe158200,rockchip,rk3568-qossysconýþ‚ ­5qos@fe158280,rockchip,rk3568-qossysconýþ‚€ ­6qos@fe158300,rockchip,rk3568-qossysconýþƒ ­7qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ ­=qos@fe190280,rockchip,rk3568-qossysconýþ€ ­>qos@fe190300,rockchip,rk3568-qossysconýþ ­?qos@fe190380,rockchip,rk3568-qossysconýþ€ ­@qos@fe190400,rockchip,rk3568-qossysconýþ ­Aqos@fe198000,rockchip,rk3568-qossysconýþ€ ­9qos@fe1a8000,rockchip,rk3568-qossysconýþ€ ­/qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ ­0qos@fe1a8100,rockchip,rk3568-qossysconýþ� ­1dfi@fe230000,rockchip,rk3568-dfiýþ# N àXpcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôÅdbiapbconfig<NKJIHG`syspmcmsglegacyerrí(�‚ƒ„…$Ìaclk_mstaclk_slvaclk_dbipclkauxñpcib÷` YYYY)8GVZ^Ø Ýpcie-phyùTlôôô ô à@¡�pipe =okay¾default´[ cPlegacy-interrupt-controllerbM NH­Ymmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ Nb °±Š‹Ìbiuciuciu-driveciu-sample·ÂðÑ€Ô�reset=okayhr„• ¨¾default´\]^_¯¼`Èmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ Nc ²³Œ�Ìbiuciuciu-driveciu-sample·ÂðÑ€Ö�reset =disabledspi@fe300000 ,rockchip,sfcýþ0@ NexvÌclk_sfchclk_sfc´a¾default =disabledmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 N={}M ëÂn6(|zy{}Ìcorebusaxiblocktimer=okayh ëÂÕä¾default´bcderng@fe388000,rockchip,rk3568-rngýþ8€@po Ìcoreahbm =disabledi2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ N4==AMFÏqFÏq?C9Ìmclk_txmclk_rxhclkfòtxPQ �tx-mrx-myÏ =disabled­ i2s@fe410000,rockchip,rk3568-i2s-tdmýþA N5=EIMFÏqFÏqGK:Ìmclk_txmclk_rxhclkffòrxtxRS �tx-mrx-my¾default0´ghijklmnopqrÏ =disabledi2s@fe420000,rockchip,rk3568-i2s-tdmýþB N6=MMFÏqOO;Ìmclk_txmclk_rxhclkffòtxrxT�tx-my¾default´stuvÏ =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC N7SW<Ìmclk_txmclk_rxhclkffòtxrxUV �tx-mrx-myÏ =disabledpdm@fe440000,rockchip,rk3568-pdmýþD NLZYÌpdm_clkpdm_hclkf òrx´wxyz{|¾defaultX�pdm-mÏ =disabledspdif@fe460000,rockchip,rk3568-spdifýþF Nf Ìmclkhclk_\fòtx¾default´}Ï =disableddma-controller@fe530000,arm,pl330arm,primecellýþS@N ü  Ìapb_pclk ­%dma-controller@fe550000,arm,pl330arm,primecellýþU@Nü  Ìapb_pclk ­fi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ N/HG Ìi2cpclk´~¾default =okayrtc@51,haoyu,hym8563ýQæ¡hym8563¾default´"NÅi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ N0JI Ìi2cpclk´€¾default  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ N1LK Ìi2cpclk´�¾default  =disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] N2NM Ìi2cpclk´‚¾default  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ N3PO Ìi2cpclk´ƒ¾default  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` N• Ìtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa NgRQÌspiclkapb_pclk%%òtxrx¾default ´„…†  =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb NhTSÌspiclkapb_pclk%%òtxrx¾default ´‡ˆ‰  =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc NiVUÌspiclkapb_pclk%%òtxrx¾default ´Š‹Œ  =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd NjXWÌspiclkapb_pclk%%òtxrx¾default ´�Ž�  =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe NuÌbaudclkapb_pclk%%´�¾default#0 =disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf Nv# Ìbaudclkapb_pclk%%´‘¾default#0=okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg Nw'$Ìbaudclkapb_pclk%%´’¾default#0 =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh Nx+(Ìbaudclkapb_pclk%% ´“¾default#0 =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi Ny/,Ìbaudclkapb_pclk% % ´”¾default#0 =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj Nz30Ìbaudclkapb_pclk% % ´•¾default#0 =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk N{74Ìbaudclkapb_pclk%%´–¾default#0 =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl N|;8Ìbaudclkapb_pclk%%´—¾default#0 =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm N}?<Ìbaudclkapb_pclk%%´˜¾default#0 =disabledthermal-zonescpu-thermal d 4è B™tripscpu_alert0 Rp ^Ðøpassive­šcpu_alert1 R$ø ^Ðøpassivecpu_crit Rs ^Ð øcriticalcooling-mapsmap0 iš0 n ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal  4è B™tripsgpu-threshold Rp ^Ðøpassivegpu-target R$ø ^Ðøpassive­›gpu-crit Rs ^Ð øcriticalcooling-mapsmap0 i› nœÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq Ns=Mf@ ®`Ìtsadcapb_pclk�‚×y }s¾defaultsleep´� ”ž ž=okay­™saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr N]Ìsaradcapb_pclk€ �saradc-apb ´ =disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´Ÿ¾default: =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY Ìpwmpclk´ ¾default: =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY Ìpwmpclk´¡¾default: =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY Ìpwmpclk´¢¾default: =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´£¾default: =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ Ìpwmpclk´¤¾default: =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ Ìpwmpclk´¥¾default: =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ Ìpwmpclk´¦¾default: =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´§¾default: =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ Ìpwmpclk´¨¾default: =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ Ìpwmpclk´©¾default: =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ Ìpwmpclk´ª¾default: =disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} Ìrefapbpipe="MõáÇ�phy Æ« ج î=okay­phy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ Ìrefapbpipe=%MõáÉ�phy Æ« Ø­ î=okay­phy@fe870000,rockchip,rk3568-csi-dphyýþ‡yÌpclk îº�apby =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… Ìrefpclkz îù �apb» =disabled­Smipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† Ìrefpclk{ îù �apb¼ =disabled­Tusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠÌphyclk¡clk_usbphy0_480m N‡ ù®æ=okay­host-port î=okay ¯­otg-port î=okay­usb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹Ìphyclk¡clk_usbphy1_480m Nˆ ù°æ =disabledhost-port î =disabled­otg-port î =disabled­pinctrl,rockchip,rk3568-pinctrlyàX l­±gpio@fdd60000,rockchip,gpio-bankýýÖ N!.   $±  0Mb­"gpio@fe740000,rockchip,gpio-bankýþt N"cd  $±  0Mbgpio@fe750000,rockchip,gpio-bankýþu N#ef  $±@  0Mbgpio@fe760000,rockchip,gpio-bankýþv N$gh  $±`  0Mb­¿gpio@fe770000,rockchip,gpio-bankýþw N%ij  $±€  0Mb­Ppcfg-pull-up <­´pcfg-pull-down I­ºpcfg-pull-none X­²pcfg-pull-none-drv-level-1 X e­¶pcfg-pull-none-drv-level-2 X e­µpcfg-pull-none-drv-level-3 X e­¹pcfg-pull-up-drv-level-1 < e­¸pcfg-pull-up-drv-level-2 < e­³pcfg-pull-none-smt X t­·acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ‰²­cpuebcedpdpemmcemmc-bus8€ ‰ ³ ³³³³³³³­bemmc-clk ‰³­cemmc-cmd ‰³­demmc-datastrobe ‰²­eeth0eth1flashfspifspi-pins` ‰²²²²²²­agmac0gmac1gmac1m0-miim ‰²²­Kgmac1m0-rx-bus20 ‰ ² ² ²­Mgpuhdmitxhdmitxm0-cec ‰²­Whdmitx-scl ‰²­Uhdmitx-sda ‰²­Vi2c0i2c0-xfer ‰ · ·­ i2c1i2c1-xfer ‰ · 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-modephy-handlereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr50vmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cells#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathlabellinux,codedebounce-intervalcolorfunctiondefault-stateenable-active-highgpio