Ð þíÝP8Р( °Ðh ",lckfb,tspi-rk3566rockchip,rk35667LCKFB Taishan Pi RK3566aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/mmc@fe2b0000â/mmc@fe310000ç/mmc@fe2c0000cpus cpu@0ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ cpu@100ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ cpu@200ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ cpu@300ìcpu,arm,cortex-a55øüpsci €-@?€L€Y@k€x‰�¨ l3-cache,cache°¼"/@A¨display-subsystem,rockchip,display-subsystemÊfirmwarescmi ,arm,scmi-smcЂÛ protocol@14øá¨hdmi-sound,simple-audio-cardîHDMIi2s8okaysimple-audio-card,codec?simple-audio-card,cpu? pmu,arm,cortex-a55-pmu0IäåæçT psci ,arm,psci-1.0smcreserved-memory gshmem@10f000,arm,scmi-shmemøðn¨ramoops@110000,ramoopsøu‚Ž˜timer,arm,armv8-timer0I   ¤xin24m ,fixed-clock»n6Ëxin24má¨xin32k ,fixed-clock»€Ëxin32kÞèdefaultásata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciøü@ü›œ�ösatapmaliverxoob I_ sata-phy# 8disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciøü€ü ¡¢ösatapmaliverxoob I` sata-phy# 8disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3øüÀ@ I©ü¦§¥öref_clksuspend_clkbus_clk1otg 9utmi_wide#B”I8okay usb2-phyb ihigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3øý@ Iªü©ª¨öref_clksuspend_clkbus_clk1host usb2-phyusb3-phy 9utmi_wide#B•I8okayinterrupt-controller@fd400000 ,arm,gic-v3 øý@ýF I wŒ�ýA§(²g Á¨msi-controller@fd440000,arm,gic-v3-itsøýDÁ²Ñ¨Xusb@fd800000 ,generic-ehciøý€ I‚ü½¾¼usb8okayusb@fd840000 ,generic-ohciøý„ Iƒü½¾¼usb8okayusb@fd880000 ,generic-ehciøýˆ I…ü¿À¼usb8okayusb@fd8c0000 ,generic-ohciøýŒ I†ü¿À¼usb8okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdøý¨Vio-domains&,rockchip,rk3568-pmu-io-voltage-domain8okayÜêø"0>Lreboot-mode,syscon-reboot-modeZaRBÃmRBÃyRBÇRBà syscon@fdc50000øýÅ ,rockchip,rk3566-pipe-grfsyscon¨­syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdøýƨsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconøýȨ®syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconøýɨ¯syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconøýÊ€¨°syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconøýÊ€€¨±clock-controller@fdd00000,rockchip,rk3568-pmucruøýÐá—¨clock-controller@fdd20000,rockchip,rk3568-cruøýÒüöxin24má—¤ ´€G†Œ ëÂÉà¨i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cøýÔ I.ü- öi2cpclkÞ èdefault 8okayregulator@1c ,tcs,tcs4525øí vdd_cpu-? 5WŒ0oü„!¨regulator-state-mem�pmic@20,rockchip,rk809ø ¤HÉ–áËrk808-clkout1rk808-clkout2ömclküH"IèdefaultÞ#$¨ÀÑß%ë%÷%%%%'%3%?%¨ŽregulatorsDCDC_REG1  vdd_logic-?¡ W™poqKregulator-state-mem�DCDC_REG2 vdd_gpu-?¡ W™poqK¨Dregulator-state-mem�DCDC_REG3 vcc_ddr-Kregulator-state-membDCDC_REG4 vdd_npu-?¡ W™poqKregulator-state-mem�LDO_REG1 vdda0v9_image-? » W » ¨Rregulator-state-mem�LDO_REG2  vdda_0v9-? » W » regulator-state-mem�LDO_REG3  vdda0v9_pmu-? » W » regulator-state-membz » LDO_REG4  vccio_acodec-?2Z W2Z ¨regulator-state-mem�LDO_REG5  vccio_sd-?w@W2Z ¨regulator-state-mem�LDO_REG6  vcc3v3_pmu-?2Z W2Z ¨regulator-state-membz2Z LDO_REG7  vcca_1v8-?w@Ww@¨ regulator-state-mem�LDO_REG8  vcca1v8_pmu-?w@Ww@regulator-state-membzw@LDO_REG9 vcca1v8_image-?w@Ww@¨Sregulator-state-mem�DCDC_REG5 vcc_1v8-?w@Ww@¨regulator-state-mem�SWITCH_REG1 vcc_3v3-¨regulator-state-mem�SWITCH_REG2  vcc3v3_sd-¨]regulator-state-mem�codec–serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartøýÕ Itü ,öbaudclkapb_pclk³&&Þ'èdefault¸Å 8disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×ü 0 öpwmpclkÞ(èdefaultÏ 8disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×ü 0 öpwmpclkÞ)èdefaultÏ 8disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý× ü 0 öpwmpclkÞ*èdefaultÏ 8disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×0ü 0 öpwmpclkÞ+èdefaultÏ 8disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdøýÙpower-controller!,rockchip,rk3568-power-controllerÚ ¨power-domain@7øüî,Úpower-domain@8øüÌÍ î-./Úpower-domain@9ø üÚÛÜ î012Úpower-domain@10ø üñòî345678Úpower-domain@11ø üíî9Úpower-domain@13üø î:Úpower-domain@14øü î;<=Úpower-domain@15øüî>?@ABÚgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostøýæ@$I()' õjobmmugpuüögpubus#8okay‰CD¨�video-codec@fdea0400,rockchip,rk3568-vpuøýê I‹õvdpuüîï öaclkhclkE# iommu@fdea0800,rockchip,rk3568-iommuøýê@ IŠ öaclkifaceüîï# ¨Erga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaøýë€ IZüóôõöaclkhclksclkB&$% %coreaxiahb# video-codec@fdee0000,rockchip,rk3568-vepuøýî I@üýþ öaclkhclkF# iommu@fdee0800,rockchip,rk3568-iommuøýî@ I?üýþ öaclkiface# ¨Fvideo-capture@fdfe0000,rockchip,rk3568-vicapøýþ I’¤Ð´á£ üÎÏÐÑöaclkhclkdclkiclkG#(B÷øùûú%arsthrstdrstprstirstà 8disabledports port@0øport@1øiommu@fdfe0800,rockchip,rk3568-iommuøýþ I’üÎÏ öaclkiface#1 8disabled¨Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ@ Id üÁÂŽ�öbiuciuciu-driveciu-sampleLWðÑ€Bë%reset 8disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aøþI õmacirqeth_wake_irq@ü†‰‰ÇÃĉÈWöstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refBì %stmmacethàeHu†I™J¬ 8disabledmdio,snps,dwmac-mdio stmmac-axi-configµ¿Ï¨Hrx-queues-configߨIqueue0tx-queues-configõ¨Jqueue0vop@fe040000 øþ0þ@ vopgamma-lut I”(üÝÞßàá%öaclkhclkdclk_vp0dclk_vp1dclk_vp2K# à8okay,rockchip,rk3566-vop¤ßàÉports ¨port@0ø endpoint@2øL¨Tport@1ø port@2ø iommu@fe043e00,rockchip,rk3568-iommu øþ>þ? I”üÝÞ öaclkiface# 8okay¨Kdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiøþ IDöpclküèdphyM# %apbBà 8disabledports port@0øport@1ødsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiøþ IEöpclküédphyN# %apbBà 8disabledports port@0øport@1øhdmi@fe0a0000,rockchip,rk3568-dw-hdmiøþ  I-(üæç“(Úöiahbisfrcecrefèdefault ÞOPQ# ¸àÀ8okay%R5S¨ports port@0øendpointT¨Lport@1øendpointU¨¾qos@fe128000,rockchip,rk3568-qossysconøþ€ ¨,qos@fe138080,rockchip,rk3568-qossysconøþ€€ ¨;qos@fe138100,rockchip,rk3568-qossysconøþ� ¨<qos@fe138180,rockchip,rk3568-qossysconøþ�€ ¨=qos@fe148000,rockchip,rk3568-qossysconøþ€ ¨-qos@fe148080,rockchip,rk3568-qossysconøþ€€ ¨.qos@fe148100,rockchip,rk3568-qossysconøþ� ¨/qos@fe150000,rockchip,rk3568-qossysconøþ ¨9qos@fe158000,rockchip,rk3568-qossysconøþ€ ¨3qos@fe158100,rockchip,rk3568-qossysconøþ� ¨4qos@fe158180,rockchip,rk3568-qossysconøþ�€ ¨5qos@fe158200,rockchip,rk3568-qossysconøþ‚ ¨6qos@fe158280,rockchip,rk3568-qossysconøþ‚€ ¨7qos@fe158300,rockchip,rk3568-qossysconøþƒ ¨8qos@fe180000,rockchip,rk3568-qossysconøþ qos@fe190000,rockchip,rk3568-qossysconøþ ¨>qos@fe190280,rockchip,rk3568-qossysconøþ€ ¨?qos@fe190300,rockchip,rk3568-qossysconøþ ¨@qos@fe190380,rockchip,rk3568-qossysconøþ€ ¨Aqos@fe190400,rockchip,rk3568-qossysconøþ ¨Bqos@fe198000,rockchip,rk3568-qossysconøþ€ ¨:qos@fe1a8000,rockchip,rk3568-qossysconøþ€ ¨0qos@fe1a8080,rockchip,rk3568-qossysconøþ€€ ¨1qos@fe1a8100,rockchip,rk3568-qossysconøþ� ¨2dfi@fe230000,rockchip,rk3568-dfiøþ# I EVpcie@fe260000,rockchip,rk3568-pcie0øÀ@þ&ô dbiapbconfig<IKJIHGõsyspmcmsglegacyerrR(ü�‚ƒ„…$öaclk_mstaclk_slvaclk_dbipclkauxìpciŒ\`oWWWW}Ž�¬»Xà pcie-phy#Tgôôô ô à@B¡%pipe  8disabledlegacy-interrupt-controllerŒw IH¨Wmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ+@ Ib ü°±Š‹öbiuciuciu-driveciu-sampleLWðÑ€BÔ%reset8okayÍ×éúèdefaultÞYZ[\  ] mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ,@ Ic ü²³Œ�öbiuciuciu-driveciu-sampleLWðÑ€BÖ%reset8okayÍé ,ú 9 O^ Zèdefault Þ_`a  %  wifi@1,brcm,bcm4329-fmacøbI  õhost-wakeèdefaultÞcspi@fe300000 ,rockchip,sfcøþ0@ Ieüxvöclk_sfchclk_sfcÞdèdefault 8disabledmmc@fe310000,rockchip,rk3568-dwcmshcøþ1 I¤{}´ ëÂn6(ü|zy{}öcorebusaxiblocktimer8okayÍW ë ZèdefaultÞefghi  rng@fe388000,rockchip,rk3568-rngøþ8€@üpo öcoreahbBm 8disabledi2s@fe400000,rockchip,rk3568-i2s-tdmøþ@ I4¤=A´FÏqFÏqü?C9ömclk_txmclk_rxhclk³j htxBPQ %tx-mrx-màÀ8okay¨ i2s@fe410000,rockchip,rk3568-i2s-tdmøþA I5¤EI´FÏqFÏqüGK:ömclk_txmclk_rxhclk³jj hrxtxBRS %tx-mrx-màèdefaultÞklmnÀ8okay r¨Çi2s@fe420000,rockchip,rk3568-i2s-tdmøþB I6¤M´FÏqüOO;ömclk_txmclk_rxhclk³jj htxrxBT%tx-màèdefaultÞopqrÀ8okay ri2s@fe430000,rockchip,rk3568-i2s-tdmøþC I7üSW<ömclk_txmclk_rxhclk³jj htxrxBUV %tx-mrx-màÀ 8disabledpdm@fe440000,rockchip,rk3568-pdmøþD ILüZYöpdm_clkpdm_hclk³j  hrxÞstuvwxèdefaultBX%pdm-mÀ 8disabledspdif@fe460000,rockchip,rk3568-spdiføþF If ömclkhclkü_\³j htxèdefaultÞyÀ 8disableddma-controller@fe530000,arm,pl330arm,primecelløþS@I  �ü  öapb_pclk ¤¨&dma-controller@fe550000,arm,pl330arm,primecelløþU@I �ü  öapb_pclk ¤¨ji2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþZ I/üHG öi2cpclkÞzèdefault 8okayi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ[ I0üJI öi2cpclkÞ{èdefault  8disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ\ I1üLK öi2cpclkÞ|èdefault  8disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ] I2üNM öi2cpclkÞ}èdefault 8okayi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ^ I3üPO öi2cpclkÞ~èdefault  8disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtøþ` I•ü ötclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiøþa IgüRQöspiclkapb_pclk³&& htxrxèdefault Þ€�  8disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiøþb IhüTSöspiclkapb_pclk³&& htxrxèdefault Þ‚ƒ„  8disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiøþc IiüVUöspiclkapb_pclk³&& htxrxèdefault Þ…†‡  8disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiøþd IjüXWöspiclkapb_pclk³&& htxrxèdefault Þˆ‰Š  8disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartøþe Iuüöbaudclkapb_pclk³&& Þ‹Œ�èdefault¸Å8okay ¯bluetooth,brcm,bcm43430a1-btüŽölpo ¿ã`èdefault Þ��‘ Éb Ø% äserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartøþf Ivü# öbaudclkapb_pclk³&&Þ’èdefault¸Å8okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartøþg Iwü'$öbaudclkapb_pclk³&&Þ“èdefault¸Å 8disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartøþh Ixü+(öbaudclkapb_pclk³&& Þ”èdefault¸Å 8disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartøþi Iyü/,öbaudclkapb_pclk³& & Þ•èdefault¸Å 8disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþj Izü30öbaudclkapb_pclk³& & Þ–èdefault¸Å 8disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþk I{ü74öbaudclkapb_pclk³&&Þ—èdefault¸Å 8disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþl I|ü;8öbaudclkapb_pclk³&&Þ˜èdefault¸Å 8disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþm I}ü?<öbaudclkapb_pclk³&&Þ™èdefault¸Å 8disabledthermal-zonescpu-thermal ñd è štripscpu_alert0 %p 1Ðópassive¨›cpu_alert1 %$ø 1Ðópassivecpu_crit %s 1Ð ócriticalcooling-mapsmap0 <›0 A ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal ñ è štripsgpu-threshold %p 1Ðópassivegpu-target %$ø 1Ðópassive¨œgpu-crit %s 1Ð ócriticalcooling-mapsmap0 <œ A�ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcøþq Is¤´f@ ®`üötsadcapb_pclkB�‚×à PsèdefaultsleepÞž gŸ q8okay ‡ ž¨šsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcøþr I]üösaradcapb_pclkB€ %saradc-apb ¹8okay Ë ¨½pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþnüZY öpwmpclkÞ¡èdefaultÏ 8disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþnüZY öpwmpclkÞ¢èdefaultÏ 8disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþn üZY öpwmpclkÞ£èdefaultÏ 8disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþn0üZY öpwmpclkÞ¤èdefaultÏ 8disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþoü]\ öpwmpclkÞ¥èdefaultÏ 8disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþoü]\ öpwmpclkÞ¦èdefaultÏ 8disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþo ü]\ öpwmpclkÞ§èdefaultÏ 8disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþo0ü]\ öpwmpclkÞ¨èdefaultÏ 8disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþpü`_ öpwmpclkÞ©èdefaultÏ 8disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþpü`_ öpwmpclkÞªèdefaultÏ 8disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþp ü`_ öpwmpclkÞ«èdefaultÏ 8disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþp0ü`_ öpwmpclkÞ¬èdefaultÏ 8disabledphy@fe830000,rockchip,rk3568-naneng-combphyøþƒü"} örefapbpipe¤"´õáBÇ%phy ×­ é® ÿ8okay¨phy@fe840000,rockchip,rk3568-naneng-combphyøþ„ü%~ örefapbpipe¤%´õáBÉ%phy ×­ é¯ ÿ8okay¨phy@fe870000,rockchip,rk3568-csi-dphyøþ‡üyöpclk ÿBº%apbà 8disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyøþ… örefpclküz ÿ# %apbB» 8disabled¨Mmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyøþ† örefpclkü{ ÿ# %apbB¼ 8disabled¨Nusb2phy@fe8a0000,rockchip,rk3568-usb2phyøþŠüöphyclkËclk_usbphy0_480m I‡ °á8okay¨host-port ÿ8okay !¨otg-port ÿ8okay !¨usb2phy@fe8b0000,rockchip,rk3568-usb2phyøþ‹üöphyclkËclk_usbphy1_480m Iˆ ±á8okayhost-port ÿ8okay ²¨otg-port ÿ8okay ²¨pinctrl,rockchip,rk3568-pinctrlàEV g¨³gpio@fdd60000,rockchip,gpio-bankøýÖ I!ü.  % 5³  AwŒ¨"gpio@fe740000,rockchip,gpio-bankøþt I"ücd % 5³  AwŒ¨¿gpio@fe750000,rockchip,gpio-bankøþu I#üef % 5³@  AwŒ¨bgpio@fe760000,rockchip,gpio-bankøþv I$ügh % 5³`  AwŒgpio@fe770000,rockchip,gpio-bankøþw I%üij % 5³€  AwŒ¨Äpcfg-pull-up M¨¶pcfg-pull-down Z¨¼pcfg-pull-none i¨´pcfg-pull-none-drv-level-1 i v¨¸pcfg-pull-none-drv-level-2 i v¨·pcfg-pull-none-drv-level-3 i v¨»pcfg-pull-up-drv-level-1 M v¨ºpcfg-pull-up-drv-level-2 M v¨µpcfg-pull-none-smt i …¨¹acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 š´¨cpuebcedpdpemmcemmc-rstnout š´¨iemmc-bus8€ š µ µµµµµµµ¨eemmc-clk šµ¨femmc-cmd šµ¨gemmc-datastrobe š´¨heth0eth1flashfspifspi-pins` š´´´´´´¨dgmac0gmac1gpuhdmitxhdmitxm0-cec š´¨Qhdmitx-scl š´¨Ohdmitx-sda š´¨Pi2c0i2c0-xfer š ¹ ¹¨ i2c1i2c1-xfer š ¹ ¹¨zi2c2i2c2m0-xfer š ¹¹¨{i2c3i2c3m0-xfer 𹹍|i2c4i2c4m0-xfer š ¹ ¹¨}i2c5i2c5m0-xfer š ¹ ¹¨~i2s1i2s1m0-lrcktx š´¨li2s1m0-mclk š´¨$i2s1m0-sclktx š´¨ki2s1m0-sdi0 š ´¨mi2s1m0-sdo0 š´¨ni2s2i2s2m0-lrcktx š´¨pi2s2m0-sclktx š´¨oi2s2m0-sdi š´¨qi2s2m0-sdo š´¨ri2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk š´¨spdmm0-clk1 š´¨tpdmm0-sdi0 š ´¨updmm0-sdi1 š ´¨vpdmm0-sdi2 š ´¨wpdmm0-sdi3 š´¨xpmicpmic-int š¶¨#pmupwm0pwm0m0-pins š´¨(pwm1pwm1m0-pins š´¨)pwm2pwm2m0-pins š´¨*pwm3pwm3-pins š´¨+pwm4pwm4-pins 𴍡pwm5pwm5-pins 𴍢pwm6pwm6-pins 𴍣pwm7pwm7-pins 𴍤pwm8pwm8m0-pins š ´¨¥pwm9pwm9m0-pins š ´¨¦pwm10pwm10m0-pins š ´¨§pwm11pwm11m0-pins 𴍍pwm12pwm12m0-pins 𴍩pwm13pwm13m0-pins š´¨ªpwm14pwm14m0-pins 𴍫pwm15pwm15m0-pins 𴍬refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ šµµµµ¨Ysdmmc0-clk šµ¨Zsdmmc0-cmd šµ¨[sdmmc0-det š¶¨\sdmmc1sdmmc1-bus4@ šµµµµ¨_sdmmc1-clk šµ¨asdmmc1-cmd šµ¨`sdmmc2spdifspdifm0-tx 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-mapconsole-sizeftrace-sizepmsg-sizerecord-sizearm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyoffsetmode-normalmode-loadermode-recoverymode-bootloader#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltrockchip,mic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsmax-speedshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolorfunctionledsenable-active-highgpiopost-power-on-delay-msreset-gpios