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gpio@ffb10000rockchip,gpio-bankvÿ±” › œ 1L<LX ` dyŠ gpio@ffb20000rockchip,gpio-bankvÿ²” ä å 1N<LX € dyŠ ºZpcfg-pull-up˜ºpcfg-pull-down¥ºpcfg-pull-none´ºpcfg-pull-none-drv-level-0´Áºpcfg-pull-none-drv-level-2´Áºpcfg-pull-up-drv-level-2˜Áºpcfg-pull-none-smt´Ðºarmclkemmcemmc-bus8€åºFemmc-clkåºGemmc-cmdåºHemmc-strbåºIethfephyfephym0-led-linkåº@fephym0-led-spdåºAfspigpuhdmihsmi2c0i2c1i2c1m0-xfer åº3i2c2i2c2m1-xfer åº5i2c3i2c4i2c4-xfer åº6i2c5i2c6i2c7i2c7-xfer åº7i2s0i2s1jtagpciepdmpmupwm0pwm1pwm1m0-pinsåº8pwm2pwm2m0-pinsåº9pwm3pwm4pwm5pwm6pwm7pwrrefrgmiiscrsdio0sdio0-bus4@åºJsdio0-clkåºKsdio0-cmdåºLsdio1sdio1-bus4@å ºMsdio1-clkåºNsdio1-cmdåºOsdmmcsdmmc-bus4@åºPsdmmc-clkåºQsdmmc-cmdåºRsdmmc-detåºSsdmmc-vol-ctrl-håº^spdifspi0spi1tsi0tsi1uart0uart0m0-xfer åº2uart1uart2uart3uart4uart5uart6uart7bluetoothbt-wake-host-håhost-wake-bt-håledsstate-led-båºWusbusb-host-enåº]wifiusb-wifi-pwråº[wifi-reg-on-håºawifi-wake-host-håpsciarm,psci-1.0arm,psci-0.2�smcreserved-memory+*shmem@10f000arm,scmi-shmemvðóº timerarm,armv8-timer01   clock-xin24m fixed-clockún6 xin24mÓºclock-gmac50m fixed-clockúúð€ gmac0Óºsoc simple-bus*üüD+pcie@fe000000*rockchip,rk3528-pcierockchip,rk3568-pcie0vþ@þOüdbiapbconfig'ÿ(” ° ± ² ® ¯$1aclk_mstaclk_slvaclk_dbipclkauxzpciH1œ�š›™ž=syspmcmsglegacyerrmsiyM``nŽ˜ �pcie-phyŠ T*üüü ü à@§ d b ®pwrpipe+ ºdisabledlegacy-interrupt-controllerd  1›yºinterrupt-controller@fed01000 arm,gic-400@vþÐþÐ þÐ@ þÐ`  1 dyºqos@ff200000rockchip,rk3528-qossysconvÿ qos@ff200080rockchip,rk3528-qossysconvÿ € qos@ff200100rockchip,rk3528-qossysconvÿ  qos@ff200200rockchip,rk3528-qossysconvÿ  qos@ff200280rockchip,rk3528-qossysconvÿ € qos@ff200300rockchip,rk3528-qossysconvÿ  qos@ff200380rockchip,rk3528-qossysconvÿ € qos@ff210000rockchip,rk3528-qossysconvÿ! qos@ff210080rockchip,rk3528-qossysconvÿ!€ qos@ff220000rockchip,rk3528-qossysconvÿ" ºqos@ff220080rockchip,rk3528-qossysconvÿ"€ ºqos@ff240000rockchip,rk3528-qossysconvÿ$ qos@ff250000rockchip,rk3528-qossysconvÿ% ºqos@ff260000rockchip,rk3528-qossysconvÿ& ºqos@ff270000rockchip,rk3528-qossysconvÿ' ºqos@ff270080rockchip,rk3528-qossysconvÿ'€ ºqos@ff270100rockchip,rk3528-qossysconvÿ' ºqos@ff270200rockchip,rk3528-qossysconvÿ' º qos@ff270280rockchip,rk3528-qossysconvÿ'€ º!qos@ff270300rockchip,rk3528-qossysconvÿ' º"qos@ff270380rockchip,rk3528-qossysconvÿ'€ º#qos@ff270480rockchip,rk3528-qossysconvÿ'€ º$qos@ff270500rockchip,rk3528-qossysconvÿ' º%qos@ff280000rockchip,rk3528-qossysconvÿ( º&qos@ff280080rockchip,rk3528-qossysconvÿ(€ º'qos@ff280100rockchip,rk3528-qossysconvÿ( º(qos@ff280180rockchip,rk3528-qossysconvÿ(€ º)qos@ff280200rockchip,rk3528-qossysconvÿ( º*qos@ff280280rockchip,rk3528-qossysconvÿ(€ º+qos@ff280300rockchip,rk3528-qossysconvÿ( º,qos@ff280380rockchip,rk3528-qossysconvÿ(€ º-qos@ff280400rockchip,rk3528-qossysconvÿ( º.syscon@ff340000rockchip,rk3528-vpu-grfsysconvÿ4€ºBsyscon@ff348000$rockchip,rk3528-pipe-phy-grfsysconvÿ4€€ºUsyscon@ff360000rockchip,rk3528-vo-grfsysconvÿ6º<clock-controller@ff4a0000rockchip,rk3528-cruvÿJ˜Á t          z y  LLÑ€FÏq;šÊ;]ÁQ–æ²€Íeúð€õáðÑ€ ëÂá£Cýׄ#ÃFúð€õásY@Íe” 1xin24mgmac0Óæº syscon@ff540000rockchip,rk3528-ioc-grfsysconvÿTº power-management@ff600000&rockchip,rk3528-pmusysconsimple-mfdvÿ` power-controller!rockchip,rk3528-power-controlleró+º power-domain@4v” Ð Ëópower-domain@5vó ºdisabledpower-domain@6vópower-domain@7v$ !"#$%ópower-domain@8v$&'()*+,-.ógpu@ff700000"rockchip,rk3528-maliarm,mali-450vÿpÁ ÐѳÜ@ᣔ Ð 1buscoreT1XYV\]Z["=gpgpmmupppp0ppmmu0pp1ppmmu1›/Š § wºokay0spi@ff9c0000(rockchip,rk3528-spirockchip,rk3066-spivÿœ” â á1spiclkapb_pclk 1ƒ11txrxŠ + ºdisabledspi@ff9d0000(rockchip,rk3528-spirockchip,rk3066-spivÿ�” ž �1spiclkapb_pclk 1„11txrxŠ + ºdisabledserial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uartvÿŸ”  k1baudclkapb_pclk 1(1 1)6ºokay@defaultN2serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uartvÿŸ€”  ë1baudclkapb_pclk 1)1 1 Š )6 ºdisabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uartvÿ ”   1baudclkapb_pclk 1*1 1 Š )6 ºdisabledserial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uartvÿ €”  ì1baudclkapb_pclk 1+11Š )6 ºdisabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uartvÿ¡”  11baudclkapb_pclk 1,11Š )6 ºdisabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uartvÿ¡€” " ¡1baudclkapb_pclk 1-11Š )6 ºdisabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uartvÿ¢” % ¢1baudclkapb_pclk 1.11Š )6 ºdisabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uartvÿ¢€” ( £1baudclkapb_pclk 1/11Š )6 ºdisabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2cvÿ¥” ß Þ 1i2cpclk 1=Š + ºdisabledi2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2cvÿ¥€” Ý Ü 1i2cpclk 1>Š +ºokay@defaultN3eeprom@50belling,bl24c16aatmel,24c16vPXak4i2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2cvÿ¦” j i 1i2cpclk 1?@defaultN5+ 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» ›Yregulator-1v1-vcc-ddrregulator-fixed6vcc_ddrEYkÈàƒÈà›Yregulator-1v8-vccregulator-fixed6vcc_1v8EYkw@ƒw@›4º:regulator-3v3-vccregulator-fixed6vcc_3v3EYk2Z ƒ2Z ›Yº4regulator-3v3-vcc-wifiregulator-fixed¦ Z@defaultN[ 6vcc_wifik2Z ƒ2Z ›4regulator-5v0-vcc-sysregulator-fixed 6vcc5v0_sysEYkLK@ƒLK@ºYregulator-5v0-vcc-usb20regulator-fixed¦ \@defaultN] 6vcc5v0_usb20kLK@ƒLK@›Yregulator-vccio-sdregulator-gpio X@defaultN^ 6vccio_sdkw@ƒ2Z ¹w@2Z ›YºTregulator-vdd-armpwm-regulatorÀ_ˆÅY6vdd_armEYk bƒShÐúºregulator-vdd-logicpwm-regulatorÀ`ˆÅY 6vdd_logicEYk ÁèƒY°Ðúº0rfkill rfkill-gpio Òrfkill-wlan@defaultNaîwlan ùX compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c1mmc0mmc1serial0cpuregdevice_typeenable-methodclocksoperating-points-v2cpu-supplyphandlearm,smc-idshmem#clock-cellsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspower-domainsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesreg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-lanesphysphy-namesresetsreset-namesstatusassigned-clocksassigned-clock-rates#reset-cells#power-domain-cellspm_qosmali-supplydmasdma-namesreg-io-widthreg-shiftpinctrl-namespinctrl-0pagesizeread-onlyvcc-supply#pwm-cells#io-channel-cellsvref-supplyphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usemax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthrockchip,default-sample-phasecap-sd-highspeeddisable-wpsd-uhs-sdr104#dma-cellsarm,pl330-periph-burst#phy-cellsrockchip,pipe-grfrockchip,pipe-phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statefunctiongpioslinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highstatespwmspwm-supplyregulator-settling-time-up-usradio-typeshutdown-gpios