Ð þíùû8ì¬( Oìt2radxa,rockpi4b-plusradxa,rockpi4rockchip,rk3399 +7Radxa ROCK Pi 4B+aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000�/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe330000Ý/mmc@fe320000â/mmc@fe310000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@W�øôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledÅpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä™pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúà�ûàûà8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk§okay ¢«µ¿defaultÍÝíinterrupt-controllerý äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm«8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 ¿defaultµ §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac> �‰ –stmmacethL!Y§okayd¦t"‹input˜#£rgmii¿defaultµ$ ¬%¼ Ò'ÃPç(ðmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ùðÑ€ îMœ�›biuciuciu-driveciu-sample> �y–reset§okay+Ðúð€):P&[¿default µ'()iwifi@1brcm,bcm4329-fmac÷ *® 1host-wake¿defaultµ+mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AùðÑ€dÍw ë ÎLš››biuciuciu-driveciu-sample> �z–reset§okayŒ) ž*§¿defaultµ,-./mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® ²!dNw ëÂNð›clk_xinclk_ahbàemmc_cardclockóy0 ~phy_arasan> ȧokayùðÑ€Ùè[ä�usb@fe380000 generic-ehci÷þ8®ÈÉ1y2~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ1y2~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË3y4~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË3y4~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0�ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®i�öƒ›refbus_earlysuspendhosty56~usb2-phyusb3-phy  utmi_wide+Le†> §okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ�®n‚÷„›refbus_earlysuspendhosty78~usb2-phyusb3-phy  utmi_wide+Le†> §okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® dr¡wõá ë ru¡o›core-clkpclkspdifgrfy9:>  �HJý–spdifdptxapbcoreL!¨ §disabledportsport+endpoint@0÷¹;ä¯endpoint@1÷¹<ä©interrupt-controller@fee00000 arm,gic-v3 +ˆýP÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-itsÉØ÷þâäppi-partitionsinterrupt-partition-0ãäinterrupt-partition-1ãäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>ìPe›saradcapb_pclk�Ô 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òcriticalcooling-mapsmap0l mÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®adOw q°Od›tsadcapb_pclk�è –tsadc-apbL!s¿initdefaultsleepµn-o7nA§okayWnäiqos@ffa58000rockchip,rk3399-qossyscon÷ÿ¥€ äwqos@ffa5c000rockchip,rk3399-qossyscon÷ÿ¥À äxqos@ffa60080rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon÷ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon÷ÿ§ ä{qos@ffa70080rockchip,rk3399-qossyscon÷ÿ§€ ä|qos@ffa74000rockchip,rk3399-qossyscon÷ÿ§@ äyqos@ffa76000rockchip,rk3399-qossyscon÷ÿ§` äzqos@ffa90000rockchip,rk3399-qossyscon÷ÿ© ä}qos@ffa98000rockchip,rk3399-qossyscon÷ÿ©€ äpqos@ffaa0000rockchip,rk3399-qossyscon÷ÿª ä~qos@ffaa0080rockchip,rk3399-qossyscon÷ÿª€ äqos@ffaa8000rockchip,rk3399-qossyscon÷ÿª€ ä€qos@ffaa8080rockchip,rk3399-qossyscon÷ÿª€€ ä�qos@ffab0000rockchip,rk3399-qossyscon÷ÿ« äqqos@ffab0080rockchip,rk3399-qossyscon÷ÿ«€ ärqos@ffab8000rockchip,rk3399-qossyscon÷ÿ«€ äsqos@ffac0000rockchip,rk3399-qossyscon÷ÿ¬ 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§disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7††"›baudclkapb_pclk®f9C¿defaultµ‹ §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<d† w ë† † ›i2cpclk®9¿defaultµŒ+§okayЀ ¨!pmic@1brockchip,rk808÷ @®óàxin32krk808-clkout2¿defaultµ�³ËÙŽåŽñŽýŽ Ž Ž !O -Ž 9Ž FŽ SO›äJregulatorsDCDC_REG1 `vdd_center o ƒ • q° ­™p Åqregulator-state-mem ÚDCDC_REG2 `vdd_cpu_l o ƒ • q° ­™p Åqä regulator-state-mem ÚDCDC_REG3 `vcc_ddr o ƒregulator-state-mem óDCDC_REG4 `vcc_1v8 o ƒ •w@ ­w@äregulator-state-mem ó w@LDO_REG1 `vcca1v8_codec o ƒ •w@ ­w@äšregulator-state-mem ÚLDO_REG2 `vcca1v8_hdmi o ƒ •w@ ­w@ä·regulator-state-mem ÚLDO_REG3 `vcca_1v8 o ƒ •w@ ­w@regulator-state-mem ó w@LDO_REG4 `vcc_sdio o ƒ •-ÆÀ ­-ÆÀä›regulator-state-mem ó -ÆÀLDO_REG5 `vcca3v0_codec o ƒ •-ÆÀ ­-ÆÀregulator-state-mem ÚLDO_REG6 `vcc_1v5 o ƒ •ã` ­ã`regulator-state-mem ó ã`LDO_REG7 `vcca0v9_hdmi o ƒ • »  ­ » ä¶regulator-state-mem ÚLDO_REG8 `vcc_3v0 o ƒ •-ÆÀ ­-ÆÀä…regulator-state-mem ó -ÆÀSWITCH_REG1 `vcc_cam o ƒregulator-state-mem ÚSWITCH_REG2 `vcc_mipi o ƒregulator-state-mem Úregulator@40silergy,syr827÷@ '¿defaultµ� `vdd_cpu_b • ß4 ­ã` Åè o ƒ DŽäregulator-state-mem Úregulator@41silergy,syr828÷A '¿defaultµ� `vdd_gpu • ß4 ­ã` Åè o ƒ DŽäÄregulator-state-mem Úeeprom@50belling,bl24c04aatmel,24c04÷P O X b…i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=d† w ë† † ›i2cpclk®8¿defaultµ‘+§okay X!i2c@ff3e0000rockchip,rk3399-i2c÷ÿ>d† w ë† † ›i2cpclk®:¿defaultµ’+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB m¿defaultµ“† §disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB m¿defaultµ”† §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  m¿defaultµ•†§okayäÕpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 m¿defaultµ–† §disableddfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk x—> iommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface > ä—video-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore x˜> iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface>  ä˜iommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface  §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclk�jgi –coreaxiahb> !efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® Œ —Ó ›apb_pclkäddma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® Œ —Ô ›apb_pclkäSclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu™›xin24mLó ®d†w(Jñä†clock-controller@ff760000rockchip,rk3399-cru÷ÿv™›xin24mL!ó ®ˆdÀÀ@ÂÁBÉÂCãÞxíDw#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+ä!io-domains"rockchip,rk3399-io-voltage-domain§okay »š È… Õ… å›mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf>  ò §disabledä±usb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä1host-port ò® 1linestate§okay˜œä2otg-port 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¨ §disabled K 1i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)¨dd­txrx›i2s_clki2s_hclkXÖ> ¨§okayä´vop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ� ÿ� ®wdÛÛwׄõáÛµÛ›aclk_vopdclk_vophclk_vop x¤> � –axiahbdclk§okayport+äendpoint@0÷¹¥ä½endpoint@1÷¹¦äÂendpoint@2÷¹§ä»endpoint@3÷¹¨ä¿endpoint@4÷¹©ä<iommu@ff8f3f00rockchip,iommu÷ÿ�?®wÛÛ ›aclkiface>  §okayä¤vop@ff900000rockchip,rk3399-vop-big ÷ÿ� ÿ� ®vdÙÙwׄõáÙ´Ù›aclk_vopdclk_vophclk_vop xª> � –axiahbdclk§okayport+äendpoint@0÷¹«äÁendpoint@1÷¹¬ä¼endpoint@2÷¹­äºendpoint@3÷¹®ä¾endpoint@4÷¹¯ä;iommu@ff903f00rockchip,iommu÷ÿ�?®vÙÙ ›aclkiface>  §okayäªisp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk x°y±~dphy>  §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface >  yä°isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk x²y³~dphy>  §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface >  yä²hdmi-soundsimple-audio-card ”i2s ­ Çhdmi-sound§okaysimple-audio-card,cpu Þ´simple-audio-card,codec Þµhdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ”C®(tqpo›iahbisfrcecgrfref> L!¨§okay è¶ ø· ¸¿defaultµ¹äµports+port@0÷+endpoint@0÷¹ºä­endpoint@1÷¹»ä§port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf> �û–apbL! §disabledports+port@0÷+endpoint@0÷¹¼ä¬endpoint@1÷¹½ä¥port@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf> �ü–apbL! ò §disabledä³ports+port@0÷+endpoint@0÷¹¾ä®endpoint@1÷¹¿ä¨port@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrf¿defaultµÀ> �–dpL! §disabledports+port@0÷+endpoint@0÷¹Áä«endpoint@1÷¹Âä¦port@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P> #§okayÅà Äämpinctrlrockchip,rk3399-pinctrlL!+ˆgpio@ff720000rockchip,gpio-bank÷ÿr†®  0ý ä*gpio@ff730000rockchip,gpio-bank÷ÿs†®  0ý ä@gpio@ff780000rockchip,gpio-bank÷ÿxP®  0ý äKgpio@ff788000rockchip,gpio-bank÷ÿx€Q®  0ý ä%gpio@ff790000rockchip,gpio-bank÷ÿyR®  0ý äpcfg-pull-up <äÈpcfg-pull-down IäËpcfg-pull-none XäÅpcfg-pull-none-12ma X e äÇpcfg-pull-none-13ma X e äÆpcfg-pull-none-18ma X epcfg-pull-none-20ma X eäÊpcfg-pull-up-2ma < epcfg-pull-up-8ma < epcfg-pull-up-18ma < epcfg-pull-up-20ma < eäÉpcfg-pull-down-4ma I epcfg-pull-down-8ma I epcfg-pull-down-12ma I e pcfg-pull-down-18ma I epcfg-pull-down-20ma I epcfg-output-high tpcfg-output-low €pcfg-input-enable ‹pcfg-input-pull-up ‹ <pcfg-input-pull-down ‹ Iclockclk-32k ˜Åcifcif-clkin ˜ Åcif-clkouta ˜ Åedpedp-hpd ˜ÅäÀgmacrgmii-pinsð ˜ÆÅ Å Æ Å ÅÅÅÅÆÆÅÅÆÆä$rmii-pins  ˜ Å Æ Å Å ÅÅÅÅÆÆi2c0i2c0-xfer ˜ÅÅäŒi2c1i2c1-xfer ˜ÅÅä=i2c2i2c2-xfer ˜ÇÇäBi2c3i2c3-xfer ˜ÅÅäCi2c4i2c4-xfer ˜ Å Åä‘i2c5i2c5-xfer ˜ Å ÅäDi2c6i2c6-xfer ˜ Å ÅäEi2c7i2c7-xfer ˜ÅÅäFi2c8i2c8-xfer ˜ÅÅä’i2s0i2s0-2ch-bus` ˜ÅÅÅÅÅÅä i2s0-2ch-bus-bclk-off` ˜ÅÅÅÅÅÅä¡i2s0-8ch-bus� ˜ÅÅÅÅÅÅÅÅÅi2s0-8ch-bus-bclk-off� ˜ÅÅÅÅÅÅÅÅÅi2s1i2s1-2ch-busP ˜ÅÅÅÅÅä£i2s1-2ch-bus-bclk-offP ˜ÅÅÅÅÅsdio0sdio0-bus1 ˜Èsdio0-bus4@ ˜ÉÉÉÉä'sdio0-cmd ˜Éä(sdio0-clk ˜Êä)sdio0-cd ˜Èsdio0-pwr ˜Èsdio0-bkpwr ˜Èsdio0-wp ˜Èsdio0-int ˜Èsdmmcsdmmc-bus1 ˜Èsdmmc-bus4@ ˜È È È Èä/sdmmc-clk ˜ Åä,sdmmc-cmd ˜ Èä.sdmmc-cd ˜Èä-sdmmc-wp ˜Èsuspendap-pwroff ˜Åddrio-pwroff ˜Åspdifspdif-bus ˜Åäžspdif-bus-1 ˜Åspi0spi0-clk ˜ÈäTspi0-cs0 ˜ÈäWspi0-cs1 ˜Èspi0-tx ˜ÈäUspi0-rx ˜ÈäVspi1spi1-clk ˜ ÈäXspi1-cs0 ˜ Èä[spi1-rx ˜ÈäZspi1-tx ˜ÈäYspi2spi2-clk ˜ Èä\spi2-cs0 ˜ Èä_spi2-rx ˜ Èä^spi2-tx ˜ Èä]spi3spi3-clk ˜Èä‡spi3-cs0 ˜ÈäŠspi3-rx ˜Èä‰spi3-tx ˜Èäˆspi4spi4-clk ˜Èä`spi4-cs0 ˜Èäcspi4-rx ˜Èäbspi4-tx ˜Èäaspi5spi5-clk ˜Èäespi5-cs0 ˜Èähspi5-rx ˜Èägspi5-tx ˜Èäftestclktest-clkout0 ˜Åtest-clkout1 ˜Åtest-clkout2 ˜Åtsadcotp-pin ˜Åänotp-out ˜Åäouart0uart0-xfer ˜ÈÅäGuart0-cts ˜ÅäHuart0-rts ˜ÅäIuart1uart1-xfer ˜ È ÅäPuart2auart2a-xfer ˜È Åuart2buart2b-xfer ˜ÈÅuart2cuart2c-xfer ˜ÈÅäQuart3uart3-xfer ˜ÈÅäRuart3-cts ˜Åuart3-rts ˜Åuart4uart4-xfer ˜ÈÅä‹uarthdcpuarthdcp-xfer ˜ÈÅpwm0pwm0-pin ˜Åä“pwm0-pin-pull-down ˜Ëvop0-pwm-pin ˜Åvop1-pwm-pin ˜Åpwm1pwm1-pin ˜Åä”pwm1-pin-pull-down ˜Ëpwm2pwm2-pin ˜Åä•pwm2-pin-pull-down ˜Ëpwm3apwm3a-pin ˜Åä–pwm3bpwm3b-pin ˜Åhdmihdmi-i2c-xfer ˜ÅÅhdmi-cec ˜Åä¹pciepci-clkreqn-cpm ˜Åpci-clkreqnb-cpm ˜Åäpcie-pwr-en ˜ÅäÒbtbt-enable-h ˜ ÅäNbt-host-wake-l ˜ÅäLbt-wake-l ˜ÅäMes8316hp-detect ˜Åä>hp-int ˜Èä?ledsuser-led2 ˜ÅäÌpmicpmic-int-l ˜Èä�vsel1-pin ˜Ëä�vsel2-pin ˜Ëä�usb-typecvcc5v0-typec-en ˜ÈäÑusb2vcc5v0-host-en ˜ÅäÓwifiwifi-enable-h ˜ ÅäÍwifi-host-wake-l ˜Åä+opp-table-0operating-points-v2 ¦ä opp00 ±Q– ¸ 5 5Œ0 Æœ@opp01 ±#ÃF ¸ –¨ –¨Œ0opp02 ±0£, ¸ øP øPŒ0opp03 ±<Ü ¸ »  » Œ0opp04 ±G†Œ ¸à˜à˜Œ0opp05 ±Tfr ¸ÈàÈàŒ0opp06 ±ZJ ¸Œ0Œ0Œ0opp-table-1operating-points-v2 ¦äopp00 ±Q– ¸ 5 5Ð Æœ@opp01 ±#ÃF ¸ 5 5Ðopp02 ±0£, ¸ –¨ –¨Ðopp03 ±<Ü ¸ øP øPÐopp04 ±G†Œ ¸ »  » Ðopp05 ±Tfr ¸à˜à˜Ðopp06 ±_Ø" ¸��Ðopp07 ±kIÒ ¸Œ0Œ0Ðopp08 ±x)¸ ¸ÐÐÐopp-table-2operating-points-v2äÃopp00 ± ë ¸ 5 5g8opp01 ±³Ü@ ¸ 5 5g8opp02 ±ׄ ¸ –¨ –¨g8opp03 ±Íe ¸ øP øPg8opp04 ±#ÃF ¸HHg8opp05 ±/¯ ¸g8g8g8opp-table-3operating-points-v2äopp00 ±ׄ ¸ »  » Hopp01 ±'²Z€ ¸ »  » Hopp02 ±/¯ ¸ »  » Hopp03 ±7P( ¸HHHchosen ×serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóä"leds gpio-leds¿defaultµÌled-0 ãstatus ì ¥% òheartbeatsdio-pwrseqmmc-pwrseq-simpleJ ›ext_clock¿defaultµÍ * ä&soundaudio-graph-card Analog Î @sound-ditaudio-graph-card SPDIF Ïspdif-ditlinux,spdif-dit¨portendpoint¹ÐäŸregulator-vbus-typecregulator-fixed , ·@¿defaultµÑ `vbus_typec o DŽregulator-dc-12vregulator-fixed `vcc12v_dcin o ƒ •· ­·äÔregulator-vcc3v3-lanregulator-fixed `vcc3v3_lan o ƒ •2Z  ­2Z  DOä#regulator-vcc3v3-pcieregulator-fixed , ·K¿defaultµÒ `vcc3v3_pcie o ƒ DŽäregulator-vcc3v3-sysregulator-fixed `vcc3v3_sys o ƒ •2Z  ­2Z  DŽäOregulator-vcc5v0-hostregulator-fixed , ·¿defaultµÓ `vcc5v0_host o DŽäœregulator-vcc-sysregulator-fixed `vcc5v0_sys o ƒ •LK@ ­LK@ DÔäŽregulator-vcc-0v9regulator-fixed `vcc_0v9 o ƒ • »  ­ »  DOäregulator-vdd-logpwm-regulator ?Õa¨ DŽ `vdd_log o ƒ • 5 ­\À compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplysystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplypagesizeread-onlyvcc-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,enable-strobe-pulldownrockchip,capture-channelsrockchip,playback-channelsdai-formatmclk-fsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathfunctioncolorlinux,default-triggerreset-gpioslabeldaishp-det-gpiosenable-active-highpwmspwm-supply