Ð þíöj8é(( Bèðradxa,rock-4serockchip,rk3399 +7Radxa ROCK 4SEaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000�/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe330000Ý/mmc@fe320000â/mmc@fe310000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@W�øôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä–pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúà�ûàûà8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk§okay ¢«µ¿defaultÍÝíinterrupt-controllerý äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm«8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 ¿defaultµ §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac>�‰ –stmmacethL Y§okayd¦t!‹input˜"£rgmii¿defaultµ# ¬$¼ Ò'ÃPç(ðmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ùðÑ€ îMœ�›biuciuciu-driveciu-sample>�y–reset§okay+Ðúð€):P%[¿default µ&'(iwifi@1brcm,bcm4329-fmac÷ )® 1host-wake¿defaultµ*mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AùðÑ€dÍw ë ÎLš››biuciuciu-driveciu-sample>�z–reset§okayŒ) ž)§¿defaultµ+,-.mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® ² dNw ëÂNð›clk_xinclk_ahbàemmc_cardclockóy/ ~phy_arasan>ȧokayùðÑ€Ùè[äšusb@fe380000 generic-ehci÷þ8®ÈÉ0y1~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ0y1~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË2y3~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË2y3~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0�ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®i�öƒ›refbus_earlysuspendhosty45~usb2-phyusb3-phy  utmi_wide+Le†>§okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ�®n‚÷„›refbus_earlysuspendhosty67~usb2-phyusb3-phy  utmi_wide+Le†>§okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® dr¡wõá ë ru¡o›core-clkpclkspdifgrfy89> �HJý–spdifdptxapbcoreL ¨ §disabledportsport+endpoint@0÷¹:ä¬endpoint@1÷¹;ä¦interrupt-controller@fee00000 arm,gic-v3 +ˆýP÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-itsÉØ÷þâäppi-partitionsinterrupt-partition-0ãäinterrupt-partition-1ãäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>ìPe›saradcapb_pclk�Ô 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§disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿSb›baudclkapb_pclk®d9C¿defaultµM§okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿTc›baudclkapb_pclk®e9C¿defaultµN §disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿG[›spiclkapb_pclk®D¨O O ­txrx¿defaultµPQRS+ §disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿH\›spiclkapb_pclk®5¨O O ­txrx¿defaultµTUVW+ §disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿI]›spiclkapb_pclk®4¨OO­txrx¿defaultµXYZ[+ §disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿJ^›spiclkapb_pclk®C¨OO­txrx¿defaultµ\]^_+ §disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ K_›spiclkapb_pclk®„¨`` ­txrx¿defaultµabcd>+ §disabledthermal-zonescpu-thermal·dÍèÛetripscpu_alert0ëp÷Ðòpassiveäfcpu_alert1ë$ø÷Ðòpassiveägcpu_critës÷Ð òcriticalcooling-mapsmap0fÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1gHÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal·dÍèÛetripsgpu_alert0ë$ø÷Ðòpassiveähgpu_critës÷Ð òcriticalcooling-mapsmap0h iÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®adOw q°Od›tsadcapb_pclk�è –tsadc-apbL s¿initdefaultsleepµj-k7jA§okayWnäeqos@ffa58000rockchip,rk3399-qossyscon÷ÿ¥€ äsqos@ffa5c000rockchip,rk3399-qossyscon÷ÿ¥À ätqos@ffa60080rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon÷ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon÷ÿ§ äwqos@ffa70080rockchip,rk3399-qossyscon÷ÿ§€ äxqos@ffa74000rockchip,rk3399-qossyscon÷ÿ§@ äuqos@ffa76000rockchip,rk3399-qossyscon÷ÿ§` ävqos@ffa90000rockchip,rk3399-qossyscon÷ÿ© äyqos@ffa98000rockchip,rk3399-qossyscon÷ÿ©€ älqos@ffaa0000rockchip,rk3399-qossyscon÷ÿª äzqos@ffaa0080rockchip,rk3399-qossyscon÷ÿª€ ä{qos@ffaa8000rockchip,rk3399-qossyscon÷ÿª€ ä|qos@ffaa8080rockchip,rk3399-qossyscon÷ÿª€€ ä}qos@ffab0000rockchip,rk3399-qossyscon÷ÿ« ämqos@ffab0080rockchip,rk3399-qossyscon÷ÿ«€ änqos@ffab8000rockchip,rk3399-qossyscon÷ÿ«€ äoqos@ffac0000rockchip,rk3399-qossyscon÷ÿ¬ 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§disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7‚‚"›baudclkapb_pclk®f9C¿defaultµ‡ §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<d‚ w ë‚ ‚ ›i2cpclk®9¿defaultµˆ+§okayЀ ¨!pmic@1brockchip,rk808÷ ‰®óàxin32krk808-clkout2¿defaultµŠ³ËÙ‹å‹ñ‹ý‹ ‹ ‹ !K -‹ 9‹ F‹ SK›äFregulatorsDCDC_REG1 `vdd_center o ƒ • q° ­™p Åqregulator-state-mem ÚDCDC_REG2 `vdd_cpu_l o ƒ • q° ­™p Åqä regulator-state-mem ÚDCDC_REG3 `vcc_ddr o ƒregulator-state-mem óDCDC_REG4 `vcc_1v8 o ƒ •w@ ­w@äregulator-state-mem ó w@LDO_REG1 `vcca1v8_codec o ƒ •w@ ­w@ä—regulator-state-mem ÚLDO_REG2 `vcca1v8_hdmi o ƒ •w@ ­w@ä´regulator-state-mem ÚLDO_REG3 `vcca_1v8 o ƒ •w@ ­w@regulator-state-mem ó w@LDO_REG4 `vcc_sdio o ƒ •-ÆÀ ­-ÆÀä˜regulator-state-mem ó -ÆÀLDO_REG5 `vcca3v0_codec o ƒ •-ÆÀ ­-ÆÀregulator-state-mem ÚLDO_REG6 `vcc_1v5 o ƒ •ã` ­ã`regulator-state-mem ó ã`LDO_REG7 `vcca0v9_hdmi o ƒ • »  ­ » ä³regulator-state-mem ÚLDO_REG8 `vcc_3v0 o ƒ •-ÆÀ ­-ÆÀä�regulator-state-mem ó -ÆÀSWITCH_REG1 `vcc_cam o ƒregulator-state-mem ÚSWITCH_REG2 `vcc_mipi o ƒregulator-state-mem Úregulator@40silergy,syr827÷@ '¿defaultµŒ `vdd_cpu_b • ß4 ­ã` Åè o ƒ D‹äregulator-state-mem Úregulator@41silergy,syr828÷A '¿defaultµ� `vdd_gpu • ß4 ­ã` Åè o ƒ D‹äÁregulator-state-mem Úeeprom@50belling,bl24c16aatmel,24c16÷P O X b�i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=d‚ w ë‚ ‚ ›i2cpclk®8¿defaultµŽ+§okay X!i2c@ff3e0000rockchip,rk3399-i2c÷ÿ>d‚ w ë‚ ‚ ›i2cpclk®:¿defaultµ�+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB m¿defaultµ�‚ §disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB m¿defaultµ‘‚ §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  m¿defaultµ’‚§okayäÒpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 m¿defaultµ“‚ §disableddfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk x”>iommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface >ä”video-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore x•> iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface>  ä•iommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface  §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclk�jgi –coreaxiahb>!efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® Œ —Ó ›apb_pclkä`dma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® Œ —Ô ›apb_pclkäOclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu–›xin24mLó ®d‚w(Jñä‚clock-controller@ff760000rockchip,rk3399-cru÷ÿv–›xin24mL ó ®ˆdÀÀ@ÂÁBÉÂCãÞxíDw#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+ä io-domains"rockchip,rk3399-io-voltage-domain§okay »— È� Õ� å˜mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf> ò §disabledä®usb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä0host-port ò® 1linestate§okay˜™ä1otg-port ò0®ghj1otg-bvalidotg-idlinestate§okayä4usb2phy@e460rockchip,rk3399-usb2phy÷ä`|›phyclkóàclk_usbphy1_480m§okayä2host-port ò® 1linestate§okay˜™ä3otg-port ò0®lmo1otg-bvalidotg-idlinestate§okayä6phy@f780rockchip,rk3399-emmc-phy÷÷€$š›emmcclk ý2 ò§okay ä/pcie-phyrockchip,rk3399-pcie-phyŠ›refclk ò�‡–phy§okayäphy@ff7c0000rockchip,rk3399-typec-phy÷ÿ|~}›tcpdcoretcpdphy-refd~wúð€>�•”L–uphyuphy-pipeuphy-tcphyL §okaydp-port òä8usb3-port òä5phy@ff800000rockchip,rk3399-typec-phy÷ÿ€€›tcpdcoretcpdphy-refd€wúð€> ��œM–uphyuphy-pipeuphy-tcphyL §okaydp-port òä9usb3-port òä7watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt÷ÿ„€|®xrktimer@ff850000rockchip,rk3399-timer÷ÿ…®QhZ ›pclktimerspdif@ff870000rockchip,rk3399-spdif÷ÿ‡®B¨`­tx ›mclkhclkU׿defaultµ›>¨ §disabledportäÌendpoint¹œäÍi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿˆL ®'¨``­txrx›i2s_clki2s_hclkVÔ¿bclk_onbclk_offµ�-ž>¨§okay 1 KportäËendpoint fi2s q¹Ÿä=i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿ‰®(¨``­txrx›i2s_clki2s_hclkWÕ¿defaultµ >¨ §disabled K 1i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)¨``­txrx›i2s_clki2s_hclkXÖ>¨§okayä±vop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ� ÿ� ®wdÛÛwׄõáÛµÛ›aclk_vopdclk_vophclk_vop x¡>� –axiahbdclk§okayport+äendpoint@0÷¹¢äºendpoint@1÷¹£ä¿endpoint@2÷¹¤ä¸endpoint@3÷¹¥ä¼endpoint@4÷¹¦ä;iommu@ff8f3f00rockchip,iommu÷ÿ�?®wÛÛ ›aclkiface> §okayä¡vop@ff900000rockchip,rk3399-vop-big ÷ÿ� ÿ� ®vdÙÙwׄõáÙ´Ù›aclk_vopdclk_vophclk_vop x§>� –axiahbdclk§okayport+äendpoint@0÷¹¨ä¾endpoint@1÷¹©ä¹endpoint@2÷¹ªä·endpoint@3÷¹«ä»endpoint@4÷¹¬ä:iommu@ff903f00rockchip,iommu÷ÿ�?®vÙÙ ›aclkiface> §okayä§isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk x­y®~dphy> §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface > yä­isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk x¯y°~dphy> §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface > yä¯hdmi-soundsimple-audio-card ”i2s ­ Çhdmi-sound§okaysimple-audio-card,cpu Þ±simple-audio-card,codec Þ²hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ”C®(tqpo›iahbisfrcecgrfref>L ¨§okay è³ ø´ µ¿defaultµ¶ä²ports+port@0÷+endpoint@0÷¹·äªendpoint@1÷¹¸ä¤port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf>�û–apbL  §disabledports+port@0÷+endpoint@0÷¹¹ä©endpoint@1÷¹ºä¢port@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf>�ü–apbL  ò §disabledä°ports+port@0÷+endpoint@0÷¹»ä«endpoint@1÷¹¼ä¥port@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrf¿defaultµ½>�–dpL  §disabledports+port@0÷+endpoint@0÷¹¾ä¨endpoint@1÷¹¿ä£port@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P>#§okayÅÀ Áäipinctrlrockchip,rk3399-pinctrlL +ˆgpio@ff720000rockchip,gpio-bank÷ÿr‚®  0ý ä)gpio@ff730000rockchip,gpio-bank÷ÿs‚®  0ý ä‰gpio@ff780000rockchip,gpio-bank÷ÿxP®  0ý äGgpio@ff788000rockchip,gpio-bank÷ÿx€Q®  0ý ä$gpio@ff790000rockchip,gpio-bank÷ÿyR®  0ý äpcfg-pull-up <äÅpcfg-pull-down IäÈpcfg-pull-none XäÂpcfg-pull-none-12ma X e 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Åä.sdmmc-clk ˜ Âä+sdmmc-cmd ˜ Åä-sdmmc-cd ˜Åä,sdmmc-wp ˜Åsuspendap-pwroff ˜Âddrio-pwroff ˜Âspdifspdif-bus ˜Âä›spdif-bus-1 ˜Âspi0spi0-clk ˜ÅäPspi0-cs0 ˜ÅäSspi0-cs1 ˜Åspi0-tx ˜ÅäQspi0-rx ˜ÅäRspi1spi1-clk ˜ ÅäTspi1-cs0 ˜ ÅäWspi1-rx ˜ÅäVspi1-tx ˜ÅäUspi2spi2-clk ˜ ÅäXspi2-cs0 ˜ Åä[spi2-rx ˜ ÅäZspi2-tx ˜ ÅäYspi3spi3-clk ˜Åäƒspi3-cs0 ˜Åä†spi3-rx ˜Åä…spi3-tx ˜Åä„spi4spi4-clk ˜Åä\spi4-cs0 ˜Åä_spi4-rx ˜Åä^spi4-tx ˜Åä]spi5spi5-clk ˜Åäaspi5-cs0 ˜Åädspi5-rx ˜Åäcspi5-tx ˜Åäbtestclktest-clkout0 ˜Âtest-clkout1 ˜Âtest-clkout2 ˜Âtsadcotp-pin ˜Âäjotp-out ˜Âäkuart0uart0-xfer ˜ÅÂäCuart0-cts ˜ÂäDuart0-rts ˜ÂäEuart1uart1-xfer ˜ Å ÂäLuart2auart2a-xfer ˜Å Âuart2buart2b-xfer ˜ÅÂuart2cuart2c-xfer ˜ÅÂäMuart3uart3-xfer ˜ÅÂäNuart3-cts ˜Âuart3-rts ˜Âuart4uart4-xfer ˜ÅÂä‡uarthdcpuarthdcp-xfer ˜ÅÂpwm0pwm0-pin ˜Âä�pwm0-pin-pull-down ˜Èvop0-pwm-pin ˜Âvop1-pwm-pin ˜Âpwm1pwm1-pin ˜Âä‘pwm1-pin-pull-down ˜Èpwm2pwm2-pin ˜Âä’pwm2-pin-pull-down ˜Èpwm3apwm3a-pin ˜Âä“pwm3bpwm3b-pin ˜Âhdmihdmi-i2c-xfer ˜ÂÂhdmi-cec ˜Âä¶pciepci-clkreqn-cpm ˜Âpci-clkreqnb-cpm ˜Âäpcie-pwr-en ˜ÂäÏbtbt-enable-h ˜ ÂäJbt-host-wake-l ˜ÂäHbt-wake-l ˜ÂäIes8316hp-detect ˜Âhp-int ˜Åledsuser-led2 ˜ÂäÉpmicpmic-int-l ˜ÅäŠvsel1-pin ˜ÈäŒvsel2-pin ˜Èä�usb-typecvcc5v0-typec-en ˜ÅäÎusb2vcc5v0-host-en ˜ÂäÐwifiwifi-enable-h ˜ ÂäÊwifi-host-wake-l ˜Âä*opp-table-0operating-points-v2 ¦ä opp00 ±Q– ¸ Yø YøÐ Æœ@opp01 ±#ÃF ¸ Yø YøÐopp02 ±0£, ¸ »  » Ðopp03 ±<Ü ¸à˜à˜Ðopp-table-1operating-points-v2 ¦äopp00 ±Q– ¸ Yø YøÐ Æœ@opp01 ±#ÃF ¸ Yø YøÐopp02 ±0£, ¸ Yø YøÐopp03 ±<Ü ¸HHÐopp04 ±G†Œ ¸B@B@Ðopp05 ±Tfr ¸g8g8Ðopp06 ±ZJ ¸Œ0Œ0Ðopp-table-2operating-points-v2äÀopp00 ± ë ¸ Yø YøŒ0opp01 ±á£ ¸ Yø YøŒ0opp02 ±ׄ ¸ Yø YøŒ0opp03 ±#ÃF ¸à˜à˜Œ0chosen ×serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóä!leds gpio-leds¿defaultµÉled-0 ãstatus ì ¥$ òheartbeatsdio-pwrseqmmc-pwrseq-simpleF ›ext_clock¿defaultµÊ ) ä%soundaudio-graph-card Analog Ësound-ditaudio-graph-card SPDIF Ìspdif-ditlinux,spdif-dit¨portendpoint¹Íäœregulator-vbus-typecregulator-fixed  ·‰¿defaultµÎ `vbus_typec o D‹regulator-dc-12vregulator-fixed `vcc12v_dcin o ƒ •· ­·äÑregulator-vcc3v3-lanregulator-fixed `vcc3v3_lan o ƒ •2Z  ­2Z  DKä"regulator-vcc3v3-pcieregulator-fixed  ·G¿defaultµÏ `vcc3v3_pcie o ƒ D‹äregulator-vcc3v3-sysregulator-fixed `vcc3v3_sys o ƒ •2Z  ­2Z  D‹äKregulator-vcc5v0-hostregulator-fixed  ·¿defaultµÐ `vcc5v0_host o D‹ä™regulator-vcc-sysregulator-fixed `vcc5v0_sys o ƒ •LK@ ­LK@ DÑä‹regulator-vcc-0v9regulator-fixed `vcc_0v9 o ƒ • »  ­ »  DKäregulator-vdd-logpwm-regulator 2Òa¨ 7‹ `vdd_log o ƒ • 5 ­\À compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplysystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplypagesizeread-onlyvcc-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,enable-strobe-pulldownrockchip,capture-channelsrockchip,playback-channelsdai-formatmclk-fsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathfunctioncolorlinux,default-triggerreset-gpioslabeldaisenable-active-highpwmspwm-supply