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l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@W�øôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúà�ûàûà8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk §disabledinterrupt-controller¢ äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm·Å8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3Ï ídefaultû §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�‰ –stmmaceth §okay+¦;Rinput_jrgmiisídefault û !"~(‡mdiosnps,dwmac-mdio+ethernet-phy@1÷ #® �' u0 ²#ämmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@¾úð€ îMœ�›biuciuciu-driveciu-sampleÌ�y–reset§okay×áòÐúð€ÿ  $+ídefault û%&'9+wifi@1÷brcm,bcm4329-fmac (® 1host-wakeídefaultû)mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®A¾ðÑ€+ÍG ë ÎLš››biuciuciu-driveciu-sampleÌ�z–reset§okay×\á n(ÐðÑ€ÿídefaultû*+,-w.ƒ/mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® �+NG ëÂNð›clk_xinclk_ahbàemmc_cardclockóy0 ~phy_arasan¦§okay×·Æ+ä¤usb@fe380000 generic-ehci÷þ8®ÈÉ1y2~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ1y2~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË3y4~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË3y4~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0�ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®i�öƒ›refbus_earlysuspendàhosty56~usb2-phyusb3-phy èutmi_wideñ *Cd§okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ�®n‚÷„›refbus_earlysuspendàhosty78~usb2-phyusb3-phy èutmi_wideñ *Cd§okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® +r¡Gõá ë ru¡o›core-clkpclkspdifgrfy9: �HJý–spdifdptxapbcore† §disabledportsport+endpoint@0÷—;ä¶endpoint@1÷—<ä°interrupt-controller@fee00000 arm,gic-v3 +ˆ¢P÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-its§¶÷þâäppi-partitionsinterrupt-partition-0Áäinterrupt-partition-1Áäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>ÊPe›saradcapb_pclk�Ô –saradc-apb§okayÜ=äÎcrypto@ff8b0000rockchip,rk3399-crypto÷ÿ‹@®ÐÒ…›hclk_masterhclk_slavesclk�µ®¯–masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto÷ÿ‹€@®‡ÑÓ†›hclk_masterhclk_slavesclk�º¸¹–masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c÷ÿ+AG ëÂAU ›i2cpclk®;ídefaultû>+§okayèÂÿi2c@ff120000rockchip,rk3399-i2c÷ÿ+BG ëÂBV ›i2cpclk®#ídefaultû?+ §disabledi2c@ff130000rockchip,rk3399-i2c÷ÿ+CG ëÂCW ›i2cpclk®"ídefaultû@+§okayèÂÿä½i2c@ff140000rockchip,rk3399-i2c÷ÿ+DG ëÂDX ›i2cpclk®&ídefaultûA+ §disabledi2c@ff150000rockchip,rk3399-i2c÷ÿ+EG ëÂEY ›i2cpclk®%ídefaultûB+ §disabledi2c@ff160000rockchip,rk3399-i2c÷ÿ+FG ëÂFZ ›i2cpclk®$ídefaultûC+ §disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿQ`›baudclkapb_pclk®c!ídefault ûDEF§okaybluetoothbrcm,bcm43438-btG›lpo .H B( T( ídefault ûIJKcLoMserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿRa›baudclkapb_pclk®b!ídefaultûN §disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿSb›baudclkapb_pclk®d!ídefaultûO§okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿTc›baudclkapb_pclk®e!ídefaultûP §disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿG[›spiclkapb_pclk®D|Q Q �txrxídefaultûRSTU+ §disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿH\›spiclkapb_pclk®5|Q Q �txrxídefaultûVWXY+ §disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿI]›spiclkapb_pclk®4|QQ�txrxídefaultûZ[\]+ §disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿJ^›spiclkapb_pclk®C|QQ�txrxídefaultû^_`a+ §disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ K_›spiclkapb_pclk®„|bb �txrxídefaultûcdef+ §disabledthermal-zonescpu-thermal‹d¡è¯gtripscpu_alert0¿pËÐòpassiveähcpu_alert1¿$øËÐòpassiveäicpu_crit¿sËÐ òcriticalcooling-mapsmap0ÖhÛÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1ÖiHÛÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal‹d¡è¯gtripsgpu_alert0¿$øËÐòpassiveäjgpu_crit¿sËÐ òcriticalcooling-mapsmap0Öj Ûkÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®a+OG q°Od›tsadcapb_pclk�è –tsadc-apbêsíinitdefaultsleepûlm l§okay+Bägqos@ffa58000rockchip,rk3399-qossyscon÷ÿ¥€ äuqos@ffa5c000rockchip,rk3399-qossyscon÷ÿ¥À ävqos@ffa60080rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon÷ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon÷ÿ§ äyqos@ffa70080rockchip,rk3399-qossyscon÷ÿ§€ äzqos@ffa74000rockchip,rk3399-qossyscon÷ÿ§@ äwqos@ffa76000rockchip,rk3399-qossyscon÷ÿ§` äxqos@ffa90000rockchip,rk3399-qossyscon÷ÿ© ä{qos@ffa98000rockchip,rk3399-qossyscon÷ÿ©€ änqos@ffaa0000rockchip,rk3399-qossyscon÷ÿª ä|qos@ffaa0080rockchip,rk3399-qossyscon÷ÿª€ ä}qos@ffaa8000rockchip,rk3399-qossyscon÷ÿª€ ä~qos@ffaa8080rockchip,rk3399-qossyscon÷ÿª€€ äqos@ffab0000rockchip,rk3399-qossyscon÷ÿ« äoqos@ffab0080rockchip,rk3399-qossyscon÷ÿ«€ äpqos@ffab8000rockchip,rk3399-qossyscon÷ÿ«€ äqqos@ffac0000rockchip,rk3399-qossyscon÷ÿ¬ ärqos@ffac0080rockchip,rk3399-qossyscon÷ÿ¬€ äsqos@ffac8000rockchip,rk3399-qossyscon÷ÿ¬€ ä€qos@ffac8080rockchip,rk3399-qossyscon÷ÿ¬€€ ä�qos@ffad0000rockchip,rk3399-qossyscon÷ÿ­ ä‚qos@ffad8080rockchip,rk3399-qossyscon÷ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon÷ÿ® ätpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd÷ÿ1power-controller!rockchip,rk3399-power-controller]+äpower-domain@34÷"áÝqn]power-domain@33÷!Üåqop]power-domain@31÷ëêqq]power-domain@32÷  í쟞qrs]power-domain@35÷#Ðqt]power-domain@25÷l]power-domain@23÷ðqu]power-domain@22÷Õfqv]power-domain@27÷ÎLqw]power-domain@28÷îqx]power-domain@8÷~}]power-domain@9÷ €]power-domain@24÷ôqyz]power-domain@15÷]+power-domain@21÷Þçrq{]power-domain@19÷åßq|}]power-domain@20÷æàq~]power-domain@16÷]+power-domain@17÷ÙÙq€�]power-domain@18÷ÛÛq‚]syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd÷ÿ2äio-domains&rockchip,rk3399-pmu-io-voltage-domain§okayxƒspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ5„„›spiclkapb_pclk®<ídefaultû…†‡ˆ+ §disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7„„"›baudclkapb_pclk®f!ídefaultû‰ §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<+„ G ë„ „ ›i2cpclk®9ídefaultûŠ+§okayЀè¨ÿpmic@1brockchip,rk808÷ ‹®óàrtc_clko_socrtc_clko_wifiídefaultûŒ‡Ÿ­L¹LÅLÑLÝLéLõL L L L 'LoƒäGregulatorsDCDC_REG1 4vdd_center C W i ®` �ã` ™qregulator-state-mem ®DCDC_REG2 4vdd_cpu_l C W i ®` �ã` ™qä regulator-state-mem ®DCDC_REG3 4vcc_ddr C Wregulator-state-mem ÇDCDC_REG4 4vcc_1v8 C W iw@ �2Z äMregulator-state-mem Ç ßw@LDO_REG1 4vcc1v8_dvp C W iw@ �3á@regulator-state-mem ®LDO_REG2 4vcc3v0_tp C W iw@ �3á@regulator-state-mem ®LDO_REG3 4vcc1v8_pmupll C W i 5 �&% regulator-state-mem Ç ßw@LDO_REG4 4vcc_sdio C W iw@ �3á@ä/regulator-state-mem Ç ß-ÆÀLDO_REG5 4vcca3v0_codec C W iw@ �3á@regulator-state-mem ®LDO_REG6 4vcc_1v5 C W i 5 �&% regulator-state-mem Ç ßã`LDO_REG7 4vcca1v8_codec C W i 5 �&% ä¡regulator-state-mem ®LDO_REG8 4vcc_3v0 C W iw@ �3á@äƒregulator-state-mem Ç ß-ÆÀSWITCH_REG1 4vcc3v3_s3 C Wäregulator-state-mem ®SWITCH_REG2 4vcc3v3_s0 C Wregulator-state-mem ®regulator@40silergy,syr827÷@ ûídefaultû� 4vdd_cpu_b i ß4 �ã` ™è C W Läregulator-state-mem ®regulator@41silergy,syr828÷A ûídefaultûŽ 4vdd_gpu i ß4 �ã` ™è C W LäÈregulator-state-mem ®i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=+„ G ë„ „ ›i2cpclk®8ídefaultû�+§okayЀèÂÿak09911@casahi-kasei,ak09911÷  # .mpu6500@68invensense,mpu6500÷h ‹®ídefaultû�olsm6ds3@6a st,lsm6ds3÷j ‹®ídefaultû‘ #ocm32181@10capella,cm32181÷ ’®ídefaultû“ #fusb302@22 fcs,fusb302÷" ‹®ídefaultû” 9•connectorusb-c-connector Ehost OUSB-C UB@ gdual r�ú |�Œ ˆsinkports+port@0÷endpoint—–ä£port@1÷endpoint——ä¦port@2÷endpoint—˜ä¥i2c@ff3e0000rockchip,rk3399-i2c÷ÿ>+„ G ë„ „ ›i2cpclk®:ídefaultû™+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB —ídefaultûš„§okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB —ídefaultû›„ §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  —ídefaultûœ„§okayäÖpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 —ídefaultû�„ §disableddfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk ¢žiommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface ©äžvideo-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore ¢Ÿ iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface  ©äŸiommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface © §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclk�jgi –coreaxiahb!efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® ¶ ÁÓ ›apb_pclkäbdma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® ¶ ÁÔ ›apb_pclkäQclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu ›xin24mó Ø+„G(Jñä„clock-controller@ff760000rockchip,rk3399-cru÷ÿv ›xin24mó Øˆ+ÀÀ@ÂÁBÉÂCãÞxíDG#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+äio-domains"rockchip,rk3399-io-voltage-domain§okay åƒ ò¡ ÿ/ ƒmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf  §disabledä¸usb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä1host-port ® 1linestate§okay_¢ä2otg-port 0®ghj1otg-bvalidotg-idlinestate§okay_•ä5portendpoint—£ä–usb2phy@e460rockchip,rk3399-usb2phy÷ä`|›phyclkóàclk_usbphy1_480m§okayä3host-port ® 1linestate§okay_¢ä4otg-port 0®lmo1otg-bvalidotg-idlinestate§okayä7phy@f780rockchip,rk3399-emmc-phy÷÷€$¤›emmcclk '2 §okayä0pcie-phyrockchip,rk3399-pcie-phyŠ›refclk �‡–phy §disabledäphy@ff7c0000rockchip,rk3399-typec-phy÷ÿ|~}›tcpdcoretcpdphy-ref+~Gúð€�•”L–uphyuphy-pipeuphy-tcphy§okaydp-port ä9portendpoint—¥ä˜usb3-port ä6portendpoint—¦ä—phy@ff800000rockchip,rk3399-typec-phy÷ÿ€€›tcpdcoretcpdphy-ref+€Gúð€ ��œM–uphyuphy-pipeuphy-tcphy§okaydp-port ä:usb3-port ä8watchdog@ff848000 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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modephy-handletx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplysystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvdd-supplyvid-supplyvbus-supplydata-rolelabelop-sink-microwattpower-rolesink-pdossource-pdostry-power-role#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltautorepeatdebounce-intervallinux,input-typeenable-active-highgpiopwmspwm-supply