Ð þííÚ8áˆ( RáPleez,p710rockchip,rk3399 +7Leez RK3399 P710aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000�/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe310000Ý/mmc@fe320000â/mmc@fe330000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@W�øôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä’pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúà�ûàûà8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk §disabledinterrupt-controller¢ äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm·Å8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3Ï ídefaultû §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�‰ –stmmaceth §okay+¦;Rinput_jrgmiiídefaultû s ƒ ™'ÃP®(·mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ÀðÑ€ îMœ�›biuciuciu-driveciu-sampleÎ�y–reset§okay+ÙÐúð€ãð!"ídefault û"#$0wifi@1brcm,bcm4329-fmac÷ %® 1host-wakeídefaultû&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AÀðÑ€+Í> ë ÎLš››biuciuciu-driveciu-sampleÎ�z–reset§okayÙSð e%nídefaultû'()*mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® y+N> ëÂNð›clk_xinclk_ahbàemmc_cardclockóy+ ~phy_arasan�§okayÙ ¯"ä–usb@fe380000 generic-ehci÷þ8®ÈÉ,y-~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ,y-~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË.y/~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË.y/~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0�ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®i�öƒ›refbus_earlysuspendÉotgy01~usb2-phyusb3-phy Ñutmi_wideÚò,M§okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ�®n‚÷„›refbus_earlysuspendÉhosty23~usb2-phyusb3-phy Ñutmi_wideÚò,M§okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® +r¡>õá ë ru¡o›core-clkpclkspdifgrfy45 �HJý–spdifdptxapbcoreo §disabledportsport+endpoint@0÷€6ä¦endpoint@1÷€7ä interrupt-controller@fee00000 arm,gic-v3 +ˆ¢P÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-its�Ÿ÷þâäppi-partitionsinterrupt-partition-0ªäinterrupt-partition-1ªäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>³Pe›saradcapb_pclk�Ô –saradc-apb§okayÅ8crypto@ff8b0000rockchip,rk3399-crypto÷ÿ‹@®ÐÒ…›hclk_masterhclk_slavesclk�µ®¯–masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto÷ÿ‹€@®‡ÑÓ†›hclk_masterhclk_slavesclk�º¸¹–masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c÷ÿ+A> ëÂAU ›i2cpclk®;ídefaultû9+§okayÑ,èi2c@ff120000rockchip,rk3399-i2c÷ÿ+B> ëÂBV ›i2cpclk®#ídefaultû:+ §disabledi2c@ff130000rockchip,rk3399-i2c÷ÿ+C> ëÂCW ›i2cpclk®"ídefaultû;+§okayÑÂèi2c@ff140000rockchip,rk3399-i2c÷ÿ+D> ëÂDX ›i2cpclk®&ídefaultû<+ §disabledi2c@ff150000rockchip,rk3399-i2c÷ÿ+E> ëÂEY ›i2cpclk®%ídefaultû=+ §disabledi2c@ff160000rockchip,rk3399-i2c÷ÿ+F> ëÂFZ ›i2cpclk®$ídefaultû>+§okayä­serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿQ`›baudclkapb_pclk®c ídefault û?@A§okaybluetoothbrcm,bcm43438-btB ›ext_clock C +% =% ídefault ûDEFserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿRa›baudclkapb_pclk®b ídefaultûG §disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿSb›baudclkapb_pclk®d ídefaultûH§okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿTc›baudclkapb_pclk®e ídefaultûI §disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿG[›spiclkapb_pclk®DLJ J QtxrxídefaultûKLMN+ §disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿH\›spiclkapb_pclk®5LJ J QtxrxídefaultûOPQR+ §disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿI]›spiclkapb_pclk®4LJJQtxrxídefaultûSTUV+ §disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿJ^›spiclkapb_pclk®CLJJQtxrxídefaultûWXYZ+ §disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ K_›spiclkapb_pclk®„L[[ Qtxrxídefaultû\]^_+ §disabledthermal-zonescpu-thermal[dqè`tripscpu_alert0�p›Ðòpassiveäacpu_alert1�$ø›Ðòpassiveäbcpu_crit�s›Ð òcriticalcooling-mapsmap0¦a«ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1¦bH«ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal[dqè`tripsgpu_alert0�$ø›Ðòpassiveäcgpu_crit�s›Ð òcriticalcooling-mapsmap0¦c «dÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®a+O> q°Od›tsadcapb_pclk�è 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§disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<+} > ëÂ} } ›i2cpclk®9ídefaultûƒ+§okayЀѨèpmic@1brockchip,rk808÷ „®óàxin32krk808-clkout2ídefaultû…Wo}†‰†•†¡†­†¹†Ňц݆ê†÷‡ 8äBregulatorsDCDC_REG1 vdd_center  4 F q° ^™p vqregulator-state-mem ‹DCDC_REG2 vdd_cpu_l  4 F q° ^™p vqä regulator-state-mem ‹DCDC_REG3 vcc_ddr  4regulator-state-mem ¤DCDC_REG4 vcc_1v8  4 Fw@ ^w@ä8regulator-state-mem ¤ ¼w@LDO_REG1 vcc1v8_dvp  4 Fw@ ^w@ä“regulator-state-mem ‹LDO_REG2 vcc1v8_hdmi  4 Fw@ ^w@regulator-state-mem ‹LDO_REG3 vcca_1v8  4 Fw@ ^w@regulator-state-mem ¤ ¼w@LDO_REG4 vccio_sd  4 F-ÆÀ ^-ÆÀä”regulator-state-mem ¤ ¼-ÆÀLDO_REG5 vcca3v0_codec  4 F-ÆÀ ^-ÆÀregulator-state-mem ‹LDO_REG6 vcc_1v5  4 Fã` ^ã`regulator-state-mem ¤ ¼ã`LDO_REG7 vcc0v9_hdmi  4 F »  ^ » regulator-state-mem ‹LDO_REG8 vcc_3v0  4 F-ÆÀ ^-ÆÀä|regulator-state-mem ¤ ¼-ÆÀregulator@40silergy,syr827÷@ Øídefaultûˆ vdd_cpu_b F ß4 ^ã` vè  4 õ†äregulator-state-mem ‹regulator@41silergy,syr828÷A Øídefaultû‰ vdd_gpu F ß4 ^ã` vè  4 õ†ä¹regulator-state-mem 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–axiahbdclk§okayport+äendpoint@0÷€œä²endpoint@1÷€�ä·endpoint@2÷€žä°endpoint@3÷€Ÿä´endpoint@4÷€ ä7iommu@ff8f3f00rockchip,iommu÷ÿ�?®wÛÛ ›aclkiface §okayä›vop@ff900000rockchip,rk3399-vop-big ÷ÿ� ÿ� ®v+ÙÙ>ׄõáÙ´Ù›aclk_vopdclk_vophclk_vop ¡� –axiahbdclk§okayport+äendpoint@0÷€¢ä¶endpoint@1÷€£ä±endpoint@2÷€¤ä¯endpoint@3÷€¥ä³endpoint@4÷€¦ä6iommu@ff903f00rockchip,iommu÷ÿ�?®vÙÙ ›aclkiface §okayä¡isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk §y¨~dphy §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface  Ùä§isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk ©yª~dphy §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface  Ùä©hdmi-soundsimple-audio-card ôi2s  'hdmi-sound§okaysimple-audio-card,cpu >«simple-audio-card,codec >¬hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ” ®(tqpo›iahbisfrcecgrfrefo§okay H­ídefaultû®ä¬ports+port@0÷+endpoint@0÷€¯ä¤endpoint@1÷€°äžport@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf�û–apb §disabledports+port@0÷+endpoint@0÷€±ä£endpoint@1÷€²äœport@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf�ü–apb … §disabledäªports+port@0÷+endpoint@0÷€³ä¥endpoint@1÷€´äŸport@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrfídefaultûµ�–dp §disabledports+port@0÷+endpoint@0÷€¶ä¢endpoint@1÷€·ä�port@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P#§okayŸ T¹ädpinctrlrockchip,rk3399-pinctrl+ˆgpio@ff720000rockchip,gpio-bank÷ÿr}® ` p¢ ä%gpio@ff730000rockchip,gpio-bank÷ÿs}® ` p¢ ä„gpio@ff780000rockchip,gpio-bank÷ÿxP® ` p¢ äCgpio@ff788000rockchip,gpio-bank÷ÿx€Q® ` p¢ ä gpio@ff790000rockchip,gpio-bank÷ÿyR® ` p¢ pcfg-pull-up |ä½pcfg-pull-down ‰ä¾pcfg-pull-none ˜äºpcfg-pull-none-12ma ˜ ¥ ä¼pcfg-pull-none-13ma ˜ ¥ ä»pcfg-pull-none-18ma ˜ ¥pcfg-pull-none-20ma ˜ ¥pcfg-pull-up-2ma | ¥pcfg-pull-up-8ma | ¥pcfg-pull-up-18ma | ¥pcfg-pull-up-20ma | ¥pcfg-pull-down-4ma ‰ ¥pcfg-pull-down-8ma ‰ ¥pcfg-pull-down-12ma ‰ ¥ pcfg-pull-down-18ma ‰ ¥pcfg-pull-down-20ma ‰ ¥pcfg-output-high ´pcfg-output-low Àpcfg-input-enable Ëpcfg-input-pull-up Ë |pcfg-input-pull-down Ë ‰clockclk-32k غcifcif-clkin Ø ºcif-clkouta Ø ºedpedp-hpd غäµgmacrgmii-pinsð Ø»º º » º ºººº»»ºº»»ärmii-pins  Ø º » º º ºººº»»i2c0i2c0-xfer غºäƒi2c1i2c1-xfer غºä9i2c2i2c2-xfer ؼ¼ä:i2c3i2c3-xfer غºä;i2c4i2c4-xfer Ø º ºäŠi2c5i2c5-xfer Ø º ºä<i2c6i2c6-xfer Ø º ºä=i2c7i2c7-xfer غºä>i2c8i2c8-xfer غºä‹i2s0i2s0-2ch-bus` غºººººi2s0-2ch-bus-bclk-off` غºººººi2s0-8ch-bus� غººººººººä˜i2s0-8ch-bus-bclk-off� غººººººººä™i2s1i2s1-2ch-busP غººººäši2s1-2ch-bus-bclk-offP غººººsdio0sdio0-bus1 ؽsdio0-bus4@ ؽ½½½ä"sdio0-cmd ؽä#sdio0-clk غä$sdio0-cd ؽsdio0-pwr ؽsdio0-bkpwr ؽsdio0-wp ؽsdio0-int ؽsdmmcsdmmc-bus1 ؽsdmmc-bus4@ ؽ ½ ½ ½ä*sdmmc-clk Ø ºä'sdmmc-cmd Ø ½ä)sdmmc-cd ؽä(sdmmc-wp ؽsuspendap-pwroff غddrio-pwroff غspdifspdif-bus غä—spdif-bus-1 غspi0spi0-clk ؽäKspi0-cs0 ؽäNspi0-cs1 ؽspi0-tx ؽäLspi0-rx ؽäMspi1spi1-clk Ø ½äOspi1-cs0 Ø ½äRspi1-rx ؽäQspi1-tx ؽäPspi2spi2-clk Ø ½äSspi2-cs0 Ø ½äVspi2-rx Ø ½äUspi2-tx Ø ½äTspi3spi3-clk ؽä~spi3-cs0 ؽä�spi3-rx ؽä€spi3-tx ؽäspi4spi4-clk ؽäWspi4-cs0 ؽäZspi4-rx ؽäYspi4-tx ؽäXspi5spi5-clk ؽä\spi5-cs0 ؽä_spi5-rx ؽä^spi5-tx ؽä]testclktest-clkout0 غtest-clkout1 غtest-clkout2 غtsadcotp-pin غäeotp-out غäfuart0uart0-xfer ؽºä?uart0-cts غä@uart0-rts غäAuart1uart1-xfer Ø ½ ºäGuart2auart2a-xfer ؽ ºuart2buart2b-xfer ؽºuart2cuart2c-xfer ؽºäHuart3uart3-xfer ؽºäIuart3-cts غuart3-rts غuart4uart4-xfer ؽºä‚uarthdcpuarthdcp-xfer ؽºpwm0pwm0-pin غäŒpwm0-pin-pull-down ؾvop0-pwm-pin غvop1-pwm-pin غpwm1pwm1-pin غä�pwm1-pin-pull-down ؾpwm2pwm2-pin غäŽpwm2-pin-pull-down ؾpwm3apwm3a-pin غä�pwm3bpwm3b-pin غhdmihdmi-i2c-xfer غºhdmi-cec غä®pciepci-clkreqn-cpm غpci-clkreqnb-cpm غäbtbt-reg-on-h Ø ºäFbt-host-wake-l غäDbt-wake-l غäEpmicpmic-int-l ؽä…vsel1-pin ؾäˆvsel2-pin ؾä‰usb2vcc5v0-host3-en غäÀwifiwifi-reg-on-h Ø ºä¿wifi-host-wake-l غä&opp-table-0operating-points-v2 æä opp00 ñQ– ø –¨ –¨Ð œ@opp01 ñ#ÃF ø –¨ –¨Ðopp02 ñ0£, ø øP øPÐopp03 ñ<Ü øHHÐopp04 ñG†Œ øB@B@Ðopp05 ñTfr ø*ˆ*ˆÐopp-table-1operating-points-v2 æäopp00 ñQ– ø –¨ –¨Ð œ@opp01 ñ#ÃF ø –¨ –¨Ðopp02 ñ0£, ø –¨ –¨Ðopp03 ñ<Ü ø Yø YøÐopp04 ñG†Œ ø~ð~ðÐopp05 ñTfr ø£è£èÐopp06 ñ_Ø" øÈàÈàÐopp07 ñkIÒ øO€O€Ðopp-table-2operating-points-v2ä¸opp00 ñ ë ø –¨ –¨Œ0opp01 ñ³Ü@ ø –¨ –¨Œ0opp02 ñׄ ø –¨ –¨Œ0opp03 ñÍe ø Yø YøŒ0opp04 ñ#ÃF øHHŒ0opp05 ñ/¯ øÈàÈàŒ0chosen serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóäsdio-pwrseqmmc-pwrseq-simpleB ›ext_clockídefaultû¿ #% ä!regulator-dc5v-adpregulator-fixed dc5v_adapter  4 FLK@ ^LK@äÁregulator-vcc3v3-lanregulator-fixed vcc3v3_lan  4 F2Z  ^2Z  õ‡äregulator-vcc3v3-sysregulator-fixed vcc3v3_sys  4 F2Z  ^2Z  õ†ä‡regulator-vcc5v0-hostregulator-fixed vcc5v0_host 4  FSì` ^Sì` õ†ä•regulator-vcc5v0-host3regulator-fixed vcc5v0_host3 / ~CídefaultûÀ  õ†regulator-vcc5v0-sysregulator-fixed vcc5v0_sys  4 FLK@ ^LK@ õÁä†regulator-vdd-logpwm-regulator BÂa¨ G† vdd_log  4 F 5 ^\À compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplysystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathreset-gpiosenable-active-highpwmspwm-supply