Ð þíôˆ8çÌ( ¼ç”vamrs,ficusrockchip,rk3399 +796boards RK3399 Ficusaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000�/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/mmc@fe310000Ó/mmc@fe320000Ø/mmc@fe330000Ý/ethernet@fe300000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@W�øôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä”pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúà�ûàûà8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk§okay¢¬defaultºÄÔä ôinterrupt-controllerý äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm¢8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 ¬defaultº §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac> �‰ –stmmacethL!Y§okayd¦t"‹input˜#£rgmii¬defaultº$ ¬%¼ Ò'ÃPç(ðmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ùðÑ€ îMœ�›biuciuciu-driveciu-sample> �y–reset§okayÐúð€):P&[¬default º'()i+wifi@1brcm,bcm4329-fmac÷ *® 1host-wake¬defaultº+mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AùõádÍw ë ÎLš››biuciuciu-driveciu-sample> �z–reset§okayŒ)Ðõá ž*§i²,¿ ¬defaultº-./0mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® Ñ!dNw ëÂNð›clk_xinclk_ahbàemmc_cardclockóy1 ~phy_arasan> ç§okayø[ä˜usb@fe380000 generic-ehci÷þ8®ÈÉ2y3~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ2y3~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË4y5~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË4y5~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0�ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®i�öƒ›refbus_earlysuspend!hosty67~usb2-phyusb3-phy )utmi_wide2Jk„¥> §okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ�®n‚÷„›refbus_earlysuspend!hosty89~usb2-phyusb3-phy )utmi_wide2Jk„¥> §okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® dr¡wõá ë ru¡o›core-clkpclkspdifgrfy:;>  �HJý–spdifdptxapbcoreL!Ç §disabledportsport+endpoint@0÷Ø<ä¨endpoint@1÷Ø=ä¢interrupt-controller@fee00000 arm,gic-v3 +ˆýP÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-itsè÷÷þâäppi-partitionsinterrupt-partition-0äinterrupt-partition-1äsaradc@ff100000rockchip,rk3399-saradc÷ÿ®> Pe›saradcapb_pclk�Ô –saradc-apb §disabledcrypto@ff8b0000rockchip,rk3399-crypto÷ÿ‹@®ÐÒ…›hclk_masterhclk_slavesclk�µ®¯–masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto÷ÿ‹€@®‡ÑÓ†›hclk_masterhclk_slavesclk�º¸¹–masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c÷ÿdAw ëÂAU ›i2cpclk®;¬defaultº>+§okayi2c@ff120000rockchip,rk3399-i2c÷ÿdBw ëÂBV ›i2cpclk®#¬defaultº?+§okayi2c@ff130000rockchip,rk3399-i2c÷ÿdCw ëÂCW ›i2cpclk®"¬defaultº@+§okayä±i2c@ff140000rockchip,rk3399-i2c÷ÿdDw ëÂDX ›i2cpclk®&¬defaultºA+ §disabledi2c@ff150000rockchip,rk3399-i2c÷ÿdEw ëÂEY ›i2cpclk®%¬defaultºB+ §disabledi2c@ff160000rockchip,rk3399-i2c÷ÿdFw ëÂFZ ›i2cpclk®$¬defaultºC+ §disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿQ`›baudclkapb_pclk®c'¬default ºDEF§okaybluetoothbrcm,bcm43438-btG›txco 4H H* Z* ¬default ºIJKserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿRa›baudclkapb_pclk®b'¬defaultºL §disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿSb›baudclkapb_pclk®d'¬defaultºM§okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿTc›baudclkapb_pclk®e'¬defaultºN §disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿG[›spiclkapb_pclk®DiO O ntxrx¬defaultºPQRS+ §disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿH\›spiclkapb_pclk®5iO O ntxrx¬defaultºTUVW+§okayxspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿI]›spiclkapb_pclk®4iOOntxrx¬defaultºXYZ[+ §disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿJ^›spiclkapb_pclk®CiOOntxrx¬defaultº\]^_+ §disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ K_›spiclkapb_pclk®„i`` ntxrx¬defaultºabcd> + §disabledthermal-zonescpu-thermal�d—è¥etripscpu_alert0µpÁÐòpassiveäfcpu_alert1µ$øÁÐòpassiveägcpu_critµsÁÐ òcriticalcooling-mapsmap0ÌfÑÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1ÌgHÑÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal�d—è¥etripsgpu_alert0µ$øÁÐòpassiveähgpu_critµsÁÐ òcriticalcooling-mapsmap0Ìh Ñiÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®adOw q°Od›tsadcapb_pclk�è –tsadc-apbL!à­°¬initdefaultsleepºj÷kj §okay!8äeqos@ffa58000rockchip,rk3399-qossyscon÷ÿ¥€ äsqos@ffa5c000rockchip,rk3399-qossyscon÷ÿ¥À ätqos@ffa60080rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon÷ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon÷ÿ§ äwqos@ffa70080rockchip,rk3399-qossyscon÷ÿ§€ äxqos@ffa74000rockchip,rk3399-qossyscon÷ÿ§@ äuqos@ffa76000rockchip,rk3399-qossyscon÷ÿ§` ävqos@ffa90000rockchip,rk3399-qossyscon÷ÿ© äyqos@ffa98000rockchip,rk3399-qossyscon÷ÿ©€ älqos@ffaa0000rockchip,rk3399-qossyscon÷ÿª äzqos@ffaa0080rockchip,rk3399-qossyscon÷ÿª€ ä{qos@ffaa8000rockchip,rk3399-qossyscon÷ÿª€ ä|qos@ffaa8080rockchip,rk3399-qossyscon÷ÿª€€ ä}qos@ffab0000rockchip,rk3399-qossyscon÷ÿ« ämqos@ffab0080rockchip,rk3399-qossyscon÷ÿ«€ änqos@ffab8000rockchip,rk3399-qossyscon÷ÿ«€ äoqos@ffac0000rockchip,rk3399-qossyscon÷ÿ¬ äpqos@ffac0080rockchip,rk3399-qossyscon÷ÿ¬€ äqqos@ffac8000rockchip,rk3399-qossyscon÷ÿ¬€ ä~qos@ffac8080rockchip,rk3399-qossyscon÷ÿ¬€€ äqos@ffad0000rockchip,rk3399-qossyscon÷ÿ­ ä€qos@ffad8080rockchip,rk3399-qossyscon÷ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon÷ÿ® ärpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd÷ÿ1power-controller!rockchip,rk3399-power-controllerS+ä power-domain@34÷"áÝglSpower-domain@33÷!ÜågmnSpower-domain@31÷ëêgoSpower-domain@32÷  í쟞gpqSpower-domain@35÷#ÐgrSpower-domain@25÷lSpower-domain@23÷ðgsSpower-domain@22÷ÕfgtSpower-domain@27÷ÎLguSpower-domain@28÷îgvSpower-domain@8÷~}Spower-domain@9÷ €Spower-domain@24÷ôgwxSpower-domain@15÷S+power-domain@21÷ÞçrgySpower-domain@19÷åßgz{Spower-domain@20÷æàg|}Spower-domain@16÷S+power-domain@17÷ÙÙg~Spower-domain@18÷ÛÛg€Ssyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd÷ÿ2äio-domains&rockchip,rk3399-pmu-io-voltage-domain§okayn�spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ5‚‚›spiclkapb_pclk®<¬defaultºƒ„…†+ §disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7‚‚"›baudclkapb_pclk®f'¬defaultº‡ §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<d‚ w ë‚ ‚ ›i2cpclk®9¬defaultºˆ+§okayЀ}¨”regulator@40silergy,syr827÷@¬ Évdd_cpu_bØ ß4ðã` è  1 C‰§okayäregulator-state-mem Nregulator@41silergy,syr828÷A¬Évdd_gpuØ ß4ðã` è  1 C‰ä½regulator-state-mem Npmic@1brockchip,rk808÷ Š®¬defaultº‹ g óàxin32krk808-clkout2 �‰ ™‰ ¥‰ ±‰ ½‰ ɉ Õ# á‰ í‰ ú‰ # �äGregulatorsDCDC_REG1 Évdd_centerØ q°ð™p  1regulator-state-mem NDCDC_REG2 Évdd_cpu_lØ q°ð™p  1ä regulator-state-mem NDCDC_REG3Évcc_ddr  1regulator-state-mem !DCDC_REG4Évcc_1v8Øw@ðw@  1ä�regulator-state-mem ! 9w@LDO_REG1 Évcc1v8_dvpØw@ðw@  1regulator-state-mem ! 9w@LDO_REG2 Évcca1v8_hdmiØw@ðw@  1ä°regulator-state-mem ! 9w@LDO_REG3 Évcca_1v8Øw@ðw@  1äregulator-state-mem ! 9w@LDO_REG4Évcc_sdØw@ð2Z   1ä,regulator-state-mem ! 92Z LDO_REG5 Évcc3v0_sdØ-ÆÀð-ÆÀ  1regulator-state-mem ! 9-ÆÀLDO_REG6Évcc_1v5Øã`ðã`  1regulator-state-mem ! 9ã`LDO_REG7 Évcca0v9_hdmiØ » ð »   1ä¯regulator-state-mem ! 9 » LDO_REG8Évcc_3v0Ø-ÆÀð-ÆÀ  1ä–regulator-state-mem ! 9-ÆÀSWITCH_REG1 Évcc3v3_s3  1regulator-state-mem !SWITCH_REG2 Évcc3v3_s0  1regulator-state-mem !i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=d‚ w ë‚ ‚ ›i2cpclk®8¬defaultºŒ+§okayi2c@ff3e0000rockchip,rk3399-i2c÷ÿ>d‚ w ë‚ ‚ ›i2cpclk®:¬defaultº�+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB U¬defaultºŽ‚ §disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB U¬defaultº�‚ §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  U¬defaultº�‚§okaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 U¬defaultº‘‚§okaydfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk `’> iommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface g> ä’video-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore `“> iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface>  gä“iommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface g §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclk�jgi –coreaxiahb> !efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® t Ó ›apb_pclkä`dma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® t Ô ›apb_pclkäOclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu”›xin24mLó –d‚w(Jñä‚clock-controller@ff760000rockchip,rk3399-cru÷ÿv”›xin24mL!ó –ˆdÀÀ@ÂÁBÉÂCãÞxíDw#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+ä!io-domains"rockchip,rk3399-io-voltage-domain§okay £• °• ½, Ê–mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf>  Ú §disabledäªusb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä2host-port Ú® 1linestate§okay˜—ä3otg-port Ú0®ghj1otg-bvalidotg-idlinestate§okayä6usb2phy@e460rockchip,rk3399-usb2phy÷ä`|›phyclkóàclk_usbphy1_480m§okayä4host-port Ú® 1linestate§okay˜—ä5otg-port Ú0®lmo1otg-bvalidotg-idlinestate§okayä8phy@f780rockchip,rk3399-emmc-phy÷÷€$˜›emmcclk å2 Ú§okayä1pcie-phyrockchip,rk3399-pcie-phyŠ›refclk Ú�‡–phy§okayäphy@ff7c0000rockchip,rk3399-typec-phy÷ÿ|~}›tcpdcoretcpdphy-refd~wúð€> �•”L–uphyuphy-pipeuphy-tcphyL!§okaydp-port Úä:usb3-port Úä7phy@ff800000rockchip,rk3399-typec-phy÷ÿ€€›tcpdcoretcpdphy-refd€wúð€> ��œM–uphyuphy-pipeuphy-tcphyL!§okaydp-port Úä;usb3-port Úä9watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt÷ÿ„€|®xrktimer@ff850000rockchip,rk3399-timer÷ÿ…®QhZ ›pclktimerspdif@ff870000rockchip,rk3399-spdif÷ÿ‡®Bi`ntx ›mclkhclkU׬defaultº™> Ç §disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿˆL!®'i``ntxrx›i2s_clki2s_hclkVÔ¬bclk_onbclk_offºš÷›> Ç §disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿ‰®(i``ntxrx›i2s_clki2s_hclkWÕ¬defaultºœ> Ç §disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)i``ntxrx›i2s_clki2s_hclkXÖ> ǧokayä­vop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ� ÿ� ®wdÛÛwׄõáÛµÛ›aclk_vopdclk_vophclk_vop `�> � –axiahbdclk§okayport+äendpoint@0÷Øžä¶endpoint@1÷ØŸä»endpoint@2÷Ø ä´endpoint@3÷Ø¡ä¸endpoint@4÷Ø¢ä=iommu@ff8f3f00rockchip,iommu÷ÿ�?®wÛÛ ›aclkiface>  g§okayä�vop@ff900000rockchip,rk3399-vop-big ÷ÿ� ÿ� ®vdÙÙwׄõáÙ´Ù›aclk_vopdclk_vophclk_vop `£> � –axiahbdclk§okayport+äendpoint@0÷ؤäºendpoint@1÷Ø¥äµendpoint@2÷ئä³endpoint@3÷اä·endpoint@4÷بä<iommu@ff903f00rockchip,iommu÷ÿ�?®vÙÙ ›aclkiface>  g§okayä£isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk `©yª~dphy>  §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface g>  ùä©isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk `«y¬~dphy>  §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface g>  ùä«hdmi-soundsimple-audio-card i2s - Ghdmi-sound§okaysimple-audio-card,cpu ^­simple-audio-card,codec ^®hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ”'®(tqpo›iahbisfrcecgrfref> L!ǧokay h¯ x° ˆ±¬defaultº²ä®ports+port@0÷+endpoint@0÷سä¦endpoint@1÷Ø´ä port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf> �û–apbL! §disabledports+port@0÷+endpoint@0÷صä¥endpoint@1÷ضäžport@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf> �ü–apbL! Ú §disabledä¬ports+port@0÷+endpoint@0÷Ø·ä§endpoint@1÷ظä¡port@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrf¬defaultº¹> �–dpL! §disabledports+port@0÷+endpoint@0÷غä¤endpoint@1÷Ø»äŸport@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P> #§okayż ”½äipinctrlrockchip,rk3399-pinctrlL!+ˆgpio@ff720000rockchip,gpio-bank÷ÿr‚®   °ý ä*gpio@ff730000rockchip,gpio-bank÷ÿs‚®   °ý äŠgpio@ff780000rockchip,gpio-bank÷ÿxP®   °ý äHgpio@ff788000rockchip,gpio-bank÷ÿx€Q®   °ý ä%gpio@ff790000rockchip,gpio-bank÷ÿyR®   °ý äpcfg-pull-up ¼äÂpcfg-pull-down ÉäÇpcfg-pull-none Øä¾pcfg-pull-none-12ma Ø å äÁpcfg-pull-none-13ma Ø å ä¿pcfg-pull-none-18ma Ø åäÆpcfg-pull-none-20ma Ø åäÄpcfg-pull-up-2ma ¼ åpcfg-pull-up-8ma ¼ åäÅpcfg-pull-up-18ma ¼ åpcfg-pull-up-20ma ¼ åäÃpcfg-pull-down-4ma É åpcfg-pull-down-8ma É åpcfg-pull-down-12ma É å pcfg-pull-down-18ma É åpcfg-pull-down-20ma É åpcfg-output-high ôpcfg-output-low äÀpcfg-input-enable pcfg-input-pull-up  ¼pcfg-input-pull-down  Éclockclk-32k ¾cifcif-clkin  ¾cif-clkouta  ¾edpedp-hpd ¾ä¹gmacrgmii-pinsð ¿¾ ¾ ¿ ¾ ¾¾¾¾¿¿¾¾¿¿ä$rmii-pins   ¾ ¿ ¾ ¾ ¾¾¾¾¿¿rgmii-sleep-pins Ài2c0i2c0-xfer ¾¾äˆi2c1i2c1-xfer ¾¾ä>i2c2i2c2-xfer ÁÁä?i2c3i2c3-xfer ¾¾ä@i2c4i2c4-xfer  ¾ ¾äŒi2c5i2c5-xfer  ¾ ¾äAi2c6i2c6-xfer  ¾ ¾äBi2c7i2c7-xfer ¾¾äCi2c8i2c8-xfer ¾¾ä�i2s0i2s0-2ch-bus` ¾¾¾¾¾¾i2s0-2ch-bus-bclk-off` ¾¾¾¾¾¾i2s0-8ch-bus� ¾¾¾¾¾¾¾¾¾äši2s0-8ch-bus-bclk-off� ¾¾¾¾¾¾¾¾¾ä›i2s1i2s1-2ch-busP ¾¾¾¾¾äœi2s1-2ch-bus-bclk-offP ¾¾¾¾¾sdio0sdio0-bus1 Âsdio0-bus4@ ÃÃÃÃä'sdio0-cmd Ãä(sdio0-clk Ää)sdio0-cd Âsdio0-pwr Âsdio0-bkpwr Âsdio0-wp Âsdio0-int Âsdmmcsdmmc-bus1 Åsdmmc-bus4@ Å Å Å Åä0sdmmc-clk  Æä-sdmmc-cmd  Åä.sdmmc-cd Âä/sdmmc-wp Âsuspendap-pwroff ¾ddrio-pwroff ¾spdifspdif-bus ¾ä™spdif-bus-1 ¾spi0spi0-clk ÂäPspi0-cs0 ÂäSspi0-cs1 Âspi0-tx ÂäQspi0-rx ÂäRspi1spi1-clk  ÂäTspi1-cs0  ÂäWspi1-rx ÂäVspi1-tx ÂäUspi2spi2-clk  ÂäXspi2-cs0  Âä[spi2-rx  ÂäZspi2-tx  ÂäYspi3spi3-clk Âäƒspi3-cs0 Âä†spi3-rx Âä…spi3-tx Âä„spi4spi4-clk Âä\spi4-cs0 Âä_spi4-rx Âä^spi4-tx Âä]spi5spi5-clk Âäaspi5-cs0 Âädspi5-rx Âäcspi5-tx Âäbtestclktest-clkout0 ¾test-clkout1 ¾test-clkout2 ¾tsadcotp-pin ¾äjotp-out ¾äkuart0uart0-xfer ¾äDuart0-cts ¾äEuart0-rts ¾äFuart1uart1-xfer   ¾äLuart2auart2a-xfer  ¾uart2buart2b-xfer ¾uart2cuart2c-xfer ¾äMuart3uart3-xfer ¾äNuart3-cts ¾uart3-rts ¾uart4uart4-xfer ¾ä‡uarthdcpuarthdcp-xfer ¾pwm0pwm0-pin ¾äŽpwm0-pin-pull-down Çvop0-pwm-pin ¾vop1-pwm-pin ¾pwm1pwm1-pin ¾ä�pwm1-pin-pull-down Çpwm2pwm2-pin ¾ä�pwm2-pin-pull-down Çpwm3apwm3a-pin ¾ä‘pwm3bpwm3b-pin ¾hdmihdmi-i2c-xfer ¾¾hdmi-cec ¾ä²pciepci-clkreqn-cpm ¾äpci-clkreqnb-cpm ¾äpcie-drv ¾äÊbtbt-enable-h  ¾äKbt-host-wake-l ¾äIbt-wake-l ¾äJpmicpmic-int-l Âä‹vsel1-pin Çvsel2-pin Çsdio-pwrseqwifi-enable-h  ¾äÈwifiwifi-host-wake-l ¾ä+usb2host-vbus-drv ¾äËledsuser-led1-pin ¾äÌuser-led2-pin ¾äÍuser-led3-pin ¾äÎuser-led4-pin ¾äÏwlan-led-pin ¾äÐbt-led-pin ¾äÑopp-table-0operating-points-v2 &ä opp00 1Q– 8 –¨ –¨Ð Fœ@opp01 1#ÃF 8 –¨ –¨Ðopp02 10£, 8 øP øPÐopp03 1<Ü 8HHÐopp04 1G†Œ 8B@B@Ðopp05 1Tfr 8*ˆ*ˆÐopp-table-1operating-points-v2 &äopp00 1Q– 8 –¨ –¨Ð Fœ@opp01 1#ÃF 8 –¨ –¨Ðopp02 10£, 8 –¨ –¨Ðopp03 1<Ü 8 Yø YøÐopp04 1G†Œ 8~ð~ðÐopp05 1Tfr 8£è£èÐopp06 1_Ø" 8ÈàÈàÐopp07 1kIÒ 8O€O€Ðopp-table-2operating-points-v2ä¼opp00 1 ë 8 –¨ –¨Œ0opp01 1³Ü@ 8 –¨ –¨Œ0opp02 1ׄ 8 –¨ –¨Œ0opp03 1Íe 8 Yø YøŒ0opp04 1#ÃF 8HHŒ0opp05 1/¯ 8ÈàÈàŒ0sdio-pwrseqmmc-pwrseq-simpleG ›ext_clock¬defaultºÈ W* ä&regulator-vcc12v-dcinregulator-fixed Évcc12v_dcinØ·ð·  1äÉregulator-vcc1v8-s0regulator-fixed Évcc1v8_s0Øw@ðw@ ä•regulator-vcc5v0-sysregulator-fixed Évcc5v0_sysØLK@ðLK@  CÉä‰regulator-vcc3v3-sysregulator-fixed Évcc3v3_sysØ2Z ð2Z   C‰ä#regulator-vcc3v3-pcieregulator-fixed c¬defaultºÊ 1 Évcc3v3_pcieØ2Z ð2Z  C# ·Šäregulator-vcc5v0-hostregulator-fixed c¬defaultºË Évcc5v0_hostØLK@ðLK@  C‰ ·ä—regulator-vcc-0v9regulator-fixedÉvcc_0v9 Ø » ð »  C#ächosen vserial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóä"leds gpio-leds¬defaultºÌÍÎÏÐÑled-1 ‚red:user1 ÷ ˆheartbeatled-2 ‚red:user2 ÷ ˆmmc0led-3 ‚red:user3 ÷ ˆmmc1led-4 ‚red:user4 ÷Š ž ˆnoneled-5 ‚red:wlan ÷Š ˆphy0tx ®offled-6 ‚red:bt ÷Š ˆhci0-power ®off compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5mmc0mmc1mmc2ethernet0cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesnum-lanespinctrl-namespinctrl-0vpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyep-gpiosinterrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namescs-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsfcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsreset-gpiosenable-active-highstdout-pathlabellinux,default-triggerpanic-indicatordefault-state