Ð þíz`8sd(üs,,rockchip,rk3368-evb-act8846rockchip,rk3368 +&7Rockchip RK3368 EVB with ACT8846 pmicaliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000ƒ/serial@ff690000‹/serial@ff1b0000“/serial@ff1c0000›/spi@ff110000 /spi@ff120000¥/spi@ff130000ª/ethernet@ff290000´/mmc@ff0f0000cpus+cpu-mapcluster0core0¹core1¹core2¹core3¹cluster1core0¹core1¹core2¹core3¹ cpu@0½cpuarm,cortex-a53ÉÍpsciÛêcpu@1½cpuarm,cortex-a53ÉÍpsciÛêcpu@2½cpuarm,cortex-a53ÉÍpsciÛêcpu@3½cpuarm,cortex-a53ÉÍpsciÛê cpu@100½cpuarm,cortex-a53ÉÍpsciÛêcpu@101½cpuarm,cortex-a53ÉÍpsciÛêcpu@102½cpuarm,cortex-a53ÉÍpsciÛêcpu@103½cpuarm,cortex-a53ÉÍpsciÛêdisplay-subsystemrockchip,display-subsystemò  ødisabledarm-pmuarm,cortex-a53-pmu`ÿpqrstuvw   psci arm,psci-0.2Ôsmctimerarm,armv8-timer0ÿ ÿÿ ÿ ÿoscillator fixed-clockn6-xin24m@ê@mmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshcÉÿ @MðÑ€ [ È D r vbbiuciuciu-driveciu-samplen ÿ y €€reset ødisabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshcÉÿ @MðÑ€ [ É E s wbbiuciuciu-driveciu-samplen ÿ!y �€reset ødisabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshcÉÿ@MðÑ€ [ Ë G u ybbiuciuciu-driveciu-samplen ÿ#y ƒ€resetøokayŒ–¨ ³Ádefault Ï saradc@ff100000rockchip,saradcÉÿ ÿ$Ù[ I [bsaradcapb_pclky W €saradc-apb ødisabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spiÉÿ[ A Rbspiclkapb_pclk ÿ,ÁdefaultÏ+ ødisabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spiÉÿ[ B Sbspiclkapb_pclk ÿ-ÁdefaultÏ+ ødisabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spiÉÿ[ C Tbspiclkapb_pclk ÿ)ÁdefaultÏ+ ødisabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿ ÿ>+bi2c[ NÁdefaultÏ ødisabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿ ÿ?+bi2c[ OÁdefaultÏ ødisabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿ ÿ@+bi2c[ PÁdefaultÏ ødisabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿ ÿA+bi2c[ QÁdefaultÏ ødisabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6[ M Ubbaudclkapb_pclk ÿ7ëõ ødisabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6[ N Vbbaudclkapb_pclk ÿ8ëõ ødisabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6[ P Xbbaudclkapb_pclk ÿ:ëõ ødisabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6[ Q Ybbaudclkapb_pclk ÿ;ëõ ødisableddma-controller@ff250000arm,pl330arm,primecellÉÿ%@ÿ ([ à bapb_pclkthermal-zonescpu-thermal?dUˆc tripscpu_alert0s$øÐÄpassiveê!cpu_alert1s8€ÐÄpassiveê"cpu_critssÐ Äcriticalcooling-mapsmap0Š!0�ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1Š"0�ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal?dUˆc tripsgpu_alert0s8€ÐÄpassiveê#gpu_critsÁ8Ð Äcriticalcooling-mapsmap0Š#0�ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadcÉÿ( ÿ%[ H Zbtsadcapb_pclky Ÿ €tsadc-apbÁinitdefaultsleepÏ$ž%¨$²Èsøokayßöê ethernet@ff290000rockchip,rk3368-gmacÉÿ) ÿmacirq!&8[  f g c € Å ]Mbstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macy B €stmmacethøokay.'9rmiiBoutput O( _ u'B@ÁdefaultÏ)Š0“mdiosnps,dwmac-mdio+usb@ff500000 generic-ehciÉÿP ÿ[ Âøokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2ÉÿX ÿ[ Ábotgœhost¤¶Å€€@@ øokaydma-controller@ff600000arm,pl330arm,primecellÉÿ`@ÿ ([  bapb_pclkêAi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿe[ Lbi2c ÿ<ÁdefaultÏ*+øokay€syr827@40silergy,syr827É@Ôñvdd_cpu øP™p0DV+syr828@41silergy,syr828ÉAÔñvdd_gpu øP™p0V+act8846@5aactive-semi,act8846ÉZøokaya+l+w+‚+�,™+¥-regulatorsREG1ñVCC_DDRO€O€0REG2ñVCC_IO2Z 2Z 0ê,REG3ñVDD_LOG ®`ã`0REG4ñVCC_20„€„€0ê-REG5 ñVCCIO_SDw@2Z 0REG6 ñVDD10_LCDB@B@0REG7 ñVCCA_CODEC2Z 2Z 0REG8ñVCCA_TP2Z 2Z 0REG9 ñVCCIO_PMU2Z 2Z 0REG10ñVDD_10B@B@0REG11ñVCC_18w@w@0REG12 ñVCC18_LCDw@w@0i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿf ÿ=+bi2c[ MÁdefaultÏ. ødisabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmÉÿh±ÁdefaultÏ/[ _øokayêTpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmÉÿh±ÁdefaultÏ0[ _ ødisabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmÉÿh ±[ _ ødisabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmÉÿh0±ÁdefaultÏ1[ _ ødisabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿi[ O Wbbaudclkapb_pclk ÿ9ÁdefaultÏ2ëõøokaymbox@ff6b0000rockchip,rk3368-mailboxÉÿk0ÿ’“”•[ E bpclk_mailbox¼ ødisabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdÉÿspower-controller!rockchip,rk3368-power-controllerÈ+êDpower-domain@12É ð[ Ê Í Ì È Æ Ç ¾ Ô Õ Ö Ù Ñ Û c h g n o r s f d d h i l k j n m$Ü3456789:;Èpower-domain@14É [ Ð Ü o p Ü<=>Èpower-domain@16É[ Á À @Ü?Èsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdÉÿs€êLio-domains&rockchip,rk3368-pmu-io-voltage-domain ødisabledreboot-modesyscon-reboot-modeãêRBÃöRBÃRBà RBÃclock-controller@ff760000rockchip,rk3368-cruÉÿv[@bxin24m!&@ ê syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdÉÿwê&io-domains"rockchip,rk3368-io-voltage-domain ødisabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdtÉÿ€[ p ÿOøokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timerÉÿ�  ÿB[ a U bpclktimerspdif@ff880000rockchip,rk3368-spdifÉÿˆ ÿ6[ S Ð bmclkhclk-A2txÁdefaultÏB< ødisabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2sÉÿ‰ ÿ(bi2s_clki2s_hclk[ T Î-AA2txrx< ødisabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2sÉÿ‰€ ÿ5bi2s_clki2s_hclk[ R Ï-AA2txrxÁdefaultÏC< ødisablediommu@ff900800rockchip,iommuÉÿ� ÿ[ Ê Ô baclkifaceMD [ ødisablediommu@ff914000rockchip,iommu Éÿ‘@ÿ‘P ÿ[ Í Õ baclkiface[MD h ødisabledvop@ff930000rockchip,rk3368-vop Éÿ“üÿ“ ÿƒ Æ Ñ“ׄ ëÂ[ Æ ¾ Ñbaclk_vopdclk_vophclk_vop¨EMD y d e f €axiahbdclk ødisabledport+ê endpoint@0ɯFêIendpoint@1ɯGêKiommu@ff930300rockchip,iommuÉÿ“ ÿ[ Æ Ñ baclkifaceMD [ ødisabledêEdsi@ff960000*rockchip,rk3368-mipi-dsisnps,dw-mipi-dsiÉÿ–@ ÿ[ dbpclk¿HÄdphyMD y s€apb!& ødisabledports+port@0Éendpoint¯IêFport@1Éphy@ff968000rockchip,rk3368-dsi-dphyÉÿ–€@[ � s brefpclkÎy r€apb ødisabledêHhdmi@ff980000rockchip,rk3368-dw-hdmiÉÿ˜ ÿg[ h m nbiahbisfrcecÁdefaultÏJMD õ!& ødisabledports+port@0Éendpoint¯KêGport@1Éiommu@ff9a0440rockchip,iommu Éÿš@@ÿš€@ ÿ [ Ð Ü baclkiface[ ødisablediommu@ff9a0800rockchip,iommuÉÿšÿ  [ Ð Ü baclkiface[ ødisabledqos@ffad0000rockchip,rk3368-qossysconÉÿ­ ê3qos@ffad0080rockchip,rk3368-qossysconÉÿ­€ ê4qos@ffad0100rockchip,rk3368-qossysconÉÿ­ ê5qos@ffad0180rockchip,rk3368-qossysconÉÿ­€ ê6qos@ffad0200rockchip,rk3368-qossysconÉÿ­ ê7qos@ffad0280rockchip,rk3368-qossysconÉÿ­€ ê8qos@ffad0300rockchip,rk3368-qossysconÉÿ­ ê9qos@ffad0380rockchip,rk3368-qossysconÉÿ­€ ê:qos@ffad0400rockchip,rk3368-qossysconÉÿ­ ê;qos@ffae0000rockchip,rk3368-qossysconÉÿ® ê<qos@ffae0100rockchip,rk3368-qossysconÉÿ® ê=qos@ffae0180rockchip,rk3368-qossysconÉÿ®€ ê>qos@ffaf0000rockchip,rk3368-qossysconÉÿ¯ ê?efuse@ffb00000rockchip,rk3368-efuseÉÿ° +[ q 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Osdmmc-bus1gOsdmmc-bus4@gOOOOspdifspdif-txgPêBspi0spi0-clkgOêspi0-cs0gOêspi0-cs1gOspi0-txgOêspi0-rxgOêspi1spi1-clkgOêspi1-cs0gOêspi1-cs1gOspi1-rxgOêspi1-txgOêspi2spi2-clkg Oêspi2-cs0g Oêspi2-rxg Oêspi2-txg Oêtsadcotp-pingPê$otp-outgPê%uart0uart0-xfer gOPuart0-ctsgPuart0-rtsgPuart1uart1-xfer gOPuart1-ctsgPuart1-rtsgPuart2uart2-xfer gOPê2uart3uart3-xfer gOPuart3-ctsgPuart3-rtsgPuart4uart4-xfer gOPuart4-ctsgPuart4-rtsgPpcfg-pull-none-drv-8maKXêMpcfg-pull-up-drv-8ma/XêNbacklightbl-engPêSkeyspwr-keygOêWpmicpmic-intgOsdiowifi-reg-ongPbt-rstgPusbhost-vbus-drvgPêXchosenuserial2:115200n8memory@0½memoryÉ@backlightpwm-backlight�  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ“€ ¬RÁdefaultÏS¹TB@emmc-pwrseqmmc-pwrseq-emmcÏUÁdefault ¾Vê gpio-keys gpio-keysÁdefaultÏWkey-powerÊ ³R ØGPIO PowerÞtregulator-vcc-hostregulator-fixedé ZRÁdefaultÏX ñvcc_host0DV+regulator-vcc-lanregulator-fixedñvcc_lan2Z 2Z 0DV,ê'regulator-vcc-sysregulator-fixedñvcc_sysLK@LK@0Dê+ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0cpudevice_typeregenable-method#cooling-cellsphandleportsstatusinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesbus-widthcap-mmc-highspeedmmc-pwrseqnon-removablepinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetassigned-clocksassigned-clock-ratesiommusremote-endpointphysphy-names#phy-cellsinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiospwmsreset-gpioswakeup-sourcelabellinux,codeenable-active-high