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�disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-450¦ÿ0T¡ZW]XY[\"»gpgpmmupppp0ppmmu0pp1ppmmu1ª‡‡ õbuscoreø;Ë<f±€8opp-table-gpuoperating-points-v2€;opp-200000000 ëÂg8opp-300000000á£g8opp-400000000ׄg8opp-500000000ÍeŒ0 �disablediommu@ff330200rockchip,iommu¦ÿ3 ¡`ª“Ý õaclkifaceÙ �disablediommu@ff340800rockchip,iommu¦ÿ4@ ¡bª�F õaclkifaceÙ �disabledvideo-codec@ff350000rockchip,rk3328-vpu¦ÿ5 ¡ »vdpuª�F õaclkhclkæ=Ë<iommu@ff350800rockchip,iommu¦ÿ5@ ¡ ª�F õaclkifaceÙË<€=video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec¦ÿ6€ ¡ ª‹BABõaxiahbcabaccoreï‹AB ÿׄׄá£æ>Ë<iommu@ff360480rockchip,iommu ¦ÿ6€@ÿ6À@ ¡Jª‹B õaclkifaceÙË<€>vop@ff370000rockchip,rk3328-vop¦ÿ7>ü ¡ ª‘x;õaclk_vopdclk_vophclk_vop…†‡ %axiahbdclkæ? �disabledport€ endpointí@€Fiommu@ff373f00rockchip,iommu¦ÿ7? ¡ ª‘; õaclkifaceÙ �disabled€?hdmi@ff3c0000rockchip,rk3328-dw-hdmi¦ÿ< ¡#ªçFõiahbisfrcecýAhdmi!default /BCD E �disabled€ports+port@0¦endpointíF€@port@1¦codec@ff410000rockchip,rk3328-codec¦ÿAªë* õpclkmclk E �disabled€phy@ff430000rockchip,rk3328-hdmi-phy¦ÿC ¡SªäGyõsysclkrefoclkrefpclk âhdmi_phyÅH %cpu-version6 �disabled€Aclock-controller@ff440000rockchip,rk3328-cru¦ÿDªGõxin24m EÅAøïx=&'(ˆ‰Ž…ƒŠŒ�ABDC"\5ˆH؉4æ$NzGGG|ÿ©€n6n6n6äáÀäáÀá£õáׄõáúð€õáõáõáúð€úð€úð€úð€n6#ÃFLG†ŒðÑ€xhÀxhÀðÑ€xhÀxhÀ€€syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfd¦ÿE+usb2phy@100rockchip,rk3328-usb2phy¦ªGõphyclk âusb480m_phyÅï{NI�okay€Iotg-port6$¡;<=»otg-bvalidotg-idlinestate�okay€Vhost-port6 ¡> »linestate�okay€Wmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿP@ ¡  ª=!JNõbiuciuciu-driveciu-sampleepðÑ€m%reset�okay~ˆ™/JKLM!default¤±¾ËÙNåmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿQ@ ¡  ª>"KOõbiuciuciu-driveciu-sampleepðÑ€n%reset �disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿR@ ¡ ª?#LPõbiuciuciu-driveciu-sampleepðÑ€o%reset �disabledethernet@ff540000rockchip,rk3328-gmac¦ÿT ¡»macirq8ªdWXZY–ßMõstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc %stmmaceth Eò�okayïdfNOOinput&rgmii//P!default:QE"Nmdiosnps,dwmac-mdio+ethernet-phy@3ethernet-phy-ieee802.3-c22¦WsY@v‘/R!default¯'¿ÃP Ñ)€Qethernet@ff550000rockchip,rk3328-gmac¦ÿU E ¡»macirq8ªTSSU•ÞVIõstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb %stmmaceth&rmii:Sòoutput �disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22¦ªVd!default/TUÝ€Susb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2¦ÿX ¡ªMõotgïhost÷  €€@ ýV usb2-phy�okayusb@ff5c0000 generic-ehci¦ÿ\ ¡ ªNIýWusb�okayusb@ff5d0000 generic-ohci¦ÿ] ¡ ªNIýWusb�okaymmc@ff5f00000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿ_@ ¡ ª@MQõbiuciuciu-driveciu-sampleepðÑ€h%reset �disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3¦ÿ` ¡Cª`a„õref_clksuspend_clkbus_clkïhost 'utmi_wide 0 Q i ‹ ¬ Å�okay+device@2 usbbda,8153¦interrupt-controller@ff811000 arm,gic-400 Þ ï@¦ÿ�ÿ� ÿ�@ ÿ�`  ¡ €crypto@ff060000rockchip,rk3328-crypto¦ÿ@ ¡ªPQ;õhclk_masterhclk_slavesclkD %crypto-rstpinctrlrockchip,rk3328-pinctrl E+ gpio@ff210000rockchip,gpio-bank¦ÿ! ¡3ªÈ¤´ ï Þ€dgpio@ff220000rockchip,gpio-bank¦ÿ" ¡4ªÉ¤´ ï Þ€)gpio@ff230000rockchip,gpio-bank¦ÿ# ¡5ªÊ¤´ ï Þ€hgpio@ff240000rockchip,gpio-bank¦ÿ$ ¡6ªË¤´ ï Þpcfg-pull-up €Zpcfg-pull-down €bpcfg-pull-none '€Xpcfg-pull-none-2ma ' 4€apcfg-pull-up-2ma  4pcfg-pull-up-4ma  4€[pcfg-pull-none-4ma ' 4€^pcfg-pull-down-4ma  4pcfg-pull-none-8ma ' 4€\pcfg-pull-up-8ma  4€]pcfg-pull-none-12ma ' 4 €_pcfg-pull-up-12ma  4 €`pcfg-output-high Cpcfg-output-low Opcfg-input-high  Z€Ypcfg-input Zi2c0i2c0-xfer gXX€'i2c1i2c1-xfer gXX€(i2c2i2c2-xfer g XX€,i2c3i2c3-xfer gXX€-i2c3-pins gXXhdmi_i2chdmii2c-xfer gXX€Cpdm-0pdmm0-clk gX€pdmm0-fsync gXpdmm0-sdi0 gX€pdmm0-sdi1 gX€pdmm0-sdi2 gX€pdmm0-sdi3 gX€pdmm0-clk-sleep gY€pdmm0-sdi0-sleep gY€pdmm0-sdi1-sleep gY€pdmm0-sdi2-sleep gY€pdmm0-sdi3-sleep gY€pdmm0-fsync-sleep gYtsadcotp-pin g X€9otp-out g X€:uart0uart0-xfer g XZ€ uart0-cts g X€!uart0-rts g X€"uart0-rts-pin g Xuart1uart1-xfer gXZ€#uart1-cts gX€$uart1-rts gX€%uart1-rts-pin gXuart2-0uart2m0-xfer gXZuart2-1uart2m1-xfer gXZ€&spi0-0spi0m0-clk gZspi0m0-cs0 g Zspi0m0-tx g Zspi0m0-rx g Zspi0m0-cs1 g Zspi0-1spi0m1-clk gZspi0m1-cs0 gZspi0m1-tx gZspi0m1-rx gZspi0m1-cs1 gZspi0-2spi0m2-clk gZ€.spi0m2-cs0 gZ€1spi0m2-tx gZ€/spi0m2-rx gZ€0i2s1i2s1-mclk gXi2s1-sclk gXi2s1-lrckrx gXi2s1-lrcktx gXi2s1-sdi gXi2s1-sdo gXi2s1-sdio1 gXi2s1-sdio2 gXi2s1-sdio3 gXi2s1-sleep� gYYYYYYYYYi2s2-0i2s2m0-mclk gXi2s2m0-sclk gXi2s2m0-lrckrx gXi2s2m0-lrcktx gXi2s2m0-sdi gXi2s2m0-sdo gXi2s2m0-sleep` gYYYYYYi2s2-1i2s2m1-mclk gXi2s2m1-sclk gXi2sm1-lrckrx gXi2s2m1-lrcktx gXi2s2m1-sdi gXi2s2m1-sdo gXi2s2m1-sleepP gYYYYYspdif-0spdifm0-tx gXspdif-1spdifm1-tx gXspdif-2spdifm2-tx gX€sdmmc0-0sdmmc0m0-pwren g[sdmmc0m0-pin g[sdmmc0-1sdmmc0m1-pwren g[sdmmc0m1-pin g[€jsdmmc0sdmmc0-clk g\€Jsdmmc0-cmd g]€Ksdmmc0-dectn g[€Lsdmmc0-wrprt g[sdmmc0-bus1 g]sdmmc0-bus4@ g]]]]€Msdmmc0-pins€ g[[[[[[[[sdmmc0extsdmmc0ext-clk g^sdmmc0ext-cmd g[sdmmc0ext-wrprt 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gpio-leds /efg!defaultled-0 ×h �nanopi-r2s:green:lanled-1 ×d �nanopi-r2s:red:sys ¤onled-2 ×h �nanopi-r2s:green:wanregulator-sdmmcioregulator-gpio ² ×)/i!default –vcc_io_sdio¥Ëw@ã2Z  ň àvoltage ïÐÉw@2Z  €regulator-sdmmcregulator-fixed d/j!default–vcc_sd¹Ë2Z ã2Z  €Nregulator-vdd-5vregulator-fixed–vdd_5v¥¹ËLK@ãLK@€+regulator-vdd-5v-lanregulator-fixed ² h/k!default –vdd_5v_lan¥¹ + compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-namespower-domains#iommu-cellsiommusremote-endpointphysphy-namesrockchip,grfnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-modephy-supplyphy-handletx_delayrx_delaymotorcomm,clk-out-frequency-hzmotorcomm,keep-pll-enabledmotorcomm,auto-sleep-disabledreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathlabellinux,codedebounce-intervaldefault-stateenable-active-highregulator-settling-time-usregulator-typestartup-delay-usvin-supplygpio