Ð þíko8fd( f,renesas,v3mskrenesas,r8a77970 &7Renesas V3M Starter Kit boardcan fixed-clock=JZcpus cpu@0bcpuarm,cortex-a53n ry‡˜psciZcpu@1bcpuarm,cortex-a53n ry‡˜psciZcache-controllercachey¦´Zextal fixed-clock=JþP*ÀZextalr fixed-clock=J€ÀZ pmu_a53arm,cortex-a53-pmuËTUÖpsciarm,psci-1.0arm,psci-0.2Ÿsmcscif fixed-clock=JZsoc simple-busÀ éwatchdog@e6020000+renesas,r8a77970-wdtrenesas,rcar-gen3-wdtnæ  ËŒ r’y ð’÷okayþ<watchdog@e6030000+renesas,r8a77970-wdtrenesas,rcar-gen3-wdtnæ  Ë� ry ð‘ ÷reservedgpio@e6050000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionæP Ë &2C r�y ð�gpio@e6051000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionæP Ë & 2C r�y ð�Z gpio@e6052000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionæ P Ë &@2C rŽy ðŽgpio@e6053000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionæ0P Ë &`2C r�y ð�gpio@e6054000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionæ@P Ë &€2C rŒy ðŒgpio@e6055000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionæPP Ë  & 2C r‹y ð‹pinctrl@e6060000renesas,pfc-r8a77970næÀZavb0$Xavb0_mdioavb0_rgmiiavb0_txcrefclk_avb0Zi2c0Xi2c0_i2c0Z mmc_3_3vXmmc_data8mmc_ctrl_mmch äZqspi0Xqspi0_ctrlqspi0_data4_qspi0Z scif0 Xscif0_data_scif0Ztimer@e60f0000-renesas,r8a77970-cmt0renesas,rcar-gen3-cmt0næËŽ� r/ufcky ð/ ÷disabledtimer@e6130000-renesas,r8a77970-cmt1renesas,rcar-gen3-cmt1næ`Ëxyz{|}~ r.ufcky ð. ÷disabledtimer@e6140000-renesas,r8a77970-cmt1renesas,rcar-gen3-cmt1næ`Ë  r-ufcky ð- ÷disabledtimer@e6148000-renesas,r8a77970-cmt1renesas,rcar-gen3-cmt1næ€`Ë r,ufcky ð, ÷disabledclock-controller@e6150000renesas,r8a77970-cpg-mssrnær  uextalextalr=�•ÀZreset-controller@e6160000renesas,r8a77970-rstnæÀsystem-controller@e6180000renesas,r8a77970-syscnæ@�Zthermal@e6190000renesas,thermal-r8a77970 nææ $ËCDE r y ð ¢Z,interrupt-controller@e61c0000&renesas,intc-ex-r8a77970renesas,irqc2CnæHË¡ r—y ð—timer@e61e0000!renesas,tmu-r8a77970renesas,tmunæ0$ˈ‰Š¸tuni0tuni1tuni2 r}ufcky ð} ÷disabledtimer@e6fc0000!renesas,tmu-r8a77970renesas,tmunæü00Ë€�‚“¸tuni0tuni1tuni2ticpi2 r|ufcky ð| ÷disabledtimer@e6fd0000!renesas,tmu-r8a77970renesas,tmunæý00Ë/012¸tuni0tuni1tuni2ticpi2 r{ufcky ð{ ÷disabledtimer@e6fe0000!renesas,tmu-r8a77970renesas,tmunæþ0$˃„…¸tuni0tuni1tuni2 rzufcky ðz ÷disabledtimer@ffc00000!renesas,tmu-r8a77970renesas,tmunÿÀ0$Ëtuv¸tuni0tuni1tuni2 ryufcky ðy ÷disabledi2c@e6500000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnæP@ Ë r£y ð£ È ‘ � ‘ � Ítxrxtxrx× ÷okayñ ûdefaultJ€hdmi@39 adi,adv7511wn9  )5AN]mrgb‚1xports port@0nendpoint’Z/port@1nendpoint’Z-i2c@e6508000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnæP€@ Ë  r¢y ð¢ È “ ’ “ ’ Ítxrxtxrx×  ÷disabledi2c@e6510000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnæQ@ Ë r¡y ð¡ È • ” • ” Ítxrxtxrx×  ÷disabledi2c@e66d0000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnæm@ Ë" r y ð  È — – — – Ítxrxtxrx×  ÷disabledi2c@e66d8000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnæm€@ Ë rŸy ðŸ È ™ ˜ ™ ˜ Ítxrxtxrx×  ÷disabledserial@e6540000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnæT` Ëšr ufckbrg_intscif_clk È 1 0 1 0 Ítxrxtxrxy ð ÷disabledserial@e6550000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnæU` Ë›r ufckbrg_intscif_clk È 3 2 3 2 Ítxrxtxrxy ð ÷disabledserial@e6560000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnæV` Ë�r ufckbrg_intscif_clk È 5 4 5 4 Ítxrxtxrxy ð ÷disabledserial@e66a0000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnæj` Ë‘r ufckbrg_intscif_clk È 7 6 7 6 Ítxrxtxrxy ð ÷disabledcan@e66c0000/renesas,r8a77970-canfdrenesas,rcar-gen3-canfdnæl€Ë ¸ch_intg_intr’ufckcanfdcan_clk ¢²Ä´y ð’ ÷disabledchannel0 ÷disabledchannel1 ÷disabledethernet@e68000005renesas,etheravb-r8a77970renesas,etheravb-rcar-gen3næ€,Ë'()*+,-./0123456789:;<=>?s¸ch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 r,ufcky ð,ÇrgmiiÐåÐú ÷okayñûdefaultethernet-phy@04ethernet-phy-id0022.1622ethernet-phy-ieee802.3-c22"Ün   . Zpwm@e6e30000&renesas,pwm-r8a77970renesas,pwm-rcarnæã: r y ð  ÷disabledpwm@e6e31000&renesas,pwm-r8a77970renesas,pwm-rcarnæã: r y ð  ÷disabledpwm@e6e32000&renesas,pwm-r8a77970renesas,pwm-rcarnæã : r y ð  ÷disabledpwm@e6e33000&renesas,pwm-r8a77970renesas,pwm-rcarnæã0: r y ð  ÷disabledpwm@e6e34000&renesas,pwm-r8a77970renesas,pwm-rcarnæã@: r y ð  ÷disabledserial@e6e60000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifnææ@ ˘rÏ ufckbrg_intscif_clk È Q P Q P Ítxrxtxrxy ðÏ÷okayñûdefaultÀserial@e6e68000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifnææ€@ Ë™rÎ ufckbrg_intscif_clk È S R S R Ítxrxtxrxy ðÎ ÷disabledserial@e6c50000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifnæÅ@ ËrÌ ufckbrg_intscif_clk È W V W V Ítxrxtxrxy ðÌ ÷disabledserial@e6c40000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifnæÄ@ ËrË ufckbrg_intscif_clk È Y X Y X Ítxrxtxrxy ðË ÷disabledpwm@e6e80000!renesas,tpu-r8a77970renesas,tpunæèH ˇ r0y ð0: ÷disabledspi@e6e90000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnæéd Ëœ rÓy ðÓ È A @ A @ Ítxrxtxrx  ÷disabledspi@e6ea0000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnæêd Ë� rÒy ðÒ È C B C B Ítxrxtxrx  ÷disabledspi@e6c00000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnæÀd Ëž rÑy ðÑ È E D E D Ítxrxtxrx  ÷disabledspi@e6c10000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnæÁd ËŸ rÐy ðÐ È G F G F Ítxrxtxrx  ÷disabledvideo@e6ef0000renesas,vin-r8a77970næï ˼ r+y ð+E ÷disabledports port@1 nendpoint@2n’Z#video@e6ef1000renesas,vin-r8a77970næï ˽ r*y ð*E ÷disabledports port@1 nendpoint@2n’Z$video@e6ef2000renesas,vin-r8a77970næï  ˾ r)y ð)E ÷disabledports port@1 nendpoint@2n’Z%video@e6ef3000renesas,vin-r8a77970næï0 Ë¿ r(y ð(E ÷disabledports port@1 nendpoint@2n’Z&dma-controller@e7300000(renesas,dmac-r8a77970renesas,rcar-dmacnç0lËÜØÙÚÛ4567&¸errorch0ch1ch2ch3ch4ch5ch6ch7 rÚufcky ðÚP[@úZ dma-controller@e7310000(renesas,dmac-r8a77970renesas,rcar-dmacnç1lË389:;<=>?&¸errorch0ch1ch2ch3ch4ch5ch6ch7 rÙufcky ðÙP[@úZ iommu@e7740000renesas,ipmmu-r8a77970nçthy {Ziommu@ff8b0000renesas,ipmmu-r8a77970nÿ‹hy{iommu@e67b0000renesas,ipmmu-r8a77970næ{ËÄÅy {Ziommu@ffc80000renesas,ipmmu-r8a77970nÿÈhy {Ziommu@febd0000renesas,ipmmu-r8a77970nþ½h y {Z"mmc@ee140000-renesas,sdhi-r8a77970renesas,rcar-gen3-sdhinî  Ë¥ r:y ð:ˆ ëÂú ÷okayñûdefault–¢¯¹spi@ee2000001renesas,r8a77970-rpc-ifrenesas,rcar-gen3-rpc-if0nî î €Çregsdirmapwbuf Ë& r•y ð• ÷okayñ ûdefaultflash@0!spansion,s25fs512sjedec,spi-nornÑúð€ãpartitionsfixed-partitions bootparam@0nôcr7@40000nôcert-header-sa3@c0000n ôbl2@140000nôcert-header-sa6@180000nôbl31@1c0000nFôuboot@640000nd ôuboot-env@700000npôdtb@740000ntkernel@7c0000n|@user@1bc0000n¼Dinterrupt-controller@f1010000 arm,gic-4002 C@nññññ Ë  r˜uclky ð˜Zvsp@fea20000 renesas,vsp2nþ¢P Ë© roy ðoþ!Z(fcp@fea27000 renesas,fcpvnþ¢p r[y ð[ú"Z!csi2@feaa0000renesas,r8a77970-csi2nþª Ëö rÌy ðÌ ÷disabledports port@0nport@1 nendpoint@0n’#Zendpoint@1n’$Zendpoint@2n’%Zendpoint@3n’&Zdisplay@feb00000renesas,du-r8a77970nþ° ËrÔ'udu.0dclkin.0y ðÔ du.0(÷okayports port@0nport@1nendpoint’)Z*lvds-encoder@feb90000renesas,r8a77970-lvdsnþ¹ r×y ð×÷okayports port@0nendpoint’*Z)port@1nendpoint’+Z.watchdog@ffc90000-renesas,r8a77970-wwdtrenesas,rcar-gen3-wwdtnÿÉËqY¸pretimeouterrorrucntbusy ðE cnt ÷disabledwatchdog@ffca0000-renesas,r8a77970-wwdtrenesas,rcar-gen3-wwdtnÿÊËZ¸pretimeouterrorrucntbusy ðD cnt ÷disabledchipid@fff00044 renesas,prrnÿðDÀthermal-zonescpu-thermal#ú9èG,cooling-mapstripscpu-critWÔÀcÐ icriticaltimerarm,armv8-timer0Ë   ¸sec-physphysvirthyp-physaliasesn/soc/i2c@e6500000s/soc/i2c@e6508000x/soc/i2c@e6510000}/soc/i2c@e66d0000‚/soc/i2c@e66d8000‡/soc/serial@e6e60000chosen�serial0:115200n8hdmi-outhdmi-connectoriaportendpoint’-Zlvds-decoderthine,thc63lvd1024›ports port@0nendpoint’.Z+port@2nendpoint’/Zmemory@48000000bmemorynHxosc5-clock fixed-clock=JÙî Z'regulator-0regulator-fixed ¦VCC_D1.8Vµw@Íw@å÷Zregulator-1regulator-fixed ¦VCC_D3.3Vµ2Z Í2Z å÷Zregulator-2regulator-fixed¦VCC_VDDQ_VIN0µ2Z Í2Z å÷Z compatible#address-cells#size-cellsinterrupt-parentmodel#clock-cellsclock-frequencyphandledevice_typeregclockspower-domainsnext-level-cacheenable-methodcache-unifiedcache-levelbootph-allinterruptsinterrupt-affinityrangesresetsstatustimeout-sec#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergroupsfunctionpower-sourceclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesdmasdma-namesi2c-scl-internal-delay-nspinctrl-0pinctrl-namesinterrupts-extendedavdd-supplydvdd-supplypvdd-supplybgvdd-supplydvdd-3v-supplyadi,input-depthadi,input-colorspaceadi,input-clockremote-endpointassigned-clocksassigned-clock-ratesphy-moderx-internal-delay-pstx-internal-delay-psiommusrenesas,no-ether-linkphy-handlerxc-skew-psreset-gpios#pwm-cellsrenesas,id#dma-cellsdma-channelsrenesas,ipmmu-main#iommu-cellsmax-frequencyvmmc-supplyvqmmc-supplybus-widthnon-removablereg-namesspi-max-frequencyspi-rx-bus-widthread-onlyrenesas,fcpreset-namesrenesas,vspspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisi2c0i2c1i2c2i2c3i2c4serial0stdout-pathvcc-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-on