Ð þíä„8Ô0(TÓø ',Qualcomm Technologies, Inc. SM8550 MTP2qcom,sm8550-mtpqcom,sm8550=handsetchosenJserial0:115200n8clocksxo-board 2fixed-clockVc“àsôsleep-clk 2fixed-clockVcüs0bi-tcxo-div2-clkV2fixed-factor-clock{‚�s/bi-tcxo-ao-div2-clkV2fixed-factor-clock{‚�sÉcpus cpu@0—cpu2arm,cortex-a510£{§psciµÆÔpsciçø d%sl2-cache2cache4@µsl3-cache2cache4@scpu@100—cpu2arm,cortex-a510£{§psciµÆÔpsciçø d%sl2-cache2cache4@µscpu@200—cpu2arm,cortex-a510£{§psciµ Æ Ôpsciçø d%sl2-cache2cache4@µs cpu@300—cpu2arm,cortex-a715£{§psciµ Æ Ôpsciçø %sl2-cache2cache4@µs cpu@400—cpu2arm,cortex-a715£{§psciµ ÆÔpsciçø %sl2-cache2cache4@µs cpu@500—cpu2arm,cortex-a710£{§psciµÆÔpsciçø %sl2-cache2cache4@µscpu@600—cpu2arm,cortex-a710£{§psciµÆÔpsciçø %sl2-cache2cache4@µscpu@700—cpu2arm,cortex-x3£{§psciµÆÔpsciçøf L%sl2-cache2cache4@µscpu-mapcluster0core0Ncore1Ncore2Ncore3Ncore4Ncore5Ncore6Ncore7Nidle-statesRpscicpu-sleep-0-02arm,idle-state_silver-rail-power-collapseo@†&—î§,¸s(cpu-sleep-1-02arm,idle-state_gold-rail-power-collapseo@†X—§È¸s)cpu-sleep-2-02arm,idle-state_goldplus-rail-power-collapseo@†ô—F§8¸s*domain-idle-statescluster-sleep-02domain-idle-stateoAD†î— .§#¸s+cluster-sleep-12domain-idle-stateoAÃD† ð—0§'¦s,firmwarescm2qcom,scm-sm8550qcom,scmÉ�Ùinterconnect-02qcom,sm8550-clk-virtçû s8interconnect-12qcom,sm8550-mc-virtçû sopp-table-qup100mhz2operating-points-v2sSopp-75000000 xhÀ!opp-100000000 õá"opp-table-qup120mhz2operating-points-v2s=opp-75000000 xhÀ!opp-120000000 '"opp-table-qup125mhz2operating-points-v2sQopp-75000000 xhÀ!opp-125000000 sY@"memory@a0000000—memory£ pmu-a5102arm,cortex-a510-pmu #pmu-a7102arm,cortex-a710-pmu $pmu-a7152arm,cortex-a715-pmu %pmu-x32arm,cortex-x3-pmu &psci 2arm,psci-1.0®smcpower-domain-cpu0+Æ'?(spower-domain-cpu1+Æ'?(spower-domain-cpu2+Æ'?(s power-domain-cpu3+Æ'?)s power-domain-cpu4+Æ'?)spower-domain-cpu5+Æ'?)spower-domain-cpu6+Æ'?)spower-domain-cpu7+Æ'?*spower-domain-cluster+?+,s'reserved-memory Rhyp-region@80000000£€ Ycpusys-vm-region@80a00000£€ @Yhyp-tags-region@80e00000£€à=Yxbl-sc-region@d8100000£ØYhyp-tags-reserved-region@811d0000£�Yxbl-dt-log-merged-region@81a00000£� &Yaop-cmd-db-region@81c60000 2qcom,cmd-db£�ÆYaop-config-merged-region@81c80000£�È@Ysmem@81d00000 2qcom,smem£�Ð `-Yadsp-mhi-region@81f00000£�ðYglobal-sync-region@82600000£‚`Ytz-stat-region@82700000£‚pYcdsp-secure-heap-region@82800000£‚€`Ympss-region@8a800000£Š€€Ys˜q6-mpss-dtb-region@9b000000£›Ys™ipa-fw-region@9b080000£›Yipa-gsi-region@9b090000£›  Ygpu-micro-code-region@9b09a000£›   Ys‘spss-region@9b100000£›Yspu-tz-shared-region@9b280000£›(Yspu-modem-shared-region@9b2e0000£›.Ycamera-region@9b300000£›0€Yvideo-region@9bb00000£›°pYs¼cvp-region@9c200000£œ pYcdsp-region@9c900000£œ�Ysÿq6-cdsp-dtb-region@9e900000£ž�Ysq6-adsp-dtb-region@9e980000£ž˜Ys adspslpi-region@9ea00000£ž YsŸrmtfs-region@d4a800002qcom,rmtfs-mem£Ô¨(Yhwmpss-dsm-region@d4d00000£ÔÐ0Ysštz-reserved-region@d8000000£ØYcpucp-fw-region@d8140000£ØYqtee-region@d8300000£Ø0PYta-region@d8800000£Ø€ Ytz-tags-region@e1200000£á tYhwfence-shbuf-region@e6440000£æD'�Ytrust-ui-vm-region@f3600000£ó`®àYtrust-ui-vm-dump-region@f80ee000£øàYtrust-ui-vm-qrt-region@f80ef000£øð�Ytrust-ui-vm-vblk0-ring-region@f80f8000£ø€@Ytrust-ui-vm-vblk1-ring-region@f80fc000£øÀ@Ytrust-ui-vm-swiotlb-region@f8100000£øYoem-vm-region@f8400000£ø@€Yoem-vm-vblk0-ring-region@fcc00000£üÀ@Yoem-vm-swiotlb-region@fcc04000£üÀ@Yhyp-ext-tags-region@fce00000£üà�Yhyp-ext-reserved-region@ff700000£ÿpYsmp2p-adsp 2qcom,smp2p�»­‹. Ÿ.¦µmaster-kernelÅmaster-kernelÕs¡slave-kernel Åslave-kernelìs�smp2p-cdsp 2qcom,smp2p�^°‹. Ÿ.¦µmaster-kernelÅmaster-kernelÕsslave-kernel Åslave-kernelìsýsmp2p-modem 2qcom,smp2p�³¬‹. Ÿ.¦µmaster-kernelÅmaster-kernelÕs›slave-kernel Åslave-kernelìs—ipa-ap-to-modemÅipaÕs–ipa-modem-to-apÅipaìs•soc@0 2simple-busR clock-controller@1000002qcom,sm8550-gcc£BV+<{/01223334s6mailbox@4080002qcom,sm8550-ipccqcom,ipcc£@€ åì*s.dma-controller@800000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma6£€À LMNOPQRSTUVWA N> _56f sdisableds;geniqup@8c00002qcom,geni-se-qup£Œ R zm-ahbs-ahb{6�6‚ _5#f  sdisabledi2c@8800002qcom,geni-i2c£ˆ@zse{6o†default”7 u HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À= sdisabledspi@8800002qcom,geni-spi£ˆ@zse{6o u†default”>?HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À=  sdisabledi2c@8840002qcom,geni-i2c£ˆ@@zse{6q†default”@ G HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À= sdisabledspi@8840002qcom,geni-spi£ˆ@@zse{6q G†default”ABHÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À=  sdisabledi2c@8880002qcom,geni-i2c£ˆ€@zse{6s†default”C H HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À= sdisabledspi@8880002qcom,geni-spi£ˆ€@zse{6s H†default”DEHÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À=  sdisabledi2c@88c0002qcom,geni-i2c£ˆÀ@zse{6u†default”F I HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À= sdisabledspi@88c0002qcom,geni-spi£ˆÀ@zse{6u I†default”GHHÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À=  sdisabledi2c@8900002qcom,geni-i2c£‰@zse{6w†default”I J HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À= sdisabledspi@8900002qcom,geni-spi£‰@zse{6w J†default”JKHÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À=  sdisabledi2c@8940002qcom,geni-i2c£‰@@zse{6y†default”L K HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À= sdisabledspi@8940002qcom,geni-spi£‰@@zse{6y K†default”MNHÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<À=  sdisabledserial@8980002qcom,geni-uart£‰€@zse{6{†default”OP Í0Ù889:žqup-corequp-configÆ<ÀQ sdisabledi2c@89c0002qcom,geni-i2c£‰À@zse{6}†default”R Î HÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<ÀS sdisabledspi@89c0002qcom,geni-spi£‰À@zse{6} Άdefault”TUHÙ889:žqup-corequp-configqup-memory ±;;¶txrxÆ<ÀS  sdisabledgeniqup@9c00002qcom,geni-se-i2c-master-hub£œ zs-ahb{6Z Rsokayi2c@9800002qcom,geni-i2c-master-hub£˜@zsecore{6F6E†default”V Ð 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9840002qcom,geni-i2c-master-hub£˜@@zsecore{6H6E†default”W Ñ 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9880002qcom,geni-i2c-master-hub£˜€@zsecore{6J6E†default”X Ò 0Ù889:žqup-corequp-configÆ<!sokaytypec-mux@42 2fcs,fsa4480£BÔYßëportendpointþZsi2c@98c0002qcom,geni-i2c-master-hub£˜À@zsecore{6L6E†default”[ Ó 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9900002qcom,geni-i2c-master-hub£™@zsecore{6N6E†default”\ Ô 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9940002qcom,geni-i2c-master-hub£™@@zsecore{6P6E†default”] Õ 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9980002qcom,geni-i2c-master-hub£™€@zsecore{6R6E†default”^ Ö 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@99c0002qcom,geni-i2c-master-hub£™À@zsecore{6T6E†default”_ × 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9a00002qcom,geni-i2c-master-hub£š@zsecore{6V6E†default”` Ø 0Ù889:žqup-corequp-configÆ<! sdisabledi2c@9a40002qcom,geni-i2c-master-hub£š@@zsecore{6X6E†default”a Ù 0Ù889:žqup-corequp-configÆ<! sdisableddma-controller@a00000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma6£ À %&'()*A N _5¶f sdisabledsdgeniqup@ac00002qcom,geni-se-qup£¬ R zm-ahbs-ahb{66€ _5£Ù88 žqup-coref sokayi2c@a800002qcom,geni-i2c£¨@zse{6]†default”b a HÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<À= sdisabledspi@a800002qcom,geni-spi£¨@zse{6] a†default”efHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<À=  sdisabledi2c@a840002qcom,geni-i2c£¨@@zse{6_†default”g b HÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<À= sdisabledspi@a840002qcom,geni-spi£¨@@zse{6_ b†default”hiHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<À=  sdisabledi2c@a880002qcom,geni-i2c£¨€@zse{6a†default”j c HÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS sdisabledspi@a880002qcom,geni-spi£¨€@zse{6a c†default”klHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledi2c@a8c0002qcom,geni-i2c£¨À@zse{6c†default”m d HÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS sdisabledspi@a8c0002qcom,geni-spi£¨À@zse{6c d†default”noHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledi2c@a900002qcom,geni-i2c£©@zse{6e†default”p e HÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS sdisabledspi@a900002qcom,geni-spi£©@zse{6e e†default”qrHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledi2c@a940002qcom,geni-i2c£©@@zse{6g†default”s fHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledspi@a940002qcom,geni-spi£©@@zse{6g f†default”tuHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledi2c@a980002qcom,geni-i2c£©€@zse{6i†default”v kHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledspi@a980002qcom,geni-spi£©€@zse{6i k†default”wxHÙ889:cžqup-corequp-configqup-memory ±dd¶txrxÆ<ÀS  sdisabledserial@a9c0002qcom,geni-debug-uart£©À@zse{6k†default”y Cžqup-corequp-config0Ù889:Æ<ÀSsokayinterconnect@15000002qcom,sm8550-cnoc-main£P0€çû s{interconnect@16000002qcom,sm8550-config-noc£`bçû s:interconnect@16800002qcom,sm8550-system-noc£hЀçû interconnect@16c00002qcom,sm8550-pcie-anoc£l"ç{66 û szinterconnect@16e00002qcom,sm8550-aggre1-noc£nDç{66û scinterconnect@17000002qcom,sm8550-aggre2-noc£päç{ û sinterconnect@17800002qcom,sm8550-mmss-noc£x¸çû s»rng@10c30002qcom,sm8550-trngqcom,trng£ 0pcie@1c00000—pci2qcom,pcie-sm8550P£À0`` ¨``parfdbielbiatuconfig 8R` `0`0Ðÿf"3� �Ž��‘’“”Œ/=msi0msi1msi2msi3msi4msi5msi6msi7globalM°`•–—˜8{6"6$6%6*6+66=zauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0Ùz9{žpcie-memcpu-pcie n|| v55€6‡pciÆ6“1˜pciephyÀ}sokay ¢~` ­~^†default”opp-table2operating-points-v2s}opp-2500000-1 &% !¹Ð�Çopp-5000000-1 LK@!¹¡ Çopp-5000000-2 LK@!¹¡ Çopp-10000000-2 ˜–€!¹B@Çopp-8000000-3 z€¹´Çopp-16000000-3 ô$€¹ hÇpcie@0—pci£ÿ Rphy@1c06000 2qcom,sm8550-qmp-gen3x2-pcie-phy£À` ({6"6$6&6(zauxcfg_ahbrefrchngpipe€6‡phyÑ6&áõáÆ6Vöpcie0_pipe_clk sokay�$‚s1pcie@1c08000—pci2qcom,pcie-sm8550P£À€0@@ ¨@@parfdbielbiatuconfig 8R@ @0@0Ðÿf"3� 34589:vw2/=msi0msi1msi2msi3msi4msi5msi6msi7globalM°`²³¶·@{6,6.6/6667666 Izauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axiÑ6,á$ø0Ùz9{ žpcie-memcpu-pcie n|€|� v5€5�€66 ‡pcilink_downÆ6“2˜pciephyÀƒsokay ¢~c ­~a†default”„opp-table2operating-points-v2sƒopp-2500000-1 &% !¹Ð�Çopp-5000000-1 LK@!¹¡ Çopp-5000000-2 LK@!¹¡ Çopp-10000000-2 ˜–€!¹B@Çopp-8000000-3 z€¹´Çopp-16000000-3 ô$€¹ hÇopp-16000000-4 ô$€¹ hÇopp-32000000-4 èH€¹<ÐÇpcie@0—pci£ÿ Rphy@1c0e000 2qcom,sm8550-qmp-gen4x2-pcie-phy£Àà ({606.6264zauxcfg_ahbrefrchngpipe€6 6 ‡phyphy_nocsrÑ62áõáÆ6Vöpcie1_pipe_clk sokay…$‚4�s2dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0£Ü@€ 6EMZg_5€5�s†crypto@1dfa000)2qcom,sm8550-qceqcom,sm8150-qceqcom,qce£ß `±††¶rxtx_5€5�Ùžmemoryphy@1d800002qcom,sm8550-qmp-ufs-phy£Ø {6�zrefref_auxqrefÆ6€‡‡ufsphyV sokayˆ$‚s3ufshc@1d84000+2qcom,sm8550-ufshcqcom,ufshcjedec,ufs-2.0£Ø@0  “3˜ufsphy€€6‡rstÆ6€ _5`fÀ‰0Ùc9:#žufs-ddrcpu-ufsnzcore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@{6Š66‰6™6—6“6•”Šsokay �~ÒÔ‹©Ö ºŒÆO€Ø�s‡opp-table2operating-points-v2s‰opp-75000000@ xhÀxhÀ!opp-150000000@ ðÑ€ðÑ€"opp-300000000@ á£á£€crypto@1d88000;2qcom,sm8550-inline-crypto-engineqcom,inline-crypto-engine£Ø€€{6�sŠhwlock@1f400002qcom,tcsr-mutex£ôçs-clock-controller@1fc00002qcom,sm8550-tcsrsyscon£ü{Vsgpu@3d00000!2qcom,adreno-43050a01qcom,adreno0£ÐÙàÖ#kgsl_3d0_reg_memorycx_memcx_dbgc ,_ŽŽÀ�õ�%Ù9žgfx-memsokayszap-shaderþ‘ qcom/sm8550/a740_zap.mbnopp-table2operating-points-v2s�opp-680000000 (‡úÇÀ¹ûÅ opp-615000000 $¨'ÀÇ�¹½õÂopp-550000000 ÈU€Ç€¹£ opp-475000000 OìÀÇP¹\¯jopp-401000000 æÆ@Ç@¹\¯jopp-348000000 ¾Ç<¹\¯jopp-295000000 •WÀÇ8¹\¯jopp-220000000 ïÇ4¹ šŽgmu@3d6a000&2qcom,adreno-gmu-740.1qcom,adreno-gmu0£Ö PÕ (gmursccgmu_pdc  01=hfigmu8{’’’6 6 ’’!zahbgmucxoaximemnochubdemetÆ’’Ôcxgx _Ž“À”s�opp-table2operating-points-v2s”opp-500000000 ÍeÇ€opp-200000000 ëÂÇ@clock-controller@3d900002qcom,sm8550-gpucc£Ù {/66V+s’iommu@3da0000@2qcom,sm8550-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500£Ú#0  ¡¥¦§¨©ª«¬­®¯¦Ü>?@A“•˜™šœ�» {’ 6 6!’zhlosbusifaceahbÆ’fsŽipa@3f400002qcom,sm8550-ipa_5 5¢0£ôõPà@Àipa-regipa-sharedgsi@‹Ž°••(=ipagsiipa-clock-queryipa-setup-ready{ zcore0Ù9:žmemoryconfig“C––*Tipa-clock-enabled-validipa-clock-enabled sdisabledremoteproc@40800002qcom,sm8550-mpss-pas£P‹—————0=wdogfatalreadyhandoverstop-ackshutdown-ack{zxoÆ<< ÔcxmssÙ þ˜™š“C›Tstopsokay0 qcom/sm8550/modem.mbnqcom/sm8550/modem_dtb.mbnglink-edge‹. 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