Ð þí‰a8}d( ý}, ,Samsung Galaxy S22 5G2samsung,r0qqcom,sm8450=handsetchosen Jframebuffer@b80000002simple-framebufferQ¸°U8[ $bà ia8r8g8b8clocksxo-board 2fixed-clockp}“à�ùsleep-clk 2fixed-clockp}ü�<cpus cpu@0•cpu 2qcom,kryo780Q¡psci¯ÀÎpsciáò�l2-cache2cache¯�l3-cache2cache�cpu@100•cpu 2qcom,kryo780Q¡psci¯ÀÎpsciáò�l2-cache2cache¯�cpu@200•cpu 2qcom,kryo780Q¡psci¯À Îpsciáò�l2-cache2cache¯�cpu@300•cpu 2qcom,kryo780Q¡psci¯ À Îpsciáò�l2-cache2cache¯� cpu@400•cpu 2qcom,kryo780Q¡psci¯ À Îpsciáò�l2-cache2cache¯� cpu@500•cpu 2qcom,kryo780Q¡psci¯ÀÎpsciáò�l2-cache2cache¯�cpu@600•cpu 2qcom,kryo780Q¡psci¯ÀÎpsciáò�l2-cache2cache¯�cpu@700•cpu 2qcom,kryo780Q¡psci¯ÀÎpsciáò�l2-cache2cache¯�cpu-mapcluster0core0"core1"core2"core3"core4"core5"core6"core7"idle-states&pscicpu-sleep-0-02arm,idle-state3silver-rail-power-collapseC@Z kî{úŒ�2cpu-sleep-1-02arm,idle-state3gold-rail-power-collapseC@ZXk{·Œ�3domain-idle-statescluster-sleep-02domain-idle-stateCADZk Ä{½�4cluster-sleep-12domain-idle-stateCAÃDZ Œk ¬{6‡�5ete-02arm,embedded-trace-extension"out-portsportendpoint��%ete-12arm,embedded-trace-extension"out-portsportendpoint��&ete-22arm,embedded-trace-extension"out-portsportendpoint��'ete-32arm,embedded-trace-extension"out-portsportendpoint��(ete-42arm,embedded-trace-extension"out-portsportendpoint� �)ete-52arm,embedded-trace-extension"out-portsportendpoint�!�*ete-62arm,embedded-trace-extension"out-portsportendpoint�"�+ete-72arm,embedded-trace-extension"out-portsportendpoint�#�,funnel-ete2arm,coresight-static-funnelout-portsportendpoint�$�÷in-ports port@0Qendpoint�%�port@1Qendpoint�&�port@2Qendpoint�'�port@3Qendpoint�(�port@4Qendpoint�)� port@5Qendpoint�*�!port@6Qendpoint�+�"port@7Qendpoint�,�#firmwarescm2qcom,scm-sm8450qcom,scm­-0½./Ëinterconnect-02qcom,sm8450-clk-virtØì0�Dinterconnect-12qcom,sm8450-mc-virtØì0�/memory@a0000000•memoryQ pmu2arm,armv8-pmuv3 üpsci 2arm,psci-1.0¨smcpower-domain-cpu0À12�power-domain-cpu1À12�power-domain-cpu2À12� power-domain-cpu3À12� power-domain-cpu4À13� power-domain-cpu5À13�power-domain-cpu6À13�power-domain-cpu7À13�power-domain-cpu-cluster045�1opp-table-qup2operating-points-v2�copp-50000000.úð€56opp-75000000.xhÀ57opp-100000000.õá58reserved-memory Jmemory@80000000Q€`Cmemory@80600000Q€`Cmemory@80640000Q€dCmemory@807c0000Q€|Cmemory@80800000Q€€Cmemory@80860000 2qcom,cmd-dbQ€†Cmemory@80880000Q€ˆCmemory@808a0000Q€ŠCmemory@808e0000Q€Ž@Cmemory@808e4000Q€Ž@Cmemory@80900000 2qcom,smemQ€� J9Cmemory@80b00000Q€°Cmemory@80c00000Q€À`Cmemory@85700000Q…ppCmemory@85e00000Q…àC�§memory@88000000Qˆ�C�¤memory@89900000Q‰�C�´memory@8b900000Q‹�Cmemory@8b910000Q‹‘ Cmemory@8b91a000Q‹‘  C�™memory@8ba00000Q‹ Cmemory@8bb80000Q‹¸Cmemory@8bbe0000Q‹¾Cmemory@8bc00000Q‹À C�·memory@9ee00000QžàpCmemory@9f500000QŸP€Cmemory@9fd000002qcom,rmtfs-memQŸÐ(CRamemory@a6e00000Q¦àCmemory@a6f00000Q¦ðCmemory@bb000000Q»Cmemory@c0000000QÀ Cmemory@e0000000Qà`Cmemory@e0600000Qà`@Cmemory@e0a00000Qà Cmemory@e0b00000Qà°¯0Cmemory@e55f3000Qå_0�Cmemory@e55fc000Qå_À@Cmemory@e5600000Qå`Cmemory@e8800000Qè€Cmemory@e8900000Qè� Cmemory@e9b00000Qé°PCmemory@ea000000Qê�Cmemory@ed900000Qí�°Csplash-region@b8000000Q¸°Csmp2p-adsp 2qcom,smp2pk»­u: ‰:�Ÿmaster-kernel¯master-kernel¿�¨slave-kernel ¯slave-kernelÖë�¦smp2p-cdsp 2qcom,smp2pk^°u: ‰:�Ÿmaster-kernel¯master-kernel¿�µslave-kernel ¯slave-kernelÖë�³smp2p-modem 2qcom,smp2pk³¬u: ‰:�Ÿmaster-kernel¯master-kernel¿�¸slave-kernel ¯slave-kernelÖë�¶ipa-ap-to-modem¯ipa¿ipa-modem-to-ap¯ipaÖësmp2p-slpi 2qcom,smp2pká®u: ‰:�Ÿmaster-kernel¯master-kernel¿�¥slave-kernel ¯slave-kernelÖë�£soc@0 Jü 2simple-busclock-controller@1000002qcom,gcc-sm8450QBpË@;<=>>???@±bi_tcxosleep_clkpcie_0_pipe_clkpcie_1_pipe_clkpcie_1_phy_aux_clkufs_phy_rx_symbol_0_clkufs_phy_rx_symbol_1_clkufs_phy_tx_symbol_0_clkusb3_phy_wrapper_gcc_usb30_pipe_clk�Bdma-controller@800000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dmaQ€�üLMNOPQRSTUVW +~ <A– Cdisabled�Ggeniqup@8c00002qcom,geni-se-qupQŒ  m-ahbs-ahbBŠB‹ <Aƒ J Cdisabledi2c@8800002qcom,geni-i2cQˆ@seBxJdefaultXC üu H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledspi@8800002qcom,geni-spiQˆ@seBx üuJdefaultXHI0½DDEF bqup-corequp-config uGGztxrx  Cdisabledi2c@8840002qcom,geni-i2cQˆ@@seBzJdefaultXJ üG H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledspi@8840002qcom,geni-spiQˆ@@seBz üGJdefaultXKL0½DDEF bqup-corequp-config uGGztxrx  Cdisabledi2c@8880002qcom,geni-i2cQˆ€@seB|JdefaultXM üH H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledspi@8880002qcom,geni-spiQˆ€@seB| üHJdefaultXNO0½DDEF bqup-corequp-config uGGztxrx  Cdisabledi2c@88c0002qcom,geni-i2cQˆÀ@seB~JdefaultXP üI H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledspi@88c0002qcom,geni-spiQˆÀ@seB~ üIJdefaultXQR0½DDEF bqup-corequp-config uGGztxrx  Cdisabledi2c@8900002qcom,geni-i2cQ‰@seB€JdefaultXS üJ H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledspi@8900002qcom,geni-spiQ‰@seB€ üJJdefaultXTU0½DDEF bqup-corequp-config uGGztxrx  Cdisabledi2c@8940002qcom,geni-i2cQ‰@@seB‚JdefaultXV üK H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledserial@8940002qcom,geni-uartQ‰@@seB‚JdefaultXW üK0½DDFXbqup-corequp-config Cdisabledspi@8940002qcom,geni-spiQ‰@@seB‚ üKJdefaultXYZ0½DDEF bqup-corequp-config uGGztxrx  Cdisabledi2c@8980002qcom,geni-i2cQ‰€@seB„JdefaultX[ üC H½DDEF ./bqup-corequp-configqup-memory uGGztxrx Cdisabledspi@8980002qcom,geni-spiQ‰€@seB„ üCJdefaultX\]0½DDEF bqup-corequp-config uGGztxrx  Cdisableddma-controller@900000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dmaQ��üôõö÷øùúûüýþÿ +~ <A¶ Cdisabled�_geniqup@9c00002qcom,geni-se-qupQœ  m-ahbs-ahbB†B‡ <A£½DD bqup-core J Cdisabledi2c@9800002qcom,geni-i2cQ˜@seBVJdefaultX^ üY H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@9800002qcom,geni-spiQ˜@seBV üYJdefaultX`aÀb„cH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledi2c@9840002qcom,geni-i2cQ˜@@seBXJdefaultXd üZ H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@9840002qcom,geni-spiQ˜@@seBX üZJdefaultXefH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledi2c@9880002qcom,geni-i2cQ˜€@seBZJdefaultXg ü[ H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@9880002qcom,geni-spiQ˜€@seBZ ü[JdefaultXhiH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledi2c@98c0002qcom,geni-i2cQ˜À@seB\JdefaultXj ü\ H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@98c0002qcom,geni-spiQ˜À@seB\ ü\JdefaultXklH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledi2c@9900002qcom,geni-i2cQ™@seB^JdefaultXm ü] H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@9900002qcom,geni-spiQ™@seB^ ü]JdefaultXnoÀb„cH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledi2c@9940002qcom,geni-i2cQ™@@seB`JdefaultXp ü^ H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@9940002qcom,geni-spiQ™@@seB` ü^JdefaultXqrH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledi2c@9980002qcom,geni-i2cQ™€@seBbJdefaultXs ü_ H½DDEF ./bqup-corequp-configqup-memory u__ztxrx Cdisabledspi@9980002qcom,geni-spiQ™€@seBb ü_JdefaultXtuH½DDEF ./bqup-corequp-configqup-memory u__ztxrx  Cdisabledserial@99c0002qcom,geni-debug-uartQ™À@seBdJdefaultXvw ü`0½DDFXbqup-corequp-config Cdisableddma-controller@a00000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dmaQ �ü%&'()* +~ <AV Cdisabled�ygeniqup@ac00002qcom,geni-se-qupQ¬` m-ahbs-ahbBˆB‰ <AC½DD bqup-core J Cdisabledi2c@a800002qcom,geni-i2cQ¨@seBhJdefaultXx üa H½DDEF ./bqup-corequp-configqup-memory uyyztxrx Cdisabledspi@a800002qcom,geni-spiQ¨@seBh üaJdefaultXz{H½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledi2c@a840002qcom,geni-i2cQ¨@@seBjJdefaultX| üb H½DDEF ./bqup-corequp-configqup-memory uyyztxrx Cdisabledspi@a840002qcom,geni-spiQ¨@@seBj übJdefaultX}~H½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledi2c@a880002qcom,geni-i2cQ¨€@seBlJdefaultX üc H½DDEF ./bqup-corequp-configqup-memory uyyztxrx Cdisabledspi@a880002qcom,geni-spiQ¨€@seBl ücJdefaultX€�H½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledi2c@a8c0002qcom,geni-i2cQ¨À@seBnJdefaultX‚ üd H½DDEF ./bqup-corequp-configqup-memory uyyztxrx Cdisabledspi@a8c0002qcom,geni-spiQ¨À@seBn üdJdefaultXƒ„H½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledi2c@a900002qcom,geni-i2cQ©@seBpJdefaultX… üe H½DDEF ./bqup-corequp-configqup-memory uyyztxrx Cdisabledspi@a900002qcom,geni-spiQ©@seBp üeJdefaultX†‡H½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledi2c@a940002qcom,geni-i2cQ©@@seBrJdefaultXˆ üfH½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledspi@a940002qcom,geni-spiQ©@@seBr üfJdefaultX‰ŠH½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledi2c@a980002qcom,geni-i2cQ©€@seBtJdefaultX‹ ükH½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledspi@a980002qcom,geni-spiQ©€@seBt ükJdefaultXŒ�H½DDEF ./bqup-corequp-configqup-memory uyyztxrx  Cdisabledrng@10c30002qcom,sm8450-trngqcom,trngQ 0pcie@1c000002qcom,pcie-sm8450-pcie0PQÀ0`` ¨``˜parfdbielbiatuconfig•pci¢³ÿ½ 8J` `0`0Ð ÇŽY€ŽY�Ïÿlü�Ž��‘’“”Œ/Ümsi0msi1msi2msi3msi4msi5msi6msi7globalëì ÿ•–—˜0½�/FX3bpcie-memcpu-pcie\B6B7=;B/B1B3B8B9BBB ]pipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre0aggre1  AABpciÀB*=/pciephy 9�^ E�`JdefaultX‘„’ Cdisabledopp-table2operating-points-v2�’opp-2500000.&% 57PÐ�^opp-5000000.LK@57P¡ ^opp-8000000.z5“P´^pcie@0•pciQ³ÿ Jphy@1c06000 2qcom,sm8450-qmp-gen3x1-pcie-phyQÀ` (B/B1B2B4B6auxcfg_ahbrefrchngpipehpcie_0_pipe_clkp{Bphy†B4–õá Cdisabled�=pcie@1c080002qcom,pcie-sm8450-pcie1PQÀ€0@@ ¨@@˜parfdbielbiatuconfig•pci¢³ÿ½ 8J@ @0@0Ð ÇŽZŽZÏÿlü34589:vw2/Ümsi0msi1msi2msi3msi4msi5msi6msi7globalëì ÿ²³¶·0½�/FX4bpcie-memcpu-pcieXBCBD>;B:B<B>BEBFBB Vpipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre1  A€A�B pciÀB*>/pciephy 9�a E�cJdefaultX”„• Cdisabledopp-table2operating-points-v2�•opp-2500000-1.&% 57PÐ�^opp-5000000-1.LK@57P¡ ^opp-5000000-2.LK@57P¡ ^opp-10000000-2.˜–€57PB@^opp-8000000-3.z5“P´^opp-16000000-3.ô$5“P h^opp-16000000-4.ô$5“P h^opp-32000000-4.èH5“P<Ð^pcie@0•pciQ³ÿ Jpcie-ep@1c080002qcom,sm8450-pcie-eppQÀ€0@@ ¨@@ À°@ &˜parfdbielbiatuaddr_spacemmiodma@B:B<B>BEBF;BB Fauxcfgbus_masterbus_slaveslave_q2arefddrss_sf_tbuaggre_noc_axi$ü2¸VÜglobaldoorbelldma0½�/FX4bpcie-memcpu-pcie <A€B coreÀB*>/pciephy½JdefaultX” Cdisabledphy@1c0e000 2qcom,sm8450-qmp-gen4x2-pcie-phyQÀà (B?B<B=BABCauxcfg_ahbrefrchngpipehpcie_1_pipe_clkp{B phy†BA–õá Cdisabled�>interconnect@15000002qcom,sm8450-config-nocQPÀØì0�Xinterconnect@16800002qcom,sm8450-system-nocQhâØì0�Einterconnect@16c00002qcom,sm8450-pcie-anocQlâ€Øì0��interconnect@16e00002qcom,sm8450-aggre1-nocQnÀ€ØB B ì0�ýinterconnect@17000002qcom,sm8450-aggre2-nocQp€Øì0 BB B ; �.interconnect@17400002qcom,sm8450-mmss-nocQtð€Øì0�Âhwlock@1f400002qcom,tcsr-mutexQô«�9syscon@1fc00002qcom,sm8450-tcsrsysconQü�-gpu@3d000002qcom,adreno-730.1qcom,adreno0QÐÙàÖ#˜kgsl_3d0_reg_memorycx_memcx_dbgc ü,<––„—¹˜ò Cdisabled�zap-shader™opp-table2operating-points-v2�—opp-818000000.0Á°€^€opp-791000000./%³À^@opp-734000000.+¿ó€^opp-640000000.&% ^àopp-599000000.#´À^Àopp-545000000. | @^�opp-492000000.SS^€opp-421000000.ó@^Popp-350000000.Ü“€^@opp-317000000.å @^@opp-285000000.üÁ@^8opp-220000000. ï^8gmu@3d6a000&2qcom,adreno-gmu-730.1qcom,adreno-gmu0QÖ PÕ )˜gmursccgmu_pdcü01Ühfigmu8šššBB-šš!ahbgmucxoaximemnochubdemetÀššÎcxgx <–Л„œ�˜opp-table2operating-points-v2�œopp-500000000.Íe^€opp-200000000. ëÂ^@clock-controller@3d900002qcom,sm8450-gpuccQÙ ;B+B,pË�šiommu@3da0000@2qcom,sm8450-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500QÚÙæ8ü¡¦§¨©ª«¬­®¯¦Ü>?@A“•˜™šœ�»¼0šššB-B.šgmuhubhlosbusifaceahbÀšù�–phy@88e300002qcom,sm8450-usb-hs-phyqcom,usb-snps-hs-7nm-phyQŽ0Cokay{;refB�ž$Ÿ�phy@88e80002qcom,sm8450-qmp-usb3-dp-phyQŽ€0 B°;B²B³auxrefcom_auxusb3_pipeBB phycommonp{2 Cdisabled�@ports port@0Qendpointport@1Qendpoint� �port@2Qendpoint�¡�Íremoteproc@24000002qcom,sm8450-slpi-pasQ@@<u¢ ££££#Üwdogfatalreadyhandoverstop-ack;xoÀbbÎlcxlmx¤ЛE¥Vstop Cdisabledglink-edgeu: ‰:lslpiŸfastrpc 2qcom,fastrpcrfastrpcglink-apps-dsplsdsp† compute-cb@12qcom,fastrpc-compute-cbQ <AAcompute-cb@22qcom,fastrpc-compute-cbQ <ABcompute-cb@32qcom,fastrpc-compute-cbQ <ACremoteproc@30000002qcom,sm8450-adsp-pasQ<u¢¦¦¦¦#Üwdogfatalreadyhandoverstop-ack;xoÀbbÎlcxlmx§ЛE¨Vstop Cdisabledglink-edgeu: ‰:llpassŸgpr 2qcom,gpr radsp_apps�© service@1 2qcom,q6apmQ¶Çavs/audiomsm/adsp/audio_pddais2qcom,q6apm-dais <Abedais2qcom,q6apm-lpass-dais¶service@2 2qcom,q6prmQÇavs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocksp�©fastrpc 2qcom,fastrpcrfastrpcglink-apps-dspladsp† compute-cb@32qcom,fastrpc-compute-cbQ <Acompute-cb@42qcom,fastrpc-compute-cbQ <Acompute-cb@52qcom,fastrpc-compute-cbQ <Acodec@31e00002qcom,sm8450-lpass-wsa-macroQ4©D©E©f©gªmclknplmacrodcodecfsgenp hwsa2-mclk¶�«soundwire@31f00002qcom,soundwire-v1.7.0Q  ü««ifacelWSA2X¬JdefaultÞíý??   )ÿÿ<ÿÿÿÿÿÿÿÿNÿÿÿÿÿÿÿÿ_ÿÿÿÿÿÿÿÿvÿÿÿÿÿÿ‘ÿÿÿÿÿÿÿÿ®ÿÿÿÿÿÿÿÿ ¶ Cdisabledcodec@32000002qcom,sm8450-lpass-rx-macroQ 4©@©F©f©gªmclknplmacrodcodecfsgenphmclk¶�­soundwire@32100002qcom,soundwire-v1.7.0Q!  ü›­ifacelRXÞíX®Jdefaultý ) <ÿÿÿÿNÿÿÿÿ_ÿÿvÿÿÿ‘ÿÿÿÿ® ¶ Cdisabledcodec@32200002qcom,sm8450-lpass-tx-macroQ"4©@©F©f©gªmclknplmacrodcodecfsgenphmclk¶�±codec@32400002qcom,sm8450-lpass-wsa-macroQ$4©B©C©f©gªmclknplmacrodcodecfsgenphmclk¶�¯soundwire@32500002qcom,soundwire-v1.7.0Q%  üª¯ifacelWSAX°JdefaultÞíý??   )ÿÿ<ÿÿÿÿÿÿÿÿNÿÿÿÿÿÿÿÿ_ÿÿÿÿÿÿÿÿvÿÿÿÿÿÿ‘ÿÿÿÿÿÿÿÿ®ÿÿÿÿÿÿÿÿ ¶ Cdisabledsoundwire@33b00002qcom,soundwire-v1.7.0Q; üð Ücorewakeup±ifacelTXX²JdefaultÞíý)<ÿÿÿÿNÿÿÿÿ_ÿÿÿÿvÿÿÿÿ‘ÿÿÿÿ® ¶ Cdisabledcodec@33f00002qcom,sm8450-lpass-va-macroQ?0©9©f©g©Fmclkmacrodcodecnplphfsgen¶ Cdisabled�ªremoteproc@323000002qcom,sm8450-cdsp-pasQ20@uB³³³³#Üwdogfatalreadyhandoverstop-ack;xoÀbb Îcxmxc´ЛEµVstop Cdisabledglink-edgeu: ‰:lcdspŸfastrpc 2qcom,fastrpcrfastrpcglink-apps-dsplcdsp† compute-cb@12qcom,fastrpc-compute-cbQ<A!aA! compute-cb@22qcom,fastrpc-compute-cbQ<A!bA" compute-cb@32qcom,fastrpc-compute-cbQ<A!cA# compute-cb@42qcom,fastrpc-compute-cbQ<A!dA$ compute-cb@52qcom,fastrpc-compute-cbQ<A!eA% compute-cb@62qcom,fastrpc-compute-cbQ<A!fA& compute-cb@72qcom,fastrpc-compute-cbQ<A!gA' compute-cb@82qcom,fastrpc-compute-cbQ<A!hA( remoteproc@40800002qcom,sm8450-mpss-pasQLu¶¶¶¶¶0Üwdogfatalreadyhandoverstop-ackshutdown-ack;xoÀbb Îcxmss·ЛE¸Vstop Cdisabledglink-edgeu: ‰:lmodemŸclock-controller@aaf00002qcom,sm8450-videoccQ ¯;BµÀbb 577pËcci@ac15000!2qcom,sm8450-cciqcom,msm8996-cciQ ÁP üÌÀ¹(¹¹{¹ ¹¹-camnoc_axislow_ahb_srccpas_ahbccicci_srcXº»Ƽ½Jdefaultsleep Cdisabled i2c-bus@0Q}B@ i2c-bus@1Q}B@ cci@ac16000!2qcom,sm8450-cciqcom,msm8996-cciQ Á` üÀ¹(¹¹{¹ ¹ ¹ -camnoc_axislow_ahb_srccpas_ahbccicci_srcX¾¿ÆÀÁJdefaultsleep Cdisabled i2c-bus@0Q}B@ i2c-bus@1Q}B@ clock-controller@ade00002qcom,sm8450-camccQ ÞB;;<Àbb 577pË�¹display-subsystem@ae000002qcom,sm8450-mdssQ à˜mdssH½Â/Â/FXbmdp0-memmdp1-memcpu-cfgÃÀà ÃBBÃ< üSÖë <A( J Cdisabled�Ådisplay-controller@ae010002qcom,sm8450-dpu Q àð ë0 ˜mdpvbif0BBÃÃ?Ã<ÃK!busnrt_busifacelutcorevsync†ÃK–$ø„ÄÀbÅüports port@0Qendpoint�Æ�Ðport@1Qendpoint�Ç�Òport@2Qendpoint�È�Ìopp-table2operating-points-v2�Äopp-172000000. @ƒ5Éopp-200000000. ëÂ57opp-325000000._@58opp-375000000.Z À5Êopp-500000000.Íe5“displayport-controller@ae900002qcom,sm8450-dpqcom,sm8350-dpPQ é é é é éÅü 0Ãà ÃÃÃÃJcore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel†ÃÃÃÐ@@@*@/dp¶„ËÀb Cdisabledports port@0Qendpoint�Ì�Èport@1Qendpoint�Í�¡opp-table2operating-points-v2�Ëopp-160000000. ‰h57opp-270000000.߀58opp-540000000. /¿5Êopp-810000000.0Gž€5“dsi@ae94000(2qcom,sm8450-dsi-ctrlqcom,mdss-dsi-ctrlQ é@ ˜dsi_ctrlÅü0ÃÃÃAÃ7ÃB$bytebyte_intfpixelcoreifacebus†ÃÃBÐÎ΄ÏÀb*Î/dsi  Cdisabledports port@0Qendpoint�Ð�Æport@1Qendpointopp-table2operating-points-v2�Ïopp-187500000. -à57opp-300000000.á£58opp-358000000.V¥€5Êphy@ae944002qcom,sm8450-dsi-phy-5nm0Q éD éF€ éI`˜dsi_phydsi_phy_lanedsi_pllp{Ã; ifaceref Cdisabled�Îdsi@ae96000(2qcom,sm8450-dsi-ctrlqcom,mdss-dsi-ctrlQ é` ˜dsi_ctrlÅü0Ãà ÃCÃ9ÃB$bytebyte_intfpixelcoreifacebus†ÃÃDÐÑÑ„ÏÀb*Ñ/dsi  Cdisabledports port@0Qendpoint�Ò�Çport@1Qendpointphy@ae964002qcom,sm8450-dsi-phy-5nm0Q éd éf€ éi`˜dsi_phydsi_phy_lanedsi_pllp{Ã; ifaceref Cdisabled�Ñclock-controller@af000002qcom,sm8450-dispccQ ðd;;B<ÎÎÑÑ@@Àb57pË�Ãinterrupt-controller@b2200002qcom,sm8450-pdcqcom,pdc Q "@ðdHçà î(6^a}?~Ì ëÖ�¢thermal-sensor@c263000 2qcom,sm8450-tsensqcom,tsens-v2 Q &0 " ÷üúüÜuplowcritical�thermal-sensor@c265000 2qcom,sm8450-tsensqcom,tsens-v2 Q &P "0÷üûýÜuplowcritical�power-management@c300000#2qcom,sm8450-aoss-qmpqcom,aoss-qmpQ 0u: ‰:p�›sram@c3f00002qcom,rpmh-statsQ ?Лspmi@c4000002qcom,spmi-pmic-arbPQ @0 P@ D L BИcorechnlsobsrvrintrcnfg Üperiph_irq u¢#Öë pmic@12qcom,pm8350qcom,spmi-pmicQ temp-alarm@a002qcom,spmi-temp-alarmQ ü � gpio@8800 2qcom,pm8350-gpioqcom,spmi-gpioQˆ0@Ó LÖë�Ópmic@22qcom,pm8350cqcom,spmi-pmicQ temp-alarm@a002qcom,spmi-temp-alarmQ ü � gpio@8800!2qcom,pm8350c-gpioqcom,spmi-gpioQˆ0@Ô LÖë�Ôled-controller@ee00+2qcom,pm8350c-flash-ledqcom,spmi-flash-ledQî Cdisabledpwm2qcom,pm8350c-pwmX Cdisabledmailbox@ed180002qcom,sm8450-ipccqcom,ipccQÑ€ üåÖëc�:pinctrl@f1000002qcom,sm8450-tlmmQ0 üÐ0LÖë@�Óo¢}$��sdc2-default-stateclk-pins ’sdc2_clk—¦cmd-pins ’sdc2_cmd—³data-pins ’sdc2_data—³sdc2-sleep-stateclk-pins ’sdc2_clk—¦cmd-pins ’sdc2_cmd—³data-pins ’sdc2_data—³cci0-default-state’gpio110gpio111Àcci_i2c—³�ºcci0-sleep-state’gpio110gpio111Àcci_i2c—É�¼cci1-default-state’gpio112gpio113Àcci_i2c—³�»cci1-sleep-state’gpio112gpio113Àcci_i2c—É�½cci2-default-state’gpio114gpio115Àcci_i2c—³�¾cci2-sleep-state’gpio114gpio115Àcci_i2c—É�Àcci3-default-state’gpio208gpio209Àcci_i2c—³�¿cci3-sleep-state’gpio208gpio209Àcci_i2c—É�Ápcie0-default-state�‘perst-pins’gpio94Àgpio—Éclkreq-pins’gpio95Àpcie0_clkreqn—³wake-pins’gpio96Àgpio—³pcie1-default-state�”perst-pins’gpio97Àgpio—Éclkreq-pins’gpio98Àpcie1_clkreqn—³wake-pins’gpio99Àgpio—³qup-i2c0-data-clk-state ’gpio0gpio1Àqup0�^qup-i2c1-data-clk-state ’gpio4gpio5Àqup1�dqup-i2c2-data-clk-state ’gpio8gpio9Àqup2�gqup-i2c3-data-clk-state’gpio12gpio13Àqup3�jqup-i2c4-data-clk-state’gpio16gpio17Àqup4�mqup-i2c5-data-clk-state’gpio206gpio207Àqup5�pqup-i2c6-data-clk-state’gpio20gpio21Àqup6�squp-i2c8-data-clk-state’gpio28gpio29Àqup8�xqup-i2c9-data-clk-state’gpio32gpio33Àqup9�|qup-i2c10-data-clk-state’gpio36gpio37Àqup10�qup-i2c11-data-clk-state’gpio40gpio41Àqup11�‚qup-i2c12-data-clk-state’gpio44gpio45Àqup12�…qup-i2c13-data-clk-state’gpio48gpio49Àqup13—³�ˆqup-i2c14-data-clk-state’gpio52gpio53Àqup14—³�‹qup-i2c15-data-clk-state’gpio56gpio57Àqup15�Cqup-i2c16-data-clk-state’gpio60gpio61Àqup16�Jqup-i2c17-data-clk-state’gpio64gpio65Àqup17�Mqup-i2c18-data-clk-state’gpio68gpio69Àqup18�Pqup-i2c19-data-clk-state’gpio72gpio73Àqup19�Squp-i2c20-data-clk-state’gpio76gpio77Àqup20�Vqup-i2c21-data-clk-state’gpio80gpio81Àqup21�[qup-spi0-cs-state’gpio3Àqup0�aqup-spi0-data-clk-state’gpio0gpio1gpio2Àqup0�`qup-spi1-cs-state’gpio7Àqup1�fqup-spi1-data-clk-state’gpio4gpio5gpio6Àqup1�equp-spi2-cs-state’gpio11Àqup2�iqup-spi2-data-clk-state’gpio8gpio9gpio10Àqup2�hqup-spi3-cs-state’gpio15Àqup3�lqup-spi3-data-clk-state’gpio12gpio13gpio14Àqup3�kqup-spi4-cs-state’gpio19Àqup4—¦�oqup-spi4-data-clk-state’gpio16gpio17gpio18Àqup4�nqup-spi5-cs-state’gpio85Àqup5�rqup-spi5-data-clk-state’gpio206gpio207gpio84Àqup5�qqup-spi6-cs-state’gpio23Àqup6�uqup-spi6-data-clk-state’gpio20gpio21gpio22Àqup6�tqup-spi8-cs-state’gpio31Àqup8�{qup-spi8-data-clk-state’gpio28gpio29gpio30Àqup8�zqup-spi9-cs-state’gpio35Àqup9�~qup-spi9-data-clk-state’gpio32gpio33gpio34Àqup9�}qup-spi10-cs-state’gpio39Àqup10��qup-spi10-data-clk-state’gpio36gpio37gpio38Àqup10�€qup-spi11-cs-state’gpio43Àqup11�„qup-spi11-data-clk-state’gpio40gpio41gpio42Àqup11�ƒqup-spi12-cs-state’gpio47Àqup12�‡qup-spi12-data-clk-state’gpio44gpio45gpio46Àqup12�†qup-spi13-cs-state’gpio51Àqup13�Šqup-spi13-data-clk-state’gpio48gpio49gpio50Àqup13�‰qup-spi14-cs-state’gpio55Àqup14��qup-spi14-data-clk-state’gpio52gpio53gpio54Àqup14�Œqup-spi15-cs-state’gpio59Àqup15�Iqup-spi15-data-clk-state’gpio56gpio57gpio58Àqup15�Hqup-spi16-cs-state’gpio63Àqup16�Lqup-spi16-data-clk-state’gpio60gpio61gpio62Àqup16�Kqup-spi17-cs-state’gpio67Àqup17�Oqup-spi17-data-clk-state’gpio64gpio65gpio66Àqup17�Nqup-spi18-cs-state’gpio71Àqup18—¦�Rqup-spi18-data-clk-state’gpio68gpio69gpio70Àqup18—¦�Qqup-spi19-cs-state’gpio75Àqup19—¦�Uqup-spi19-data-clk-state’gpio72gpio73gpio74Àqup19—¦�Tqup-spi20-cs-state’gpio79Àqup20�Zqup-spi20-data-clk-state’gpio76gpio77gpio78Àqup20�Yqup-spi21-cs-state’gpio83Àqup21�]qup-spi21-data-clk-state’gpio80gpio81gpio82Àqup21�\qup-uart7-rx-state’gpio26Àqup7—¦�wqup-uart7-tx-state’gpio27Àqup7—¦�vqup-uart20-default-state’gpio76gpio77gpio78gpio79Àqup20�Wpinctrl@34400002qcom,sm8450-lpass-lpi-pinctrl QDM0L@Õ©f©g coreaudio�Õtx-swr-active-state�²clk-pins’gpio0 Àswr_tx_clk—ئdata-pins’gpio1gpio2gpio14 Àswr_tx_data—Øârx-swr-active-state�®clk-pins’gpio3 Àswr_rx_clk—ئdata-pins ’gpio4gpio5 Àswr_rx_data—Øâdmic01-default-stateclk-pins’gpio6 Àdmic1_clk—ðdata-pins’gpio7 Àdmic1_data—dmic23-default-stateclk-pins’gpio8 Àdmic2_clk—ðdata-pins’gpio9 Àdmic2_data—wsa-swr-active-state�°clk-pins’gpio10 Àwsa_swr_clk—ئdata-pins’gpio11 Àwsa_swr_data—Øâwsa2-swr-active-state�¬clk-pins’gpio15 Àwsa2_swr_clk—ئdata-pins’gpio16Àwsa2_swr_data—Øâstm@10002000 2arm,coresight-stmarm,primecell Q (˜stm-basestm-stimulus-base› apb_pclkout-portsportendpoint�Ö�×funnel@10041000+2arm,coresight-dynamic-funnelarm,primecellQ› apb_pclkin-ports port@7Qendpoint�×�Öout-portsportendpoint�Ø�Üfunnel@10042000+2arm,coresight-dynamic-funnelarm,primecellQ › apb_pclkin-ports port@4Qendpoint�Ù�øport@6Qendpoint�Ú�öout-portsportendpoint�Û�Ýfunnel@10045000+2arm,coresight-dynamic-funnelarm,primecellQP› apb_pclkin-ports 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apb_pclkout-portsportendpoint�î�ëtpdm@10b0d000"2qcom,coresight-tpdmarm,primecellQ°Ð› apb_pclkout-portsportendpoint�ï�ìtpdm@10c28000"2qcom,coresight-tpdmarm,primecellQ€› apb_pclkout-portsportendpoint�ð�òtpdm@10c29000"2qcom,coresight-tpdmarm,primecellQÂ�› apb_pclkout-portsportendpoint�ñ�ócti@10c2a000 2arm,coresight-ctiarm,primecellQ › apb_pclkcti@10c2b000 2arm,coresight-ctiarm,primecellQ°› apb_pclktpda@10c2e000"2qcom,coresight-tpdaarm,primecellQÂà› apb_pclkin-ports port@1aQendpoint�ò�ðport@1bQendpoint�ó�ñout-portsportendpoint�ô�õfunnel@10c2f000+2arm,coresight-dynamic-funnelarm,primecellQÂð› apb_pclkin-portsportendpoint�õ�ôout-portsportendpoint�ö�Úfunnel@13810000+2arm,coresight-dynamic-funnelarm,primecellQ�› apb_pclkin-portsportendpoint�÷�$out-portsportendpoint�ø�Ùcti@138e0000 2arm,coresight-ctiarm,primecellQŽ› apb_pclkcti@138f0000 2arm,coresight-ctiarm,primecellQ�› apb_pclkcti@13900000 2arm,coresight-ctiarm,primecellQ�› apb_pclksram@146aa000#2qcom,sm8450-imemsysconsimple-mfdQj Jj  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