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€opp-table-cpu02operating-points-v2Xùopp-300000000cá£jO€I>opp-576000000c"UjO€I>opp-768000000c-ÆÀjO€I>opp-1017600000c<§Xj†à‡ðopp-1248000000cJbøj!bàÄàopp-1324800000cNöØj!bàÄàopp-1516800000cZhˆj.àå°opp-1612800000c`!`j.àå°opp-1708800000ceÚ8j.àå°opp-1804800000ck“j> V0opp-table-cpu62operating-points-v2Xùopp-300000000cá£j!bà‡ðopp-652800000c&èðj!bà‡ðopp-825600000c15¨j!bà‡ðopp-979200000c:]hj!bà‡ðopp-1113600000cB`0j!bà‡ðopp-1267200000cK‡ðj> Äàopp-1555200000c\²xj> å°opp-1708800000ceÚ8j^èà'Popp-1843200000cmÝj^èà'Popp-1900800000cqKèj^èàV0opp-1996800000cwÀj^èàV0opp-2112000000c}â�j^èàV0opp-2208000000cƒ›hjn€V0opp-2323200000cŠy8jn€V0opp-2400000000c� j‚0 d@opp-2553600000c˜4Øj‚0 d@opp-table-qspi2operating-points-v2ù¿opp-75000000cxhÀxopp-150000000cðÑ€xopp-300000000cá£x opp-table-qup2operating-points-v2ù5opp-75000000cxhÀxopp-100000000cõáxopp-128000000c¡ x pmu2arm,armv8-pmuv3 †psci 2arm,psci-1.0smcreserved-memory ‘memory@80820000 €‚ 2qcom,cmd-db˜memory@80900000 €� ˜ù!memory@80b00000 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½)CQokayi2c@8800002qcom,geni-i2c ˆ@hse':Xdefaultf1 †Y Hg22+&*Ôqup-corequp-configqup-memory•&x Qdisabledspi@8800002qcom,geni-spi ˆ@hse':Xdefaultf34 †Y •&S50g22+&Ôqup-corequp-configQokay  6%tpm@0 2google,cr50 Xdefaultf7© 56†*serial@8800002qcom,geni-uart ˆ@hse':Xdefaultf8 †Y•&S50g22+&Ôqup-corequp-config Qdisabledi2c@8840002qcom,geni-i2c ˆ@@hse'<Xdefaultf9 †Z Hg22+&*Ôqup-corequp-configqup-memory•&x Qdisabledspi@8840002qcom,geni-spi ˆ@@hse'<Xdefaultf:; †Z •&S50g22+&Ôqup-corequp-config Qdisabledserial@8840002qcom,geni-uart ˆ@@hse'<Xdefaultf< †Z•&S50g22+&Ôqup-corequp-config Qdisabledi2c@8880002qcom,geni-i2c ˆ€@hse'>Xdefaultf= †[ Hg22+&*Ôqup-corequp-configqup-memory•&xQokayÜ€bridge@2d 2ti,sn65dsi86 -Xdefaultf>?»Ë6†  ×6hä@ð@ýA£A$hrefclk ùFports port@0 endpointBùàport@1 endpoint CùGaux-buspanel+D8E BF 2edp-panelùUportendpointGùCserial@8880002qcom,geni-uart ˆ€@hse'>XdefaultfH †[•&S50g22+&Ôqup-corequp-config Qdisabledi2c@88c0002qcom,geni-i2c ˆÀ@hse'@XdefaultfI †\ Hg22+&*Ôqup-corequp-configqup-memory•&x Qdisabledspi@88c0002qcom,geni-spi ˆÀ@hse'@XdefaultfJK †\ •&S50g22+&Ôqup-corequp-config Qdisabledserial@88c0002qcom,geni-uart ˆÀ@hse'@XdefaultsleepfL•&S50g22+&Ôqup-corequp-configQokayL\6)pMbluetooth2qcom,wcn3991-bt`NmOzP‡Q•0ÔŸi2c@8900002qcom,geni-i2c ‰@hse'BXdefaultfR †] Hg22+&*Ôqup-corequp-configqup-memory•&xQokayÜ€touchscreen@10 2hid-over-i2c XdefaultfST6† ¼UÂÙèDserial@8900002qcom,geni-uart ‰@hse'BXdefaultfV †]•&S50g22+&Ôqup-corequp-config Qdisabledi2c@8940002qcom,geni-i2c ‰@@hse'DXdefaultfW †^ Hg22+&*Ôqup-corequp-configqup-memory•&x QdisabledÜ€proximity@282semtech,sx9310 (óXdefaultfX6†èYZproximity-wifispi@8940002qcom,geni-spi ‰@@hse'DXdefaultf[\ †^ •&S50g22+&Ôqup-corequp-config Qdisabledserial@8940002qcom,geni-uart ‰@@hse'DXdefaultf] †^•&S50g22+&Ôqup-corequp-config Qdisabledgeniqup@ac00002qcom,geni-se-qup ¬` hm-ahbs-ahb'V'W ‘ ½)ÃQokayi2c@a800002qcom,geni-i2c ¨@hse'HXdefaultf^ †a Hg22+'_Ôqup-corequp-configqup-memory•&x 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†Ð»Ë7Lm6xy„Xdefaultf…†©‡TP_INT_ODLAP_RAM_ID0AP_SKU_ID2AP_RAM_ID1AP_RAM_ID2AP_TP_I2C_SDAAP_TP_I2C_SCLTS_RESET_LTS_INT_LEDP_BRIJ_IRQAP_EDP_BKLTENEDP_BRIJ_I2C_SDAEDP_BRIJ_I2C_SCLHUB_RST_LAMP_ENP_SENSOR_INT_LAP_SAR_SENSOR_SDAAP_SAR_SENSOR_SCLHP_IRQEN_PP3300_DX_EDPAP_BRD_ID2BRIJ_SUSPENDAP_BRD_ID0AP_H1_SPI_MISOAP_H1_SPI_MOSIAP_H1_SPI_CLKAP_H1_SPI_CS_LH1_AP_INT_ODLUART_AP_TX_DBG_RXUART_DBG_TX_AP_RXHP_I2C_SDAHP_I2C_SCLFORCED_USB_BOOTAMP_BCLKAMP_LRCLKAMP_DINPEN_PDCT_LHP_BCLKHP_LRCLKHP_DOUTHP_DINHP_MCLKAP_SKU_ID0AP_EC_SPI_MISOAP_EC_SPI_MOSIAP_EC_SPI_CLKAP_EC_SPI_CS_LAP_SPI_CLKAP_SPI_MOSIAP_SPI_MISOAP_FLASH_WP_LAP_SPI_CS0_LSD_CD_ODLUIM2_DATAUIM2_CLKUIM2_RSTUIM2_PRESENTUIM1_DATAUIM1_CLKUIM1_RSTEN_PP3300_CODECEN_PP3300_HUBDMIC_SELAP_SKU_ID1AP_RST_REQAP_BRD_ID1AP_EC_INT_R_LEDP_BRIJ_ENAP_TS_PEN_I2C_SDAAP_TS_PEN_I2C_SCLDP_HOT_PLUG_DETEC_IN_RW_ODLù6dp-hot-plug-det-state—gpio117œdp_hot¥ùâqspi-clk-state—gpio63 œqspi_clk²¥ùÀqspi-cs0-state—gpio68œqspi_cs¥ùÁqspi-cs1-state—gpio72œqspi_csqspi-data0-state—gpio64 œqspi_data¥ùÂqspi-data1-state—gpio65 œqspi_dataÁùÃqspi-data23-state—gpio66gpio67 œqspi_dataqup-i2c0-default-state—gpio34gpio35œqup00ù1qup-i2c1-default-state —gpio0gpio1œqup01ù9qup-i2c2-default-state—gpio15gpio16 œqup02_i2c²¥ù=qup-i2c3-default-state—gpio38gpio39œqup03ùIqup-i2c4-default-state—gpio115gpio116 œqup04_i2c²¥ùRqup-i2c5-default-state—gpio25gpio26œqup05²¥ùWqup-i2c6-default-state—gpio59gpio60œqup10ù^qup-i2c7-default-state —gpio6gpio7 œqup11_i2c²¥ùdqup-i2c8-default-state—gpio42gpio43œqup12ùhqup-i2c9-default-state—gpio46gpio47 œqup13_i2c²¥ùlqup-i2c10-default-state—gpio86gpio87œqup14ùqqup-i2c11-default-state—gpio53gpio54œqup15ùxqup-spi0-spi-state—gpio34gpio35gpio36œqup00²¥ù3qup-spi0-cs-state—gpio37œqup00qup-spi0-cs-gpio-state—gpio37œgpio²¥ù4qup-spi1-spi-state—gpio0gpio1gpio2œqup01ù:qup-spi1-cs-state—gpio3œqup01ù;qup-spi1-cs-gpio-state—gpio3œgpioqup-spi3-spi-state—gpio38gpio39gpio40œqup03ùJqup-spi3-cs-state—gpio41œqup03ùKqup-spi3-cs-gpio-state—gpio41œgpioqup-spi5-spi-state—gpio25gpio26gpio27œqup05ù[qup-spi5-cs-state—gpio28œqup05ù\qup-spi5-cs-gpio-state—gpio28œgpioqup-spi6-spi-state—gpio59gpio60gpio61œqup10²¥ù`qup-spi6-cs-state—gpio62œqup10qup-spi6-cs-gpio-state—gpio62œgpio²¥ùaqup-spi8-spi-state—gpio42gpio43gpio44œqup12ùiqup-spi8-cs-state—gpio45œqup12ùjqup-spi8-cs-gpio-state—gpio45œgpioqup-spi10-spi-state—gpio86gpio87gpio88œqup14²¥ùrqup-spi10-cs-state—gpio89œqup14qup-spi10-cs-gpio-state—gpio89œgpio²¥ùsqup-spi11-spi-state—gpio53gpio54gpio55œqup15ùyqup-spi11-cs-state—gpio56œqup15ùzqup-spi11-cs-gpio-state—gpio56œgpioqup-uart0-default-stateù8cts-pins—gpio34œqup00rts-pins—gpio35œqup00tx-pins—gpio36œqup00rx-pins—gpio37œqup00qup-uart1-default-stateù<cts-pins—gpio0œqup01rts-pins—gpio1œqup01tx-pins—gpio2œqup01rx-pins—gpio3œqup01qup-uart2-default-stateùHtx-pins—gpio15 œqup02_uartrx-pins—gpio16 œqup02_uartqup-uart3-default-stateùLcts-pins—gpio38œqup03Árts-pins—gpio39œqup03²¥tx-pins—gpio40œqup03²¥rx-pins—gpio41œqup03Ðqup-uart4-default-stateùVtx-pins—gpio115 œqup04_uartrx-pins—gpio116 œqup04_uartqup-uart5-default-stateù]cts-pins—gpio25œqup05rts-pins—gpio26œqup05tx-pins—gpio27œqup05rx-pins—gpio28œqup05qup-uart6-default-stateùccts-pins—gpio59œqup10rts-pins—gpio60œqup10tx-pins—gpio61œqup10rx-pins—gpio62œqup10qup-uart7-default-stateùgtx-pins—gpio6 œqup11_uartrx-pins—gpio7 œqup11_uartqup-uart8-default-stateùktx-pins—gpio44œqup12²¥rx-pins—gpio45œqup12²Ðqup-uart9-default-stateùptx-pins—gpio46 œqup13_uartrx-pins—gpio47 œqup13_uartqup-uart10-default-stateùwcts-pins—gpio86œqup14rts-pins—gpio87œqup14tx-pins—gpio88œqup14rx-pins—gpio89œqup14qup-uart11-default-stateù{cts-pins—gpio53œqup15rts-pins—gpio54œqup15tx-pins—gpio55œqup15rx-pins—gpio56œqup15sec-mi2s-active-state—gpio49gpio50gpio51œmi2s_1²Áùðpri-mi2s-active-state—gpio53gpio54gpio55gpio56œmi2s_0²Áùñpri-mi2s-mclk-active-state—gpio57 œlpass_ext²Áùòter-mi2s-active-state—gpio63gpio64gpio65gpio66œmi2s_2amp-en-state—gpio23œgpioÁùap-ec-int-l-state—gpio94œgpioÐùbap-edp-bklten-state—gpio12œgpio²¥Ýùap-suspend-l-neuter-state—gpio27œgpio¥ù†bios-flash-wp-l-state—gpio66œgpio¥ù…edp-brij-en-state—gpio104œgpio²¥ù>en-pp3300-codec-state—gpio83œgpio²¥ùen-pp3300-dx-edp-state—gpio30œgpio²¥ùen-pp3300-hub-state—gpio84œgpio²¥ùfp-rst-l-state—gpio22œgpio¥²ùufp-to-ap-irq-l-state—gpio4œgpio¥ùtfpmcu-boot0-state—gpio10œgpio¥ùvh1-ap-int-odl-state—gpio42œgpioÐù7hp-irq-state—gpio28œgpioÐùmpen-irq-l-state—gpio21œgpio¥pen-pdct-l-state-state—gpio52œgpio¥ùpen-rst-odl-state—gpio18œgpio¥²èp-sensor-int-l-state—gpio24œgpio¥ùXqspi-sleep-state—gpio63gpio64gpio65gpio68œgpioôùÄqup-uart3-sleep-stateùMcts-pins—gpio38œgpioÁrts-pins—gpio39œgpioÁtx-pins—gpio40œgpioÐrx-pins—gpio41œgpioÐtp-int-odl-state—gpio0œgpio¥ùets-int-l-state—gpio9œgpioÐùSts-reset-l-state—gpio8œgpio¥²ùTsdc1-on-stateù-clk-pins —sdc1_clk¥²cmd-pins —sdc1_cmdвdata-pins —sdc1_dataвrclk-pins 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