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QCS8550 AIM300 AIOTF2qcom,qcs8550-aim300-aiotqcom,qcs8550-aim300qcom,qcs8550qcom,sm8550chosen=serial0:115200n8clocksxo-board 2fixed-clockIV“àfîsleep-clk 2fixed-clockIVüf0bi-tcxo-div2-clkI2fixed-factor-clocknu€f/bi-tcxo-ao-div2-clkI2fixed-factor-clocknu€fÃcpus cpu@0Šcpu2arm,cortex-a510–nšpsci¨¹ÇpsciÚëþdfl2-cache2cache'3¨fl3-cache2cache'3fcpu@100Šcpu2arm,cortex-a510–nšpsci¨¹ÇpsciÚëþdfl2-cache2cache'3¨fcpu@200Šcpu2arm,cortex-a510–nšpsci¨ ¹ ÇpsciÚëþdfl2-cache2cache'3¨f cpu@300Šcpu2arm,cortex-a715–nšpsci¨ ¹ ÇpsciÚëþfl2-cache2cache'3¨f cpu@400Šcpu2arm,cortex-a715–nšpsci¨ ¹ÇpsciÚëþfl2-cache2cache'3¨f cpu@500Šcpu2arm,cortex-a710–nšpsci¨¹ÇpsciÚëþfl2-cache2cache'3¨fcpu@600Šcpu2arm,cortex-a710–nšpsci¨¹ÇpsciÚëþfl2-cache2cache'3¨fcpu@700Šcpu2arm,cortex-x3–nšpsci¨¹ÇpsciÚëfþLfl2-cache2cache'3¨fcpu-mapcluster0core0Acore1Acore2Acore3Acore4Acore5Acore6Acore7Aidle-statesEpscicpu-sleep-0-02arm,idle-stateRsilver-rail-power-collapseb@y&Šîš,«f(cpu-sleep-1-02arm,idle-stateRgold-rail-power-collapseb@yXŠšÈ«f)cpu-sleep-2-02arm,idle-stateRgoldplus-rail-power-collapseb@yôŠFš8«f*domain-idle-statescluster-sleep-02domain-idle-statebADyîŠ .š#¸f+cluster-sleep-12domain-idle-statebAÃDy ðŠ0š'¦f,firmwarescm2qcom,scm-sm8550qcom,scm¼�Ìinterconnect-02qcom,sm8550-clk-virtÚî f8interconnect-12qcom,sm8550-mc-virtÚî fopp-table-qup100mhz2operating-points-v2fSopp-75000000þxhÀ!opp-100000000þõá"opp-table-qup120mhz2operating-points-v2f=opp-75000000þxhÀ!opp-120000000þ'"opp-table-qup125mhz2operating-points-v2fQopp-75000000þxhÀ!opp-125000000þsY@"memory@a0000000Šmemory– pmu-a5102arm,cortex-a510-pmu#pmu-a7102arm,cortex-a710-pmu$pmu-a7152arm,cortex-a715-pmu%pmu-x32arm,cortex-x3-pmu&psci 2arm,psci-1.0¡smcpower-domain-cpu0¹'2(fpower-domain-cpu1¹'2(fpower-domain-cpu2¹'2(f power-domain-cpu3¹'2)f power-domain-cpu4¹'2)fpower-domain-cpu5¹'2)fpower-domain-cpu6¹'2)fpower-domain-cpu7¹'2*fpower-domain-cluster2+,f'reserved-memory Eaop-cmd-db-region@81c60000 2qcom,cmd-db–�ÆLadsp-mhi-region@81f00000–�ðLmpss-region@8a800000–Š€€Lf›q6-mpss-dtb-region@9b000000–›Lfœipa-fw-region@9b080000–›Lipa-gsi-region@9b090000–›  Lgpu-micro-code-region@9b09a000–›   Lf”spss-region@9b100000–›Lcamera-region@9b300000–›0€Lvideo-region@9bb00000–›°pLf¶cvp-region@9c200000–œ pLcdsp-region@9c900000–œ�Lfùq6-cdsp-dtb-region@9e900000–ž�Lfúq6-adsp-dtb-region@9e980000–ž˜Lf£adspslpi-region@9ea00000–ž Lf¢mpss-dsm-region@d4d00000–ÔÐ0Lf�aop-image-region@81c00000–�ÀLaop-config-region@81c80000L–�Èsmem-region@81d00000 2qcom,smem–�Ð S-Lspu-secure-shared-memory-region@9b280000–›(Lsmp2p-adsp 2qcom,smp2p[»­e. y.€�master-kernelŸmaster-kernel¯f¤slave-kernel Ÿslave-kernelÆÛf smp2p-cdsp 2qcom,smp2p[^°e. y.€�master-kernelŸmaster-kernel¯fûslave-kernel Ÿslave-kernelÆÛf÷smp2p-modem 2qcom,smp2p[³¬e. y.€�master-kernelŸmaster-kernel¯fžslave-kernel Ÿslave-kernelÆÛfšipa-ap-to-modemŸipa¯f™ipa-modem-to-apŸipaÆÛf˜soc@0 2simple-busEì clock-controller@1000002qcom,sm8550-gcc–BI÷<n/01223334f6mailbox@4080002qcom,sm8550-ipccqcom,ipcc–@€åÆÛf.dma-controller@800000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma–€ÀLMNOPQRSTUVW (> 956@ Mdisabledf;geniqup@8c00002qcom,geni-se-qup–Œ E Tm-ahbs-ahbn6�6‚ 95#@  Mdisabledi2c@8800002qcom,geni-i2c–ˆ@Tsen6o`defaultn7u HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š= Mdisabledspi@8800002qcom,geni-spi–ˆ@Tsen6ou`defaultn>?HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š=  Mdisabledi2c@8840002qcom,geni-i2c–ˆ@@Tsen6q`defaultn@G HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š= Mdisabledspi@8840002qcom,geni-spi–ˆ@@Tsen6qG`defaultnABHÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š=  Mdisabledi2c@8880002qcom,geni-i2c–ˆ€@Tsen6s`defaultnCH HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š= Mdisabledspi@8880002qcom,geni-spi–ˆ€@Tsen6sH`defaultnDEHÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š=  Mdisabledi2c@88c0002qcom,geni-i2c–ˆÀ@Tsen6u`defaultnFI HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š= Mdisabledspi@88c0002qcom,geni-spi–ˆÀ@Tsen6uI`defaultnGHHÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š=  Mdisabledi2c@8900002qcom,geni-i2c–‰@Tsen6w`defaultnIJ HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š= Mdisabledspi@8900002qcom,geni-spi–‰@Tsen6wJ`defaultnJKHÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š=  Mdisabledi2c@8940002qcom,geni-i2c–‰@@Tsen6y`defaultnLK HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š= Mdisabledspi@8940002qcom,geni-spi–‰@@Tsen6yK`defaultnMNHÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<š=  Mdisabledserial@8980002qcom,geni-uart–‰€@Tsen6{`defaultnOPÍ0Ì889:xqup-corequp-config¹<šQ Mdisabledi2c@89c0002qcom,geni-i2c–‰À@Tsen6}`defaultnRÎ HÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<šS Mdisabledspi@89c0002qcom,geni-spi–‰À@Tsen6}Î`defaultnTUHÌ889:xqup-corequp-configqup-memory ‹;;�txrx¹<šS  Mdisabledgeniqup@9c00002qcom,geni-se-i2c-master-hub–œ Ts-ahbn6Z E Mdisabledi2c@9800002qcom,geni-i2c-master-hub–˜@Tsecoren6F6E`defaultnVÐ 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@9840002qcom,geni-i2c-master-hub–˜@@Tsecoren6H6E`defaultnWÑ 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@9880002qcom,geni-i2c-master-hub–˜€@Tsecoren6J6E`defaultnXÒ 0Ì889:xqup-corequp-config¹<!Mokaytypec-mux@42 2fcs,fsa4480–B®Y¹ÅportendpointØZftypec-retimer@1c2onnn,nb7vpq904m–®[Åèports port@0–endpointØ\fport@1–endpoint÷Ø]fÝi2c@98c0002qcom,geni-i2c-master-hub–˜À@Tsecoren6L6E`defaultn^Ó 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@9900002qcom,geni-i2c-master-hub–™@Tsecoren6N6E`defaultn_Ô 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@9940002qcom,geni-i2c-master-hub–™@@Tsecoren6P6E`defaultn`Õ 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@9980002qcom,geni-i2c-master-hub–™€@Tsecoren6R6E`defaultnaÖ 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@99c0002qcom,geni-i2c-master-hub–™À@Tsecoren6T6E`defaultnb× 0Ì889:xqup-corequp-config¹<! Mdisabledi2c@9a00002qcom,geni-i2c-master-hub–š@Tsecoren6V6E`defaultncØ 0Ì889:xqup-corequp-config¹<! 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Mdisableddma-controller@a00000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma– À%&'()* ( 95¶@ Mdisabledfggeniqup@ac00002qcom,geni-se-qup–¬ E Tm-ahbs-ahbn66€ 95£Ì88 xqup-core@ Mokayi2c@a800002qcom,geni-i2c–¨@Tsen6]`defaultnea HÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<š= Mdisabledspi@a800002qcom,geni-spi–¨@Tsen6]a`defaultnhiHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<š=  Mdisabledi2c@a840002qcom,geni-i2c–¨@@Tsen6_`defaultnjb HÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<š= Mdisabledspi@a840002qcom,geni-spi–¨@@Tsen6_b`defaultnklHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<š=  Mdisabledi2c@a880002qcom,geni-i2c–¨€@Tsen6a`defaultnmc HÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS Mdisabledspi@a880002qcom,geni-spi–¨€@Tsen6ac`defaultnnoHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledi2c@a8c0002qcom,geni-i2c–¨À@Tsen6c`defaultnpd HÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS Mdisabledspi@a8c0002qcom,geni-spi–¨À@Tsen6cd`defaultnqrHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledi2c@a900002qcom,geni-i2c–©@Tsen6e`defaultnse HÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS Mdisabledspi@a900002qcom,geni-spi–©@Tsen6ee`defaultntuHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledi2c@a940002qcom,geni-i2c–©@@Tsen6g`defaultnvfHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledspi@a940002qcom,geni-spi–©@@Tsen6gf`defaultnwxHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledi2c@a980002qcom,geni-i2c–©€@Tsen6i`defaultnykHÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledspi@a980002qcom,geni-spi–©€@Tsen6ik`defaultnz{HÌ889:fxqup-corequp-configqup-memory ‹gg�txrx¹<šS  Mdisabledserial@a9c0002qcom,geni-debug-uart–©À@Tsen6k`defaultn|Cxqup-corequp-config0Ì889:¹<šSMokayinterconnect@15000002qcom,sm8550-cnoc-main–P0€Úî f~interconnect@16000002qcom,sm8550-config-noc–`bÚî f:interconnect@16800002qcom,sm8550-system-noc–hЀÚî interconnect@16c00002qcom,sm8550-pcie-anoc–l"Ún66 î f}interconnect@16e00002qcom,sm8550-aggre1-noc–nDÚn66î ffinterconnect@17000002qcom,sm8550-aggre2-noc–päÚn î finterconnect@17800002qcom,sm8550-mmss-noc–x¸Úî fµrng@10c30002qcom,sm8550-trngqcom,trng– 0pcie@1c00000Špci2qcom,pcie-sm8550P–À0`` ¨``parfdbielbiatuconfig 8E` `0`0Ð ÿ@'��Ž��‘’“”Œ/1msi0msi1msi2msi3msi4msi5msi6msi7globalÛA°T•–—˜8n6"6$6%6*6+66=Tauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0Ì}9~xpcie-memcpu-pcie b j55t6{pci¹6‡1Œpciephyš€Mokay –�^ ¢�`n‚`defaultopp-table2operating-points-v2f€opp-2500000-1þ&% !­Ð�»opp-5000000-1þLK@!­¡ »opp-5000000-2þLK@!­¡ »opp-10000000-2þ˜–€!­B@»opp-8000000-3þzƒ­´»opp-16000000-3þô$ƒ­ h»pcie@0Špci– ÿ Ephy@1c06000 2qcom,sm8550-qmp-gen3x2-pcie-phy–À` (n6"6$6&6(Tauxcfg_ahbrefrchngpipet6{phyÅ6&Õõá¹6Iêpcie0_pipe_clkýMokay„…f1pcie@1c08000Špci2qcom,pcie-sm8550P–À€0@@ ¨@@parfdbielbiatuconfig 8E@ @0@0Ð ÿ@'�34589:vw2/1msi0msi1msi2msi3msi4msi5msi6msi7globalÛA°T²³¶·@n6,6.6/6667666 ITauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axiÅ6,Õ$ø0Ì}9~ xpcie-memcpu-pcie b€� j5€5�t66 {pcilink_down¹6‡2Œpciephyš†Mokay –�a ¢�cn‡`defaultopp-table2operating-points-v2f†opp-2500000-1þ&% !­Ð�»opp-5000000-1þLK@!­¡ »opp-5000000-2þLK@!­¡ »opp-10000000-2þ˜–€!­B@»opp-8000000-3þzƒ­´»opp-16000000-3þô$ƒ­ h»opp-16000000-4þô$ƒ­ h»opp-32000000-4þèHƒ­<лpcie@0Špci– ÿ Ephy@1c0e000 2qcom,sm8550-qmp-gen4x2-pcie-phy–Àà (n606.6264Tauxcfg_ahbrefrchngpipet6 6 {phyphy_nocsrÅ62Õõá¹6Iêpcie1_pipe_clkýMokayˆ…(„f2dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0–Ü@€9AN[95€5�f‰crypto@1dfa000)2qcom,sm8550-qceqcom,sm8150-qceqcom,qce–ß `‹‰‰�rxtx95€5�Ìxmemoryphy@1d800002qcom,sm8550-qmp-ufs-phy–Ø n6�Trefref_auxqref¹6tŠ{ufsphyIýMokay‹…f3ufshc@1d84000+2qcom,sm8550-ufshcqcom,ufshcjedec,ufs-2.0–Ø@0 ‡3Œufsphyt÷t6{rst¹6ƒ 95`@šŒ0Ìf9:#xufs-ddrcpu-ufsnTcore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@n6Š66‰6™6—6“6•ˆ�Mokay ‘�Ò®Ž�Ö ®�ºO€Ì�fŠopp-table2operating-points-v2fŒopp-75000000@þxhÀxhÀ!opp-150000000@þðÑ€ðÑ€"opp-300000000@þá£á£ƒcrypto@1d88000;2qcom,sm8550-inline-crypto-engineqcom,inline-crypto-engine–Ø€€n6�f�hwlock@1f400002qcom,tcsr-mutex–ôÛf-clock-controller@1fc00002qcom,sm8550-tcsrsyscon–ünI÷fgpu@3d00000!2qcom,adreno-43050a01qcom,adreno0–ÐÙàÖ#kgsl_3d0_reg_memorycx_memcx_dbgc,9‘‘š’é“Ì9xgfx-mem Mdisabledfzap-shaderò”opp-table2operating-points-v2f’opp-680000000þ(‡ú»À­ûÅ opp-615000000þ$¨'À»�­½õÂopp-550000000þ ÈU€»€­£ opp-475000000þOìÀ»P­\¯jopp-401000000þæÆ@»@­\¯jopp-348000000þ¾»<­\¯jopp-295000000þ•WÀ»8­\¯jopp-220000000þ ï»4­ šŽgmu@3d6a000&2qcom,adreno-gmu-740.1qcom,adreno-gmu0–Ö PÕ (gmursccgmu_pdc 011hfigmu8n•••6 6 ••!Tahbgmucxoaximemnochubdemet¹••Çcxgx 9‘–š—f“opp-table2operating-points-v2f—opp-500000000þÍe»€opp-200000000þ ë»@clock-controller@3d900002qcom,sm8550-gpucc–Ù n/66I÷f•iommu@3da0000@2qcom,sm8550-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500–Ú  ¡¥¦§¨©ª«¬­®¯¦Ü>?@A“•˜™šœ�» n• 6 6!•Thlosbusifaceahb¹•@f‘ipa@3f400002qcom,sm8550-ipa95 5¢0–ôõPà@Àipa-regipa-sharedgsi@eް˜˜(1ipagsiipa-clock-queryipa-setup-readyn Tcore0Ì9:xmemoryconfig–)™™*:ipa-clock-enabled-validipa-clock-enabled Mdisabledremoteproc@40800002qcom,sm8550-mpss-pas–Peššššš01wdogfatalreadyhandoverstop-ackshutdown-acknTxo¹<< ÇcxmssÌ ò›œ�–)ž:stop Mdisabledglink-edgee. y.Pmpss�remoteproc@68000002qcom,sm8550-adsp-pas–€<eŸ    #1wdogfatalreadyhandoverstop-acknTxo¹<<ÇlcxlmxÌ¡ò¢£–)¤:stopMokay0Vqcom/qcs8550/adsp.mbnqcom/qcs8550/adsp_dtb.mbnglink-edgee. y.Plpass�fastrpc 2qcom,fastrpcdfastrpcglink-apps-dspPadspx compute-cb@32qcom,fastrpc-compute-cb–95€5c@compute-cb@42qcom,fastrpc-compute-cb–95€5d@compute-cb@52qcom,fastrpc-compute-cb–95€5e@compute-cb@62qcom,fastrpc-compute-cb–95€5f@compute-cb@72qcom,fastrpc-compute-cb–95€5g@gpr 2qcom,gpr dadsp_apps�› service@1 2qcom,q6apm–¨¹avs/audiomsm/adsp/audio_pddais2qcom,q6apm-dais95€5abedais2qcom,q6apm-lpass-dais¨service@2 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1corewakeupn­TifacePTXn®`defaultÐß´*ÿÿÿÿ<ÿÿÿÿMÿÿÿÿdÿÿÿÿÿÿÿÿœ ¨Mokaycodec@6d440002qcom,sm8550-lpass-va-macro–Ô@$n¥9¥f¥gTmclkmacrodcodecIêfsgen¨f¦pinctrl@6e800002qcom,sm8550-lpass-lpi-pinctrl –è%ÍÝé¯n¥f¥g Tcoreaudiof¯tx-swr-active-statef®clk-pinsõgpio0 úswr_tx_clkdata-pinsõgpio1gpio2gpio14 úswr_tx_data)rx-swr-active-statefªclk-pinsõgpio3 úswr_rx_clkdata-pins õgpio4gpio5 úswr_rx_data)dmic01-default-stateclk-pinsõgpio6 údmic1_clk7data-pinsõgpio7 údmic1_dataCdmic23-default-stateclk-pinsõgpio8 údmic2_clk7data-pinsõgpio9 údmic2_dataCwsa-swr-active-statef¬clk-pinsõgpio10 úwsa_swr_clkdata-pinsõgpio11 úwsa_swr_data)wsa2-swr-active-statef¨clk-pinsõgpio15 úwsa2_swr_clkdata-pinsõgpio16úwsa2_swr_data)interconnect@74000002qcom,sm8550-lpass-lpiaon-noc–@�€Úî interconnect@74300002qcom,sm8550-lpass-lpicx-noc–C¢Úî f¡interconnect@7e400002qcom,sm8550-lpass-ag-noc–äà€Úî mmc@8804000$2qcom,sm8550-sdhciqcom,sdhci-msm-v5–€@ Ïß1hc_irqpwr_irqn6ƒ6„/Tifacecorexo 95@Pd,`€h¹<š°0Ì9:xsdhc-ddrcpu-sdhcpz<4`@ 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temp-alarm@24002qcom,spmi-temp-alarm–$ $ fpmic@a2qcom,pmr735dqcom,spmi-pmic–  temp-alarm@a002qcom,spmi-temp-alarm–   fgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio–ˆÍéìÝÆÛfìpmic@b2qcom,pmr735dqcom,spmi-pmic–  temp-alarm@a002qcom,spmi-temp-alarm–   fgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio–ˆÍéíÝÆÛfípinctrl@f1000002qcom,sm8550-tlmm–0ÐÍÝÆÛé�Ó –Ÿ ¤ f�cam0-default-statemclk-pinsõgpio100 úcam_mclkcam0-sleep-statemclk-pinsõgpio100 úcam_mclk ¹cam1-default-statemclk-pinsõgpio101 úcam_mclkcam1-sleep-statemclk-pinsõgpio101 úcam_mclk ¹cam2-default-statemclk-pinsõgpio102 úcam_mclkcam2-sleep-statemclk-pinsõgpio102 úcam_mclk ¹cam3-default-statemclk-pinsõgpio103 úcam_mclkcam3-sleep-statemclk-pinsõgpio103 úcam_mclk ¹cam4-default-statemclk-pinsõgpio104úcam_aon_mclk4cam4-sleep-statemclk-pinsõgpio104úcam_aon_mclk4 ¹cam5-default-statemclk-pinsõgpio105 úcam_mclkcam5-sleep-statemclk-pinsõgpio105 úcam_mclk ¹cam6-default-statemclk-pinsõgpio106 úcam_mclkcam6-sleep-statemclk-pinsõgpio106 úcam_mclk ¹cam7-default-statemclk-pinsõgpio107 úcam_mclkcam7-sleep-statemclk-pinsõgpio107 úcam_mclk ¹cci0-0-default-statef¹sda-pinsõgpio110 úcci_i2c_sda U˜scl-pinsõgpio111 úcci_i2c_scl U˜cci0-0-sleep-statef»sda-pinsõgpio110 úcci_i2c_sda ¹scl-pinsõgpio111 úcci_i2c_scl ¹cci0-1-default-statefºsda-pinsõgpio112 úcci_i2c_sda U˜scl-pinsõgpio113 úcci_i2c_scl U˜cci0-1-sleep-statef¼sda-pinsõgpio112 úcci_i2c_sda ¹scl-pinsõgpio113 úcci_i2c_scl ¹cci1-0-default-statef½sda-pinsõgpio114 úcci_i2c_sda U˜scl-pinsõgpio115 úcci_i2c_scl U˜cci1-0-sleep-statef¾sda-pinsõgpio114 úcci_i2c_sda ¹scl-pinsõgpio115 úcci_i2c_scl ¹cci2-0-default-statef¿sda-pinsõgpio74 úcci_i2c_sda U˜scl-pinsõgpio75 úcci_i2c_scl U˜cci2-0-sleep-statefÁsda-pinsõgpio74 úcci_i2c_sda ¹scl-pinsõgpio75 úcci_i2c_scl ¹cci2-1-default-statefÀsda-pinsõgpio0 úcci_i2c_sda U˜scl-pinsõgpio1 úcci_i2c_scl U˜cci2-1-sleep-statefÂsda-pinsõgpio0 úcci_i2c_sda ¹scl-pinsõgpio1 úcci_i2c_scl ¹hub-i2c0-data-clk-stateõgpio16gpio17 úi2chub0_se0 UfVhub-i2c1-data-clk-stateõgpio18gpio19 úi2chub0_se1 UfWhub-i2c2-data-clk-stateõgpio20gpio21 úi2chub0_se2 UfXhub-i2c3-data-clk-stateõgpio22gpio23 úi2chub0_se3 Uf^hub-i2c4-data-clk-state õgpio4gpio5 úi2chub0_se4 Uf_hub-i2c5-data-clk-state õgpio6gpio7 úi2chub0_se5 Uf`hub-i2c6-data-clk-state õgpio8gpio9 úi2chub0_se6 Ufahub-i2c7-data-clk-stateõgpio10gpio11 úi2chub0_se7 Ufbhub-i2c8-data-clk-stateõgpio206gpio207 úi2chub0_se8 Ufchub-i2c9-data-clk-stateõgpio84gpio85 úi2chub0_se9 Ufdpcie0-default-statef‚perst-pinsõgpio94úgpio ¹clkreq-pinsõgpio95úpcie0_clk_req_n Uwake-pinsõgpio96úgpio Upcie1-default-statef‡perst-pinsõgpio97úgpio ¹clkreq-pinsõgpio98úpcie1_clk_req_n Uwake-pinsõgpio99úgpio Uqup-i2c0-data-clk-stateõgpio28gpio29 úqup1_se0 U˜fequp-i2c1-data-clk-stateõgpio32gpio33 úqup1_se1 U˜fjqup-i2c2-data-clk-stateõgpio36gpio37 úqup1_se2 U˜fmqup-i2c3-data-clk-stateõgpio40gpio41 úqup1_se3 U˜fpqup-i2c4-data-clk-stateõgpio44gpio45 úqup1_se4 U˜fsqup-i2c5-data-clk-stateõgpio52gpio53 úqup1_se5 U˜fvqup-i2c6-data-clk-stateõgpio48gpio49 úqup1_se6 U˜fyqup-i2c8-data-clk-statef7scl-pinsõgpio57úqup2_se0_l1_mira U˜sda-pinsõgpio56úqup2_se0_l0_mira U˜qup-i2c9-data-clk-stateõgpio60gpio61 úqup2_se1 U˜f@qup-i2c10-data-clk-stateõgpio64gpio65 úqup2_se2 U˜fCqup-i2c11-data-clk-stateõgpio68gpio69 úqup2_se3 U˜fFqup-i2c12-data-clk-state õgpio2gpio3 úqup2_se4 U˜fIqup-i2c13-data-clk-stateõgpio80gpio81 úqup2_se5 U˜fLqup-i2c15-data-clk-stateõgpio72gpio106 úqup2_se7 U˜fRqup-spi0-cs-stateõgpio31 úqup1_se0fiqup-spi0-data-clk-stateõgpio28gpio29gpio30 úqup1_se0fhqup-spi1-cs-stateõgpio35 úqup1_se1flqup-spi1-data-clk-stateõgpio32gpio33gpio34 úqup1_se1fkqup-spi2-cs-stateõgpio39 úqup1_se2foqup-spi2-data-clk-stateõgpio36gpio37gpio38 úqup1_se2fnqup-spi3-cs-stateõgpio43 úqup1_se3frqup-spi3-data-clk-stateõgpio40gpio41gpio42 úqup1_se3fqqup-spi4-cs-stateõgpio47 úqup1_se4fuqup-spi4-data-clk-stateõgpio44gpio45gpio46 úqup1_se4ftqup-spi5-cs-stateõgpio55 úqup1_se5fxqup-spi5-data-clk-stateõgpio52gpio53gpio54 úqup1_se5fwqup-spi6-cs-stateõgpio51 úqup1_se6f{qup-spi6-data-clk-stateõgpio48gpio49gpio50 úqup1_se6fzqup-spi8-cs-stateõgpio59úqup2_se0_l3_miraf?qup-spi8-data-clk-stateõgpio56gpio57gpio58úqup2_se0_l2_miraf>qup-spi9-cs-stateõgpio63 úqup2_se1fBqup-spi9-data-clk-stateõgpio60gpio61gpio62 úqup2_se1fAqup-spi10-cs-stateõgpio67 úqup2_se2fEqup-spi10-data-clk-stateõgpio64gpio65gpio66 úqup2_se2fDqup-spi11-cs-stateõgpio71 úqup2_se3fHqup-spi11-data-clk-stateõgpio68gpio69gpio70 úqup2_se3fGqup-spi12-cs-stateõgpio119 úqup2_se4fKqup-spi12-data-clk-stateõgpio2gpio3gpio118 úqup2_se4fJqup-spi13-cs-stateõgpio83 úqup2_se5fNqup-spi13-data-clk-stateõgpio80gpio81gpio82 úqup2_se5fMqup-spi15-cs-stateõgpio75 úqup2_se7fUqup-spi15-data-clk-stateõgpio72gpio106gpio74 úqup2_se7fTqup-uart7-default-stateõgpio26gpio27 úqup1_se7f|qup-uart14-default-stateõgpio78gpio79 úqup2_se6 UfOqup-uart14-cts-rts-stateõgpio76gpio77 úqup2_se6 ¹fPsdc2-sleep-stateclk-pins õsdc2_clkcmd-pins õsdc2_cmd Udata-pins õsdc2_data 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clock-controller2qcom,sm8550-rpmh-clkITxonîfpower-controller2qcom,sm8550-rpmhpdšïf<opp-table2operating-points-v2fïopp-16»opp-48»0f±opp-52»4opp-56»8fÍopp-60»<opp-64»@f!opp-80»Popp-128»€f"opp-144»�opp-192»Àf²opp-256»fƒopp-320»@opp-336»Popp-384»€f·opp-416» regulators-02qcom,pm8550-rpmh-regulators Pb ]ð rY ˆñ –Y ¨Y ¹Y Êñ Ùð èð ÷ò ó óbob1 &vreg_bob1 52K M