Ð þíÖ:8¶è(R¶°.radxa,nio-12lmediatek,mt8395mediatek,mt8195 +7Radxa NIO 12L =embeddedaliasesJ/soc/dp-intf@1c015000S/soc/dp-intf@1c113000\/soc/dpi@1c112000a/soc/mailbox@10320000f/soc/mailbox@10330000k/soc/hdmi-tx@1c300000q/soc/hdr-engine@1c114000x/soc/mutex@1c016000/soc/mutex@1c101000†/soc/vpp-merge@1c10c000�/soc/vpp-merge@1c10d000”/soc/vpp-merge@1c10e000›/soc/vpp-merge@1c10f000¢/soc/vpp-merge@1c110000©/soc/dma-controller@1c104000´/soc/dma-controller@1c105000¿/soc/dma-controller@1c106000Ê/soc/dma-controller@1c107000Õ/soc/dma-controller@1c108000à/soc/dma-controller@1c109000ë/soc/dma-controller@1c10a000ö/soc/dma-controller@1c10b000/soc/i2c@11e02000/soc/i2c@11e03000 /soc/i2c@11e04000/soc/i2c@11e00000/soc/i2c@11e01000/soc/ethernet@11021000$/soc/serial@11001100,/soc/serial@110012004/soc/spi@110100009/soc/spi@11012000cpus+cpu@0>cpuarm,cortex-a55JNpsci\pec3@€4“£€°@€Ï€Ü@î€û & cpu@100>cpuarm,cortex-a55JNpsci\pec3@€4“£€°@€Ï€Ü@î€û & cpu@200>cpuarm,cortex-a55JNpsci\pec3@€4“£€°@€Ï€Ü@î€û & cpu@300>cpuarm,cortex-a55JNpsci\pec3@€4“£€°@€Ï€Ü@î€û &cpu@400>cpuarm,cortex-a78JNpsci\p�fÔÀ€“£°@ÂÏÜ@îû   &cpu@500>cpuarm,cortex-a78JNpsci\p�fÔÀ€“£°@ÂÏÜ@îû   &cpu@600>cpuarm,cortex-a78JNpsci\p�fÔÀ€“£°@ÂÏÜ@îû   &cpu@700>cpuarm,cortex-a78JNpsci\p�fÔÀ€“£°@ÂÏÜ@îû   &cpu-mapcluster0core0. core1. core2. core3.core4.core5.core6.core7.idle-states2pscicpu-retention-larm,idle-state?Vg2x_ˆD&cpu-retention-barm,idle-state?Vg-xŒˆä&cpu-off-larm,idle-state?Vg7x›ˆH&cpu-off-barm,idle-state?Vg2xȈè&l2-cache0cache™¥²@Äû¥&l2-cache1cache™¥²@Äû¥& l3-cachecache™¥ ²@Ä¥&dsu-pmu arm,dsu-pmu³ ¾ Ãfaildmic-codec dmic-codecÊ×2&Ümt8195-soundçÃokaymediatek,mt8195_mt6359 7mt8395-evkùdefault,HeadphoneHeadphone LHeadphoneHeadphone R&Ýheadphone-dai-link -DL_SRC_BEcodec7hdmi-dai-link -ETDM3_OUT_BEcodec7fixed-factor-clock-13mfixed-factor-clockANU_jclk13m&0oscillator-26m fixed-clockApŒº€jclk26m&oscillator-32k fixed-clockAp€jclk32k&Þperformance-controller@11bc10mediatek,cpufreq-hw J¼ ½0 }&opp-table-gpuoperating-points-v2—&~opp-390000000¢>퀩 ‰hopp-410000000¢p€© ¡Òopp-431000000¢°‰À© ¡Òopp-473000000¢1h@© º<opp-515000000¢²FÀ© º<opp-556000000¢!#ã© Ò¦opp-598000000¢#¤Á€© ëopp-640000000¢&% © ëopp-670000000¢'ïc€© äopp-700000000¢)¹'© L¸opp-730000000¢+‚ꀩ }Œopp-760000000¢-L®© ®`opp-790000000¢/q€© ß4opp-820000000¢0à5© opp-850000000¢2©ø€© @Üopp-880000000¢4s¼© q°pmu-a55arm,cortex-a55-pmu ³pmu-a78arm,cortex-a78-pmu ³psci arm,psci-1.0Usmctimerarm,armv8-timer @³   &ßsoc+ simple-bus·¾interrupt-controller@c000000 arm,gic-v3ÉÚ ñ J   ³ &ppi-partitionsinterrupt-partition-0 &interrupt-partition-1&syscon@10000000 mediatek,mt8195-topckgensysconJA&syscon@10001000#mediatek,mt8195-infracfg_aosysconJA& syscon@10003000mediatek,mt8195-pericfgsysconJ0A&Ipinctrl@10005000mediatek,mt8195-pinctrl€JPÑÓÔâëô°Biocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleint&6B�ñ³ëÉN&audio-default-pins&pins-cmd-datrFEGHIJKdsi0-backlight-pins&Øpins-backlight-enrkyeth-default-pins&Epins-ccrUVWX…pins-mdiorYZ”pins-powerr[\ypins-rstr]pins-rxdrQRSTpins-txdrMNOP…eth-sleep-pins&Fpins-ccrUVWXpins-mdiorYZ¡®pins-rxdrQRSTpins-txdrMNOPgpio-keys-pins&àpinsrj¼”hdmi-vreg-pins&jpins-pwrr¡hdmi-pins&Èpins-hotplugr Épins-ddcr"#… pins-cecr!¡i2c2-pins&lpins-busr  ¼è…Øèi2c4-pins&opins-busr¼èØèi2c6-pins&dpinsr¡mmc0-default-pins&Npins-clkrzÉf…pins-cmd-dat$r~}|{wvuty¼e…”pins-rstrx¼e…mmc0-uhs-pins&Opins-clkrzÉf…pins-cmd-dat$r~}|{wvuty¼e…”pins-dsrÉf…pins-rstrx¼e…mmc1-default-pins&Rpins-clkroÉf…pins-cmd-datrnpqrs¼e…”mmc1-detect-pins&Spins-insertr�¼mt6360-pins&epins-irqrde”¼panel-pins&ápins-rstrl¼pcie0-default-pins&_pins-bus r¼pcie1-default-pins&bpins-bus r¡pwm0-pins&âpins-disp-pwmraspi1-default-pins&?pins-busrˆ‰Š‹¡spi2-default-pins&@pins-busrŒ�Ž�¡touch-pins&ãpins-touch-intr„”¡pins-touch-rstr…yuart0-pins&:pins-busrbcuart1-pins&;pins-busrfgusb3p0-default-pins&Jpins-vbusr?”usb2p0-default-pins&Zpins-iddigr‚”¼pins-vbusrƒðwifi-vreg-pins&Úpins-wifi-pmu-enrAypins-wifi-vreg-enrCsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfdJ`&äpower-controller!mediatek,mt8195-power-controller+û&3power-domain@8J+û&åpower-domain@9J Nmfgalt) +û!&æpower-domain@10J ûpower-domain@11J ûpower-domain@12J ûpower-domain@13J ûpower-domain@14Jûpower-domain@15JØN @AKà" " """"""""""""""""" vppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-18) +ûpower-domain@16J8Nâ#$#%#&#'#(#)Dvdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-5) +ûpower-domain@17JNá$$vppsys1vppsys1-0vppsys1-1) ûpower-domain@22J N%%%%$wepsys-0wepsys-1wepsys-2wepsys-3) ûpower-domain@23JN&vdec0-0) +ûpower-domain@24JN'vdec1-0) ûpower-domain@25JN(vdec2-0) ûpower-domain@26JN) venc0-larb) +ûpower-domain@27JN* venc1-larb) ûpower-domain@18J Nã+++&vdosys1vdosys1-0vdosys1-1vdosys1-2) +ûpower-domain@19J) ûpower-domain@20J) ûpower-domain@21JNQhdmi_txûpower-domain@28JN,,  img-0img-1) +ûpower-domain@29Jûpower-domain@30JN,-ipeipe-0ipe-1) ûpower-domain@31J(N.....cam-0cam-1cam-2cam-3cam-4) +ûpower-domain@32J ûpower-domain@33J!ûpower-domain@34J"ûpower-domain@0J) ûpower-domain@1J) ûpower-domain@2Jûpower-domain@3Jûpower-domain@4JN57csi_rx_topcsi_rx_top1ûpower-domain@5JN/ etherûpower-domain@6JNXn adspadsp1+) ûpower-domain@7J Ng"n 2audioaudio1audio2audio3) ûwatchdog@10007000mediatek,mt8195-wdt;Jp&8syscon@1000c000"mediatek,mt8195-apmixedsyssysconJÀA&timer@10017000,mediatek,mt8195-timermediatek,mt6765-timerJp³ N0&çpwrap@10024000mediatek,mt8195-pwrapsysconJ@pwrap³óN   spiwrapS$cË&èpmicmediatek,mt6359ñÉz ‹Þ&adcmediatek,mt6359-auxadcŸ&éaudio-codecmediatek,mt6359-codec&êregulatorsmediatek,mt6359-regulatorbuck_vs1±vs1À 5Ø!‘Àð &ëbuck_vgpu11±vgpu11À€Ø7 ˆðÈ 5 &ìbuck_vmodem±vmodemÀ€ØÈà *ðÈ&íbuck_vpu±vpuÀ€Ø7 ˆðÈ 5 &îbuck_vcore±vcoreÀ€ØÖ  ˆðÈ 5 &buck_vs2±vs2À 5Øjð &ïbuck_vpa±vpaÀ¡ Ø7±Ðð,&ðbuck_vproc2±vproc2À€Ø7 LðÈ 5 &ñbuck_vproc1±vproc1À€Ø7 LðÈ 5 &òbuck_vcore_sshub ±vcore_sshubÀ€Ø7&óbuck_vgpu11_sshub ±vgpu11_sshubÀ€Ø7&ôldo_vaud18±vaud18Àw@Øw@ðð &õldo_vsim1±vsim1Àð Ø/M`&öldo_vibr±vibrÀO€Ø2Z &mldo_vrf12±vrf12ÀÈàØÖ  &÷ldo_vusb±vusbÀ-ÆÀØ-ÆÀðÀ &Kldo_vsram_proc2 ±vsram_proc2À¡ ؽ¶ Lðð &øldo_vio18±vio18Àð ØýàðÀ &ùldo_vcamio±vcamioÀð Øýà &úldo_vcn18±vcn18Àw@Øw@ðð&ûldo_vfe28±vfe28À*¹€Ø*¹€ðx&üldo_vcn13±vcn13À » ØÖ &ýldo_vcn33_1_bt ±vcn33_1_btÀ*¹€Ø5gà&þldo_vcn33_1_wifi ±vcn33_1_wifiÀ*¹€Ø5gà&ÿldo_vaux18±vaux18Àw@Øw@ðð &ldo_vsram_others ±vsram_othersÀ q°Ø q° ˆðð&!ldo_vefuse±vefuseÀð Ø„€&ldo_vxo22±vxo22Àw@Ø!‘À &ldo_vrfck±vrfckÀã`Øð &ldo_vrfck_1±vrfckÀëÀØj&ldo_vbif28±vbif28À*¹€Ø*¹€ðð&ldo_vio28±vio28À*¹€Ø2Z  &ldo_vemc±vemcÀ,@ Ø2Z &ldo_vemc_1±vemcÀ&% Ø2Z &Pldo_vcn33_2_bt ±vcn33_2_btÀ2Z Ø2Z &ldo_vcn33_2_wifi ±vcn33_2_wifiÀ*¹€Ø5gà& ldo_va12±va12ÀO€ØÖ  & ldo_va09±va09À 5ØO€& ldo_vrf18±vrf18Àð ØžP& ldo_vsram_md ±vsram_mdÀ¡ ؽ¶ *ðð & ldo_vufs±vufsÀð Øýà&Qldo_vm18±vm18Àð Øýà &ldo_vbbck±vbbckÀÈàØO€ &ldo_vsram_proc1 ±vsram_proc1À¡ ؽ¶ Lðð &ldo_vsim2±vsim2Àð Ø/M`&ldo_vsram_others_sshub±vsram_others_sshubÀ¡ ؽ¶&rtcmediatek,mt6358-rtc&keysmediatek,mt6359-keysMf&power-keyytˆhomeyfspmi@10027000mediatek,mt8195-spmi Jp� pmifspmimstN  E(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxS$cË+&pmic@6mediatek,mt6315-regulatorJ&regulatorsvbuck1±VbcpuÀ“àØ7ð 5 & pmic@7mediatek,mt6315-regulatorJ&regulatorsvbuck1±VgpuÀ“àØ7ð 5&infra-iommu@10315000mediatek,mt8195-iommu-infraJ1PPP³–&\mailbox@10320000mediatek,mt8195-gceJ2@³â£N &¡mailbox@10330000mediatek,mt8195-gceJ3@³ä£N &scp@10500000mediatek,mt8195-scp0JPrp€sramcfgl1tcm³ÎÃokay¯1½mediatek/mt8195/scp.img&€clock-controller@10720000mediatek,mt8195-scp_adspJrA&2dsp@10803000mediatek,mt8195-dsp J€0„ cfgsram,NXnŠ2#Kadsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_hË3Ùrxtxä45Ãokay¯67&mailbox@10816000mediatek,mt8195-adsp-mbox£J�`³¾&4mailbox@10817000mediatek,mt8195-adsp-mbox£J�p³¿&5mt8195-afe-pcm@10890000mediatek,mt8195-audioJ‰ëË3³6ý8 audiosys”NÚÛÜÝßg"#neabcd 22óclk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodspÃokay¯9&serial@11001100*mediatek,mt8195-uartmediatek,mt6577-uartJ³� N  baudbusÃokay:ùdefault&serial@11001200*mediatek,mt8195-uartmediatek,mt6577-uartJ³Ž N  baudbusÃokay;ùdefault&serial@11001300*mediatek,mt8195-uartmediatek,mt6577-uartJ³� N  baudbus Ãdisabled&serial@11001400*mediatek,mt8195-uartmediatek,mt6577-uartJ³Ó N  baudbus Ãdisabled&serial@11001500*mediatek,mt8195-uartmediatek,mt6577-uartJ³Ô N  baudbus Ãdisabled&serial@11001600*mediatek,mt8195-uartmediatek,mt6577-uartJ³Õ N  baudbus Ãdisabled&auxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadcJ N mainŸ Ãdisabled&syscon@11003000"mediatek,mt8195-pericfg_aosysconJ0A&/spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+J ³¿N™ parent-clksel-clkspi-clk Ãdisabled&thermal-sensor@1100b000mediatek,mt8195-lvts-apJ° ³©N ý <=$lvts-calib-data-1lvts-calib-data-2-&Õsvs@1100bc00mediatek,mt8195-svsJ¼³ÇN main><(svs-calibration-datat-calibration-dataý svs_rst& pwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwmJà³ËË3CN* 0mainmm Ãdisabled&Ùpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwmJð³CN+ Nmainmm Ãdisabled&!spi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+J³ÀN™ 3parent-clksel-clkspi-clkÃokay?ùdefaultN&"spi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+J ³ÁN™ 4parent-clksel-clkspi-clkÃokay@ùdefaultN&#spi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+J0³ÂN™ 5parent-clksel-clkspi-clk Ãdisabled&$spi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+J€³ÃN™ <parent-clksel-clkspi-clk Ãdisabled&%spi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+J�³ÄN™ =parent-clksel-clkspi-clk Ãdisabled&&spi@1101d000mediatek,mt8195-spi-slaveJгÅN RspiSc˜ Ãdisabled&'spi@1101e000mediatek,mt8195-spi-slaveJà³ÆN SspiSc˜ Ãdisabled&(ethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10aJ@³Ìbmacirq.axiapbmac_mainptp_refrmii_internalmac_cg0N//RST/ SRSTcÂÃÄË3r ƒA“B¦C¹ÄÏÃokay Ürgmii-rxidåDùdefaultsleepEðFúî  ] 0N † &)mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916J&Dstmmac-axi-configEUe&Arx-queues-configo…&Bqueue0–©queue1–©queue2–©queue3–©tx-queues-configÁ×&Cqueue0é–õqueue1é–õqueue2é–õqueue3é–õusb@11201000#mediatek,mt8195-mtu3mediatek,mtu3 J -ÿ > macippc· ?+³€N /í Bsys_ckref_ckmcu_ck GHˆ IgÃokayùdefaultJ host 8 HK&*usb@0'mediatek,mt8195-xhcimediatek,mtk-xhciJmac³�S,-c––$N /í B$sys_ckref_ckmcu_ckdma_ckxhci_ckÃokay VL&+portendpoint bM&hmmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc J#õ³ƒN  sourcehclksource_cgÃokayùdefaultstate_uhsNðO r | ë ŠL ™ « ¼ Ë Ú â è öP Q&,mmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc J$dz‡N  $sourcehclksource_cgSc¿Ãokayùdefaultstate_uhsRSðR r | ë  � ) Ú 0 = öT U&-mmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc J%泈N  Isourcehclksource_cgS c¿ Ãdisabled&.ufshci@11270000mediatek,mt8195-ufshciJ'#³‰ V@N ? @ A 6 7 8 Z ]Xufsufs_aesufs_tickunipro_sysclkunipro_tickunipro_mp_bclkufs_tx_symbolufs_mem_sub@ K YÃokay rP }Q&/thermal-sensor@11278000mediatek,mt8195-lvts-mcuJ'€³ªN ý <=$lvts-calib-data-1lvts-calib-data-2-&Ìusb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci J))> macippc³ WS./c––$N/ï/$sys_ckref_ckmcu_ckdma_ckxhci_ck IhˆÃokay Š HK VX ›&0usb@112a1000#mediatek,mt8195-mtu3mediatek,mtu3 J*-ÿ*> macippc·*?+³S0c–N/ñ/sys_ckref_ckmcu_ck Yˆ IiÃokayùdefaultZ HK&1usb@0'mediatek,mt8195-xhcimediatek,mtk-xhciJmac³S1c–N/sys_ckÃokay VX&2usb@112b1000#mediatek,mt8195-mtu3mediatek,mtu3 J+-ÿ+> macippc·+?+³S2c–N/ó/ sys_ckref_ckmcu_ck [ˆ Ij Ãdisabled&3usb@0'mediatek,mt8195-xhcimediatek,mtk-xhciJmac³S3c–N/ sys_ck Ãdisabled&4pcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pcie>pci+J/@ pcie-mac³ °ÿ8·� ‚ à º\ Ä0N V # & + K//pl_250mtl_26mtl_96mtl_32kperi_26mperi_memSGc ] Ópcie-phyË3É Ý` ð^^^^Ãokayùdefault_&5interrupt-controllerñÉ&^pcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pcie>pci+J/€@ pcie-mac³ °ÿ8·�$$ ‚$ $ à º\ Ä(N W X Q//pl_250mtl_26mtl_96mtl_32kperi_26mperi_memSHc ` Ópcie-phyË3É Ý` ðaaaaÃokayùdefaultb&6interrupt-controllerñÉ&aspi@1132c000(mediatek,mt8195-normediatek,mt8173-norJ2À³9No// spisfaxi+ Ãdisabled&7efuse@11c10000%mediatek,mt8195-efusemediatek,efuseJÁ+&8usb3-tx-imp@184,1J„ þ&uusb3-rx-imp@184,2J„ þ&tusb3-intr@185J… þ&susb3-tx-imp@186,1J† þ&rusb3-rx-imp@186,2J† þ&qusb3-intr@187J‡ þ&pusb2-intr-p0@188,1Jˆ þ&9usb2-intr-p1@188,2Jˆ þ&:usb2-intr-p2@189,1J‰ þ&;usb2-intr-p3@189,2J‰ þ&<pciephy-rx-ln1@190,1J� þ&|pciephy-tx-ln1-nmos@190,2J� þ&{pciephy-tx-ln1-pmos@191,1J‘ þ&zpciephy-rx-ln0@191,2J‘ þ&ypciephy-tx-ln0-nmos@192,1J’ þ&xpciephy-tx-ln0-pmos@192,2J’ þ&wpciephy-glb-intr@193J“ þ&vdp-data@1acJ¬&Ëlvts1-calib@1bcJ¼&<lvts2-calib@1d0JÐ8&=svs-calib@580J€d&>socinfo-data1@7a0J t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+·ÄÃokay&=usb-phy@0JNòref &Yt-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+·Å Ãdisabled&>usb-phy@0JNôref &[dsi-phy@11c800000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-txJÈN jmipi_tx0_pllA  Ãdisabled&¯dsi-phy@11c900000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-txJÉN jmipi_tx1_pllA  Ãdisabled&±i2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c JÐ"€€³šUNc ; maindma+ Ãdisabled&?i2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c JÐ"€³›UNc ; maindma+Ãokayp€dùdefault&@pmic@34mediatek,mt6360J4 ‹ebIRQBñÉe&Achargermediatek,mt6360-chg Ý@ usb-otg-vbus-regulator ±usb-otg-vbusÀC…(ØXáè&Lregulatormediatek,mt6360-regulator 'f 7gbuck1 ±emi_vdd2À“àØÖ  5 &Bbuck2 ±emi_vddqÀ“àØÖ  5 &gldo1 ±ext_lcd_3v3À2Z Ø2Z 5 &Cldo2 ±panel1_p1v8Àw@Øw@5&Dldo3±vmc_pmuÀO€Ø6î€5&Uldo5 ±vmch_pmuÀ2Z Ø2Z 5 &Tldo6 ±mt6360_ldo6À¡ Ø 5&Eldo7 ±emi_vmddr_enÀ¡ Ø 5 &Ftypecmediatek,mt6360-tcpc ‹dbPD_IRQBconnectorusb-c-connector GUSB-C Mdual W˜–€ idual tsink ƒ"�d �"‘,ports+port@0Jendpoint bh&Mport@2Jendpoint bi&ni2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c JÐ "€€³œUNc ; maindma+ Ãdisabled&Gclock-controller@11d03000mediatek,mt8195-imp_iic_wrap_sJÐ0A&chdmi-phy@11d5f000mediatek,mt8195-hdmi-phyJÕð NP   pll_ref26mpll1pll2 jhdmi_txpllA  ™  ¨Ãokayùdefaultj&Çi2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c Jà"€€³�UNk ; maindma+ Ãdisabled&Hi2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c Jà"€³“UNk ; maindma+ Ãdisabled&Ii2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c Jà "€€³–UNk ; maindma+Ãokayp€lùdefault&Jtypec-mux@48 ite,it5205JH º Æ rmportendpoint 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compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typedp-intf0dp-intf1dpi1gce0gce1hdmi0ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7i2c0i2c1i2c2i2c3i2c4ethernet0serial0serial1spi0spi1device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellscpu-supplyphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platformpinctrl-namespinctrl-0audio-routingmediatek,adsplink-namesound-dai#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesmediatek,rsel-resistance-in-si-unitpinmuxoutput-highdrive-strengthinput-enablebias-disableinput-disablebias-pull-upbias-pull-downdrive-strength-microampoutput-low#power-domain-cellsdomain-supplyclock-namesmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parents#sound-dai-cellsinterrupts-extended#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesmediatek,long-press-modepower-off-time-seclinux,keycodeswakeup-source#iommu-cells#mbox-cellsmemory-regionfirmware-namepower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namesnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsmediatek,pad-selectinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrphy-modephy-handlepinctrl-1mediatek,tx-delay-psmediatek,mac-wolsnps,reset-gpiosnps,reset-delays-ussnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphysmediatek,syscon-wakeuprole-switch-default-modeusb-role-switchvusb33-supplyvbus-supplyremote-endpointbus-widthmax-frequencyhs400-ds-delaycap-mmc-highspeedcap-mmc-hw-resetmmc-hs200-1_8vmmc-hs400-1_8vno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplycap-sd-highspeedcd-gpiosno-mmcsd-uhs-sdr50sd-uhs-sdr104freq-table-hzmediatek,ufs-disable-mcqvcc-supplyvccq2-supplyusb2-lpm-disablemediatek,u3p-dis-mskbus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapbits#phy-cellsrichtek,vinovp-microvoltLDO_VIN1-supplyLDO_VIN3-supplylabeldata-roleop-sink-microwattpower-roletry-power-rolesource-pdossink-pdosmediatek,ibiasmediatek,ibias_upmode-switchorientation-switchoperating-points-v2power-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,scpiommus#dma-cellsmediatek,smimediatek,larb-idmediatek,larbsmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathddc-i2c-bushdmi-pwr-supplybrightness-levelsdefault-brightness-levelenable-gpiosnum-interpolated-stepspwmsdebounce-intervallinux,codeenable-active-highvin-supplyregulator-boot-onno-mapcpu0cpu1cpu2cpu3cpu4cpu5cpu6cpu7cpu_ret_lcpu_ret_bcpu_off_lcpu_off_bl2_0l2_1l3_0dmic_codecsoundclk13mclk26mclk32kperformancegpu_opp_tabletimergicppi_cluster0ppi_cluster1infracfg_aoaudio_default_pinsdsi0_backlight_pinseth_default_pinseth_sleep_pinsgpio_key_pinshdmi_vreg_pinshdmi_pinsi2c2_pinsi2c4_pinsi2c6_pinsmmc0_default_pinsmmc0_uhs_pinsmmc1_default_pinsmmc1_pins_detectmt6360_pinspanel_default_pinspcie0_default_pinspcie1_default_pinspwm0_default_pinsspi1_pinsspi2_pinstouch_pinsuart0_pinsuart1_pinsusb3_port0_pinsusb2_port0_pinswifi_vreg_pinsscpsysspmmfg0mfg1watchdogapmixedsyssystimerpwrappmicpmic_adcmt6359codecmt6359_vs1_buck_regmt6359_vgpu11_buck_regmt6359_vmodem_buck_regmt6359_vpu_buck_regmt6359_vcore_buck_regmt6359_vs2_buck_regmt6359_vpa_buck_regmt6359_vproc2_buck_regmt6359_vproc1_buck_regmt6359_vcore_sshub_buck_regmt6359_vgpu11_sshub_buck_regmt6359_vaud18_ldo_regmt6359_vsim1_ldo_regmt6359_vibr_ldo_regmt6359_vrf12_ldo_regmt6359_vusb_ldo_regmt6359_vsram_proc2_ldo_regmt6359_vio18_ldo_regmt6359_vcamio_ldo_regmt6359_vcn18_ldo_regmt6359_vfe28_ldo_regmt6359_vcn13_ldo_regmt6359_vcn33_1_bt_ldo_regmt6359_vcn33_1_wifi_ldo_regmt6359_vaux18_ldo_regmt6359_vsram_others_ldo_regmt6359_vefuse_ldo_regmt6359_vxo22_ldo_regmt6359_vrfck_ldo_regmt6359_vrfck_1_ldo_regmt6359_vbif28_ldo_regmt6359_vio28_ldo_regmt6359_vemc_ldo_regmt6359_vemc_1_ldo_regmt6359_vcn33_2_bt_ldo_regmt6359_vcn33_2_wifi_ldo_regmt6359_va12_ldo_regmt6359_va09_ldo_regmt6359_vrf18_ldo_regmt6359_vsram_md_ldo_regmt6359_vufs_ldo_regmt6359_vm18_ldo_regmt6359_vbbck_ldo_regmt6359_vsram_proc1_ldo_regmt6359_vsim2_ldo_regmt6359_vsram_others_sshub_ldomt6359rtcmt6359keysspmimt6315_6mt6315_6_vbuck1mt6315_7mt6315_7_vbuck1iommu_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