Ð þí‡å8xø(íxÀ1google,tomato-rev1google,tomatomediatek,mt8195 +7Acer Tomato (rev1) boardaliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/dpi@1c112000T/soc/mailbox@10320000Y/soc/mailbox@10330000^/soc/hdmi-tx@1c300000d/soc/hdr-engine@1c114000k/soc/mutex@1c016000r/soc/mutex@1c101000y/soc/vpp-merge@1c10c000€/soc/vpp-merge@1c10d000‡/soc/vpp-merge@1c10e000Ž/soc/vpp-merge@1c10f000•/soc/vpp-merge@1c110000œ/soc/dma-controller@1c104000§/soc/dma-controller@1c105000²/soc/dma-controller@1c106000½/soc/dma-controller@1c107000È/soc/dma-controller@1c108000Ó/soc/dma-controller@1c109000Þ/soc/dma-controller@1c10a000é/soc/dma-controller@1c10b000ô/soc/i2c@11e00000ù/soc/i2c@11e01000þ/soc/i2c@11e02000/soc/i2c@11e03000/soc/i2c@11e04000 /soc/i2c@11d00000/soc/i2c@11d02000/soc/mmc@11230000/soc/mmc@11240000!/soc/serial@11001100cpus+cpu@0)cpuarm,cortex-a5559psciG[ec3@k4~Ž€›@­€º€Ç@Ù€æ÷ cpu@100)cpuarm,cortex-a5559psciG[ec3@k4~Ž€›@­€º€Ç@Ù€æ÷ cpu@200)cpuarm,cortex-a5559psciG[ec3@k4~Ž€›@­€º€Ç@Ù€æ÷ cpu@300)cpuarm,cortex-a5559psciG[ec3@k4~Ž€›@­€º€Ç@Ù€æ÷cpu@400)cpuarm,cortex-a7859psciG[�fÔÀk~Ž›@­ºÇ@Ùæ ÷ cpu@500)cpuarm,cortex-a7859psciG[�fÔÀk~Ž›@­ºÇ@Ùæ ÷ cpu@600)cpuarm,cortex-a7859psciG[�fÔÀk~Ž›@­ºÇ@Ùæ ÷ cpu@700)cpuarm,cortex-a7859psciG[�fÔÀk~Ž›@­ºÇ@Ùæ ÷ cpu-mapcluster0core0 core1 core2 core3core4core5core6core7idle-statespscicpu-retention-larm,idle-state*AR2c_sDcpu-retention-barm,idle-state*AR-cŒsäcpu-off-larm,idle-state*AR7c›sHcpu-off-barm,idle-state*AR2cÈsèl2-cache0cache„��@¯æ�l2-cache1cache„��@¯æ� l3-cachecache„� �@¯�dsu-pmu arm,dsu-pmuž © ®faildmic-codec dmic-codecµÂ2mt8195-soundÒ®okayä}òDL10_FEDPTX_BEETDM1_IN_BEETDM2_IN_BEETDM1_OUT_BEETDM2_OUT_BEUL_SRC1_BEAFE_SOF_DL2AFE_SOF_DL3AFE_SOF_UL4AFE_SOF_UL5default?HeadphoneHPOLHeadphoneHPORIN1PHeadset MicExt SpkSpeaker%mediatek,mt8195_mt6359_rt1019_rt56827mt8195_r1019_5682mm-dai-link *ETDM1_IN_BE4cpuhs-playback-dai-link *ETDM1_OUT_BE4cpucodecJhs-capture-dai-link *ETDM2_IN_BE4cpucodecJspk-playback-dai-link *ETDM2_OUT_BE4cpucodecJdisplayport-dai-link*DPTX_BEcodecJfixed-factor-clock-13mfixed-factor-clockTahr}clk13m2oscillator-26m fixed-clockT[Œº€}clk26moscillator-32k fixed-clockT[€}clk32kperformance-controller@11bc10mediatek,cpufreq-hw 5¼ ½0 �opp-table-gpuoperating-points-v2ª}opp-390000000µ>퀼 ‰hopp-410000000µp€¼ ¡Òopp-431000000µ°‰À¼ ¡Òopp-473000000µ1h@¼ º<opp-515000000µ²FÀ¼ º<opp-556000000µ!#ã¼ Ò¦opp-598000000µ#¤Á€¼ ëopp-640000000µ&% ¼ ëopp-670000000µ'ïc€¼ äopp-700000000µ)¹'¼ L¸opp-730000000µ+‚ꀼ }Œopp-760000000µ-L®¼ ®`opp-790000000µ/q€¼ ß4opp-820000000µ0à5¼ opp-850000000µ2©ø€¼ @Üopp-880000000µ4s¼¼ q°pmu-a55arm,cortex-a55-pmu žpmu-a78arm,cortex-a78-pmu žpsci arm,psci-1.0@smctimerarm,armv8-timer @ž   soc+ simple-busÊÑinterrupt-controller@c000000 arm,gic-v3Üí  5   ž ppi-partitionsinterrupt-partition-09 interrupt-partition-19syscon@10000000 mediatek,mt8195-topckgensyscon5T!syscon@10001000#mediatek,mt8195-infracfg_aosyscon5TB"syscon@10003000mediatek,mt8195-pericfgsyscon50THpinctrl@10005000mediatek,mt8195-pinctrl€5PÑÓÔâëô°BOiocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleintYiu�žëÜ�default>¥I2S_SPKR_MCLKI2S_SPKR_DATAINI2S_SPKR_LRCKI2S_SPKR_BCLKEC_AP_INT_ODLAP_FLASH_WP_LTCHPAD_INT_ODLEDP_HPD_1V8AP_I2C_CAM_SDAAP_I2C_CAM_SCLAP_I2C_TCHPAD_SDA_1V8AP_I2C_TCHPAD_SCL_1V8AP_I2C_AUD_SDAAP_I2C_AUD_SCLAP_I2C_TPM_SDA_1V8AP_I2C_TPM_SCL_1V8AP_I2C_TCHSCR_SDA_1V8AP_I2C_TCHSCR_SCL_1V8EC_AP_HPD_ODPCIE_NVME_RST_LPCIE_NVME_CLKREQ_ODLPCIE_RST_1V8_LPCIE_CLKREQ_1V8_ODLPCIE_WAKE_1V8_ODLCLK_24M_CAM0CAM1_SEN_ENAP_I2C_PWR_SCL_1V8AP_I2C_PWR_SDA_1V8AP_I2C_MISC_SCLAP_I2C_MISC_SDAEN_PP5000_HDMI_XAP_HDMITX_HTPLGAP_HDMITX_SCL_1V8AP_HDMITX_SDA_1V8AP_RTC_CLK32KAP_EC_WATCHDOG_LSRCLKENA0SRCLKENA1PWRAP_SPI0_CS_LPWRAP_SPI0_CKPWRAP_SPI0_MOSIPWRAP_SPI0_MISOSPMI_SCLSPMI_SDAI2S_HP_DATAINI2S_HP_MCLKI2S_HP_BCKI2S_HP_LRCKI2S_HP_DATAOUTSD_CD_ODLEN_PP3300_DISP_XTCHSCR_RST_1V8_LTCHSCR_REPORT_DISABLEEN_PP3300_WLAN_XBT_KILL_1V8_LI2S_SPKR_DATAOUTWIFI_KILL_1V8_LBEEP_ONSCP_I2C_SENSOR_SCL_1V8SCP_I2C_SENSOR_SDA_1V8AUD_CLK_MOSIAUD_SYNC_MOSIAUD_DAT_MOSI0AUD_DAT_MOSI1AUD_DAT_MISO0AUD_DAT_MISO1AUD_DAT_MISO2SCP_VREQ_VAOAP_SPI_GSC_TPM_CLKAP_SPI_GSC_TPM_MOSIAP_SPI_GSC_TPM_CS_LAP_SPI_GSC_TPM_MISOEN_PP1000_CAM_XAP_EDP_BKLTENUSB3_HUB_RST_LWLAN_ALERT_ODLEC_IN_RW_ODLGSC_AP_INT_ODLHP_INT_ODLCAM0_RST_LCAM1_RST_LTCHSCR_INT_1V8_LCAM1_DET_LRST_ALC1011_LBL_PWM_1V8UART_AP_TX_DBG_RXUART_DBG_TX_AP_RXEN_SPKRAP_EC_WARM_RST_REQUART_SCP_TX_DBGCON_RXUART_DBGCON_TX_SCP_RXKPCOL0MT6315_GPU_INTMT6315_PROC_BC_INTSD_CMDSD_CLKSD_DAT0SD_DAT1SD_DAT2SD_DAT3EMMC_DAT7EMMC_DAT6EMMC_DAT5EMMC_DAT4EMMC_RSTBEMMC_CMDEMMC_CLKEMMC_DAT3EMMC_DAT2EMMC_DAT1EMMC_DAT0EMMC_DSLMT6360_INT_ODLSCP_JTAG0_TRSTNAP_SPI_EC_CS_LAP_SPI_EC_CLKAP_SPI_EC_MOSIAP_SPI_EC_MISOSCP_JTAG0_TMSSCP_JTAG0_TCKSCP_JTAG0_TDOSCP_JTAG0_TDIAP_SPI_FLASH_CS_LAP_SPI_FLASH_CLKAP_SPI_FLASH_MOSIAP_SPI_FLASH_MISOaudio-default-pinspins-cmd-datDµEFGHIJK<12345pins-hp-jack-int-odlµY¼Éecr50-irq-default-pinslpins-gsc-ap-int-odlµX¼cros-ec-irq-default-pins>pins-ec-ap-int-odlµÉe¼edptx-default-pinsÏpins-cmd-datµÉdisp-pwm0-default-pinsBpins-disp-pwmµRadptx-default-pinsÕpins-cmd-datµÉi2c0-default-pinscpins-busµ Öãèi2c1-default-pinsdpins-busµ  Éèãèi2c2-default-pinsgpins-busµ  Öãèi2c3-default-pinskpins-busµÉèãèi2c4-default-pinsmpins-busµÉèûi2c5-default-pins_pins-busµÖãèi2c7-default-pins`pins-busµÖmmc0-default-pinsKpins-cmd-dat$µ~}|{wvuty¼ûÉepins-clkµzû fpins-rstµxûÉemmc0-uhs-pinsLpins-cmd-dat$µ~}|{wvuty¼ûÉepins-clkµzû fpins-dsµû fpins-rstµxûÉemmc1-detect-pinsPpins-insertµ6Émmc1-default-pinsOpins-cmd-datµnpqrs¼ûÉepins-clkµoû fnor-default-pins]pins-ck-io µŽ��û pins-csµŒûÉpcie0-default-pinspins-bus µÉpcie1-default-pins\pins-bus µÉpanel-pwr-default-pinsåpins-vreg-enµ7pio-default-pinspins-wifi-enableµ:ûpins-low-power-pd,µ./0ABCD€�¼ pins-low-power-pupd<µMNOPSUZ[]^_`hik¼ ert1019p-default-pinsçpins-amp-sdbµd%scp-default-pins4pins-vreqµLÖ¼spi0-default-pins=pins-cs-mosi-clk µ„†…Öpins-misoµ‡ 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Rvenc0-larb^"+0power-domain@275a, Rvenc1-larb^"0power-domain@185 a!ã---&Rvdosys1vdosys1-0vdosys1-1vdosys1-2^"+0power-domain@195^"0power-domain@205^"0power-domain@215a!QRhdmi_tx0power-domain@285a..  Rimg-0img-1^"+0power-domain@2950power-domain@305a!./Ripeipe-0ipe-1^"0power-domain@315(a00000Rcam-0cam-1cam-2cam-3cam-4^"+0power-domain@325 0power-domain@335!0power-domain@345"0power-domain@05^"0power-domain@15^"0power-domain@250power-domain@350power-domain@45a!5!7Rcsi_rx_topcsi_rx_top10power-domain@55a1 Rether0power-domain@65a!X!n Radspadsp1+^"0power-domain@75 a!g!"!n"2Raudioaudio1audio2audio3^"0watchdog@10007000mediatek,mt8195-wdt5pB;syscon@1000c000"mediatek,mt8195-apmixedsyssyscon5ÀT timer@10017000,mediatek,mt8195-timermediatek,mt6765-timer5pž a2pwrap@10024000mediatek,mt8195-pwrapsyscon5@Opwrapžóa"" Rspiwrapp!$€!Ëpmicmediatek,mt6359Ü— ¨Þadcmediatek,mt6359-auxadc¼audio-codecmediatek,mt6359-codecÎáregulatorsmediatek,mt6359-regulatorbuck_vs1õvs1 5!‘À4Pbuck_vgpu11õvgpu11€7dˆ4È yPbuck_vmodemõvmodem€Èàd*4Èbuck_vpuõvpu€7dˆ4È yPbuck_vcoreõvcore€Ö dˆ4È yPbuck_vs2õvs2 5j4Pbuck_vpaõvpa¡ 7±Ð4,buck_vproc2õvproc2€7dL4È ybuck_vproc1õvproc1€7dL4È ybuck_vcore_sshub õvcore_sshub€7buck_vgpu11_sshub õvgpu11_sshubdpdpPldo_vaud18õvaud18w@w@4ðldo_vsim1õvsim1ð /M`ldo_vibrõvibrO€2Z ldo_vrf12õvrf12ÈàÖ Pldo_vusbõvusb-ÆÀ-ÆÀ4ÀPIldo_vsram_proc2 õvsram_proc2¡ ½¶dL4ðPldo_vio18õvio18ð ýà4ÀPhldo_vcamioõvcamioð ýàldo_vcn18õvcn18w@w@4ðldo_vfe28õvfe28*¹€*¹€4xldo_vcn13õvcn13 » Ö ldo_vcn33_1_bt õvcn33_1_bt*¹€5gàldo_vcn33_1_wifi õvcn33_1_wifi*¹€5gàldo_vaux18õvaux18w@w@4ðPldo_vsram_others õvsram_others q° q°dˆ4ð#ldo_vefuseõvefuseð „€ldo_vxo22õvxo22w@!‘ÀPldo_vrfckõvrfckã`ð ldo_vrfck_1õvrfckëÀjldo_vbif28õvbif28*¹€*¹€4ðldo_vio28õvio28*¹€2Z Pldo_vemcõvemc,@ 2Z ldo_vemc_1õvemc&% 2Z Mldo_vcn33_2_bt õvcn33_2_bt*¹€5gàldo_vcn33_2_wifi õvcn33_2_wifi*¹€5gàldo_va12õva12O€Ö Pldo_va09õva09 5O€ldo_vrf18õvrf18ð žPldo_vsram_md õvsram_md¡ ½¶d*4ðldo_vufsõvufsð ýàPNldo_vm18õvm18ð ýàPldo_vbbckõvbbckÈàO€ldo_vsram_proc1 õvsram_proc1¡ ½¶dL4ðPldo_vsim2õvsim2ð /M`ldo_vsram_others_sshubõvsram_others_sshub¡ ½¶rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt8195-spmi 5p� Opmifspmimsta""!E(Rpmif_sys_ckpmif_tmr_ckspmimst_clk_muxp!$€!Ë+mt6315@6mediatek,mt6315-regulator5regulatorsvbuck1õVbcpu€74dj yP mt6315@7mediatek,mt6315-regulator5regulatorsvbuck1õVgpu€74dj yinfra-iommu@10315000mediatek,mt8195-iommu-infra51PPPž‘Wmailbox@10320000mediatek,mt8195-gce52@žâža" mailbox@10330000mediatek,mt8195-gce53@žäža"~scp@10500000mediatek,mt8195-scp05Prp€Osramcfgl1tcmžÎ®okayªmediatek/mt8195/scp.img¸3default4cros-ec-rpmsggoogle,cros-ec-rpmsgÆcros-ec-rpmsgclock-controller@10720000mediatek,mt8195-scp_adsp5rT5dsp@10803000mediatek,mt8195-dsp 5€0„ Ocfgsram,a!X!n!Š5!#KRadsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_hÚ6èrxtxó78®okay¸9:mailbox@10816000mediatek,mt8195-adsp-mboxž5�`ž¾7mailbox@10817000mediatek,mt8195-adsp-mboxž5�pž¿8mt8195-afe-pcm@10890000mediatek,mt8195-audio5‰ú!Ú6ž6 ; audiosys”a  !Ú!Û!Ü!Ý!ß!g!"!#!n!e!a!b!c!d"25óRclk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodsp®okay?¸<serial@11001100*mediatek,mt8195-uartmediatek,mt6577-uart5ž� a" Rbaudbus®okayserial@11001200*mediatek,mt8195-uartmediatek,mt6577-uart5žŽ a" Rbaudbus ®disabledserial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart5ž� a" Rbaudbus ®disabledserial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart5žÓ a" Rbaudbus ®disabledserial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart5žÔ a" Rbaudbus ®disabledserial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart5žÕ a" Rbaudbus ®disabledauxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc5 a"Rmain¼®okayæsyscon@11003000"mediatek,mt8195-pericfg_aosyscon50T1spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+5 ž¿a!™!"Rparent-clksel-clkspi-clk®okaydefault=`ec@0+google,cros-ec-spi5 ¨default>t-ÆÀ†i2c-tunnelgoogle,cros-ec-i2c-tunnel”+sbs-battery@bsbs,sbs-battery5 ¦ºregulator@0google,cros-ec-regulator5õmt_pmic_vmc_ldoO€6î€Rregulator@1google,cros-ec-regulator5õmt_pmic_vmch_ldo)2à6î€Qtypecgoogle,cros-ec-typec+connector@0usb-c-connector5ÏdualÚhostäsourceconnector@1usb-c-connector5ÏdualÚhostäsourcekeyboard-controllergoogle,cros-ec-keybó D0ž­txcàá q rs}0Y1 d"#(  \V |})  Ž + ^a !%$' & + ,./-32*5 4 9    8 l j6  g i4=  thermal-sensor@1100b000mediatek,mt8195-lvts-ap5° ž©a" "R?@$^lvts-calib-data-1lvts-calib-data-2oàsvs@1100bc00mediatek,mt8195-svs5¼žÇa"RmainRA?(^svs-calibration-datat-calibration-data "svs_rstpwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm5àžËÚ6…a!*"0Rmainmm®okaydefaultBãpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm5ðž…a!+"NRmainmm ®disabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+5žÀa!™!"3Rparent-clksel-clkspi-clk ®disabledspi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+5 žÁa!™!"4Rparent-clksel-clkspi-clk ®disabledspi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+50žÂa!™!"5Rparent-clksel-clkspi-clk ®disabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+5€žÃa!™!"<Rparent-clksel-clkspi-clk ®disabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+5�žÄa!™!"=Rparent-clksel-clkspi-clk ®disabledspi@1101d000mediatek,mt8195-spi-slave5ОÅa"RRspip!€!˜ ®disabledspi@1101e000mediatek,mt8195-spi-slave5àžÆa"SRspip!€!˜ ®disabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a5@žÌ�macirq.Raxiapbmac_mainptp_refrmii_internalmac_cg0a11!R!S!T1 p!R!S!T€!Â!Ã!ÄÚ6 "±CÁDÔEçòý ®disabledmdiosnps,dwmac-mdio+stmmac-axi-config   *Crx-queues-config 4 JDqueue0 [ nqueue1 [ nqueue2 [ nqueue3 [ ntx-queues-config † œEqueue0 ® [ ºqueue1 ® [ ºqueue2 ® [ ºqueue3 ® [ ºusb@11201000#mediatek,mt8195-mtu3mediatek,mtu3 5 -ÿ > OmacippcÊ ?+ž€a"/!í"BRsys_ckref_ckmcu_ck ÈFG† ÍHg®okay ähost ìIusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci5Omacž�p!,!-€!–!–$a"/!í "B$Rsys_ckref_ckmcu_ckdma_ckxhci_ck®okay ú  Jmmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc 5#õžƒa!""Rsourcehclksource_cg®okay   0 ALx ë P _ n v |defaultstate_uhsK ŠL ”M  Nmmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc 5$Çž‡a!""$Rsourcehclksource_cgp!€!¿®okay  ­ ¾6x ëÂ Ç ndefaultstate_uhsOP ŠO Î Û ”Q  Rmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc 5%枈a! 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compatibleinterrupt-parent#address-cells#size-cellsmodeldp-intf0dp-intf1dpi1gce0gce1hdmi0ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7i2c0i2c1i2c2i2c3i2c4i2c5i2c7mmc0mmc1serial0device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellscpu-supplyphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platformmediatek,adspmediatek,dai-linkpinctrl-namespinctrl-0audio-routinglink-namemediatek,clk-providersound-dai#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesmediatek,rsel-resistance-in-si-unitgpio-line-namespinmuxinput-enablebias-pull-upbias-disabledrive-strength-microampdrive-strengthbias-pull-downoutput-highoutput-low#power-domain-cellsdomain-supplyclock-namesmediatek,infracfgassigned-clocksassigned-clock-parents#sound-dai-cellsinterrupts-extended#io-channel-cellsmediatek,dmic-modemediatek,mic-type-0regulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modes#iommu-cells#mbox-cellsfirmware-namememory-regionmediatek,rpmsg-namepower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namesmediatek,etdm-in2-cowork-sourcemediatek,etdm-out2-cowork-sourcemediatek,pad-selectspi-max-frequencywakeup-sourcegoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrsnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphysmediatek,syscon-wakeupdr_modevusb33-supplyrx-fifo-depthvbus-supplybus-widthcap-mmc-highspeedcap-mmc-hw-reseths400-ds-delaymmc-hs200-1_8vmmc-hs400-1_8vno-sdiono-sdnon-removablepinctrl-1vmmc-supplyvqmmc-supplycap-sd-highspeedcd-gpiosno-mmcsd-uhs-sdr50sd-uhs-sdr104freq-table-hzmediatek,ufs-disable-mcqmediatek,u3p-dis-mskusb2-lpm-disablebus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapspi-rx-bus-widthspi-tx-bus-widthbits#phy-cellsmediatek,ibiasmediatek,ibias_upi2c-scl-internal-delay-nsvcc-supplyrealtek,jd-srcAVDD-supplyDBVDD-supplyMICVDD-supplyLDO1-IN-supplyrealtek,btndet-delayVBAT-supplyhid-descr-addrpost-power-on-delay-msvdd-supplyoperating-points-v2power-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,scpiommus#dma-cellsmediatek,smimediatek,larb-idmediatek,larbsremote-endpointmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzdata-lanespower-supplybacklightpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicebrightness-levelsdefault-brightness-levelenable-gpiosnum-interpolated-stepspwmsstdout-pathenable-active-highgpiovin-supplyregulator-boot-onio-channelsio-channel-namestemperature-lookup-tableno-maplabelsdb-gpios