Ð þí>8ÿ�(®ÿX1google,ponyta-sku1google,ponytamediatek,mt8186 +7Google Ponyta sku1 boardaliases=/soc/ovl@14005000B/soc/ovl@14006000J/soc/rdma@14007000P/soc/rdma@1401f000V/soc/i2c@11007000[/soc/i2c@11008000`/soc/i2c@11009000e/soc/i2c@1100f000j/soc/i2c@11016000o/soc/mmc@11230000t/soc/mmc@11240000y/soc/serial@11002000fhctl@1000ce00mediatek,mt8186-fhctl� ˆÎ Œdisabledccimediatek,mt8186-cci�“cciintermediateŸ³¿"opp-table-ccioperating-points-v2Ç¿opp-500000000ÒÍeÙ 'À¿opp-560000000Ò!`ìÙ L¸¿opp-612000000Ò$zaÙ •ö¿opp-682000000Ò(¦~€Ù ÷ž¿ opp-752000000Ò,Ҝ٠YF¿ opp-822000000Ò0þ¹€Ù ºî¿ opp-875000000Ò4'pÀÙ ë¿ opp-927000000Ò7@åÀÙ 5¿ opp-980000000Ò:i�Ù ~>¿opp-1050000000Ò>•º€Ù ßæ¿opp-1120000000ÒBÁØÙ )$¿opp-1155000000ÒD׿ÀÙ ŠÌ¿opp-1190000000ÒFíõ€Ù Ô ¿opp-1260000000ÒKÙ~ð¿opp-1330000000ÒOF0€Ù)Ö¿opp-1400000000ÒSrNÙ¼R¿opp-table-cluster0operating-points-v2Ç¿opp-500000000ÒÍeÙ 'Àçopp-774000000Ò."M€Ù L¸çopp-875000000Ò4'pÀÙ ®`çopp-975000000Ò:QÀÙ ç opp-1075000000Ò@2ÀÙ q°ç opp-1175000000ÒF ÀÙ ÓXç opp-1275000000ÒKþôÀÙ 5ç opp-1375000000ÒQôÕÀÙ –¨ç opp-1500000000ÒYh/Ù ºçopp-1618000000Ò`p¸€Ù Yøçopp-1666000000ÒcM$€Ù » çopp-1733000000ÒgK{@ÙHçopp-1800000000ÒkIÒÙ~ðçopp-1866000000Òo8æ€Ùùçopp-1933000000Òs7=@ÙZªçopp-2000000000Òw5”Ù¼Rçopp-table-cluster1operating-points-v2Ç¿#opp-774000000Ò."M€Ù L¸çopp-835000000Ò1ÅÀÙ •öçopp-919000000Ò6ÆÓÀÙ ÷žçopp-1002000000Ò;¹N€Ù YFç opp-1085000000Ò@«É@Ù ÓXç opp-1169000000ÒE­†@Ù 5ç opp-1308000000ÒMöÙ ßæç opp-1419000000ÒT”8ÀÙ Yøç opp-1530000000Ò[1ò€Ù ìtçopp-1670000000ÒcŠ-€Ù—Zçopp-1733000000ÒgK{@Ùùçopp-1796000000Òk ÉÙsçopp-1860000000ÒnÝYÙÔ¼çopp-1923000000Òrž¦ÀÙ6dçopp-1986000000Òv_ô€Ù°vçopp-2050000000Òz0„€Ùçcpus+cpu-mapcluster0core0õcore1õcore2õcore3õcore4õcore5õcore6õcore7õcpu@0ùcpuarm,cortex-a55ˆpsciw5”�“cpuintermediateŸ#T=~P `€m@€Œ€™@«€¸!ÉØ"³¿cpu@100ùcpuarm,cortex-a55ˆpsciw5”�“cpuintermediateŸ#T=~P `€m@€Œ€™@«€¸!ÉØ"³¿cpu@200ùcpuarm,cortex-a55ˆpsciw5”�“cpuintermediateŸ#T=~P `€m@€Œ€™@«€¸!ÉØ"³¿cpu@300ùcpuarm,cortex-a55ˆpsciw5”�“cpuintermediateŸ#T=~P `€m@€Œ€™@«€¸!ÉØ"³¿cpu@400ùcpuarm,cortex-a55ˆpsciw5”�“cpuintermediateŸ#T=~P `€m@€Œ€™@«€¸!ÉØ"³¿cpu@500ùcpuarm,cortex-a55ˆpsciw5”�“cpuintermediateŸ#T=~P `€m@€Œ€™@«€¸!ÉØ"³¿cpu@600ùcpuarm,cortex-a76ˆpsciz0„€�“cpuintermediateŸ##O=P$%`m@Œ™@«¸&ÉØ"³'¿cpu@700ùcpuarm,cortex-a76ˆpsciz0„€�“cpuintermediateŸ##O=P$%`m@Œ™@«¸&ÉØ"³'¿idle-statesåpscicpu-retention-larm,idle-stateò 2+d;@¿cpu-retention-barm,idle-stateò 2+d;x¿$cpu-off-larm,idle-stateò d+ú;4¿ cpu-off-barm,idle-stateò d+ú;l¿%l2-cache0cacheLbo@�¸(X¿!l2-cache1cacheLbo@�¸(X¿&l3-cachecacheLbo@�X¿(fixed-factor-clock-13mfixed-factor-clockf�)s}ˆclk13m¿=oscillator-26m fixed-clockfŒº€ˆclk26m¿)oscillator-32k fixed-clockf€ˆclk32kopp-table-gpuoperating-points-v2¿xopp-299000000ÒÒ`ÀÙ X”›ÿopp-332000000ÒÉëÙ ‰h›ÿopp-366000000Òз€Ù º<›ÿopp-400000000ÒׄÙ Ò¦›ÿopp-434000000ÒÞP€Ù z›ÿopp-484000000ÒÙAÙ 4N›ÿopp-535000000ÒãsÀÙ }Œ›ÿopp-586000000Ò"í¦€Ù ®`›ÿopp-637000000Ò%÷Ù@Ù ß4›ÿopp-690000000Ò) �€Ù @Ü›ÿopp-743000000Ò,IGÀÙ Š›ÿopp-796000000Ò/qÿÙ ë›ÿopp-850000000Ò2©ø€Ù 5›ÿopp-900000000-3Ò5¤éÙ øP›Ïopp-900000000-4Ò5¤éÙ Ç|›opp-900000000-5Ò5¤éÙ –¨› opp-950000000-3Ò8ŸÙ€Ù » ›Ïopp-950000000-4Ò8ŸÙ€Ù Yø›opp-950000000-5Ò8ŸÙ€Ù øP› opp-1000000000-3Ò;šÊÙ~ð›Ïopp-1000000000-4Ò;šÊÙ ìt›opp-1000000000-5Ò;šÊÙ Yø› pmu-a55arm,cortex-a55-pmu ¬*pmu-a76arm,cortex-a76-pmu ¬+psci arm,psci-1.0 smctimerarm,armv8-timer @¬   soc+ simple-bus·»interrupt-controller@c000000 arm,gic-v3ÂÓ ê ˆ   ¬ ÿ¿ppi-partitionsinterrupt-partition-0¿*interrupt-partition-1¿+syscon@c53a000mediatek,mt8186-mcusyssysconˆ S f¿syscon@10000000 mediatek,mt8186-topckgensysconˆf¿-syscon@10001000#mediatek,mt8186-infracfg_aosysconˆf(¿/syscon@10003000mediatek,mt8186-pericfgsysconˆ0¿jpinctrl@10005000mediatek,mt8186-pinctrl€ˆP "$&*,°B5iocfg0iocfg_ltiocfg_lmiocfg_lbiocfg_bliocfg_rbiocfg_rteint?O[,¹ê¬ºÂ ßgTPTPTPI2S0_HP_DII2S3_DP_SPKR_DOSAR_INT_ODLBT_WAKE_AP_ODLWIFI_INT_ODLDPBRDG_INT_ODLEDPBRDG_INT_ODLEC_AP_HPD_ODTCHPAD_INT_ODLTCHSCR_INT_1V8_ODLEC_AP_INT_ODLEC_IN_RW_ODLGSC_AP_INT_ODLAP_FLASH_WP_LHP_INT_ODLPEN_EJECT_ODWCAM_PWDN_LWCAM_RST_LUCAM_SEN_ENUCAM_RST_LLTE_RESET_LLTE_SAR_DETECT_LI2S2_DP_SPK_MCKI2S2_DP_SPKR_BCKI2S2_DP_SPKR_LRCKI2S2_DP_SPKR_DI (TP)EN_PP1000_EDPBRDGEN_PP1800_EDPBRDGEN_PP3300_EDPBRDGUART_GSC_TX_AP_RXUART_AP_TX_GSC_RXUART_DBGCON_TX_ADSP_RXUART_ADSP_TX_DBGCON_RXEN_PP1000_DPBRDGTCHSCR_REPORT_DISABLEEN_PP3300_DPBRDGEN_PP1800_DPBRDGSPI_AP_CLK_ECSPI_AP_CS_EC_LSPI_AP_DO_EC_DISPI_AP_DI_EC_DOSPI_AP_CLK_GSCSPI_AP_CS_GSC_LSPI_AP_DO_GSC_DISPI_AP_DI_GSC_DOUART_DBGCON_TX_SCP_RXUART_SCP_TX_DBGCON_RXEN_PP1200_CAM_XEN_PP2800A_VCM_XEN_PP2800A_UCAM_XEN_PP2800A_WCAM_XWLAN_MODULE_RST_LEN_PP1200_UCAM_XI2S1_HP_DOI2S1_HP_BCKI2S1_HP_LRCKI2S1_HP_MCKTCHSCR_RST_1V8_LSPI_AP_CLK_ROMSPI_AP_CS_ROM_LSPI_AP_DO_ROM_DISPI_AP_DI_ROM_DONCNCEMMC_STRBEMMC_CLKEMMC_CMDEMMC_RST_LEMMC_DATA0EMMC_DATA1EMMC_DATA2EMMC_DATA3EMMC_DATA4EMMC_DATA5EMMC_DATA6EMMC_DATA7AP_KPCOL0NCNCNCTPSDIO_CLKSDIO_CMDSDIO_DATA0SDIO_DATA1SDIO_DATA2SDIO_DATA3NCNCNCNCNCNCEDPBRDG_PWRENBL_PWM_1V8EDPBRDG_RST_LMIPI_DPI_CLKMIPI_DPI_VSYNCMIPI_DPI_HSYNCMIPI_DPI_DEMIPI_DPI_D0MIPI_DPI_D1MIPI_DPI_D2MIPI_DPI_D3MIPI_DPI_D4MIPI_DPI_D5MIPI_DPI_D6MIPI_DPI_DA7MIPI_DPI_D8MIPI_DPI_D9MIPI_DPI_D10MIPI_DPI_D11PCM_BT_CLKPCM_BT_SYNCPCM_BT_DIPCM_BT_DOJTAG_TMS_TPJTAG_TCK_TPJTAG_TDI_TPJTAG_TDO_TPJTAG_TRSTN_TPCLK_24M_WCAMCLK_24M_UCAMUCAM_DET_ODLAP_I2C_EDPBRDG_SCL_1V8AP_I2C_EDPBRDG_SDA_1V8AP_I2C_TCHSCR_SCL_1V8AP_I2C_TCHSCR_SDA_1V8AP_I2C_TCHPAD_SCL_1V8AP_I2C_TCHPAD_SDA_1V8AP_I2C_DPBRDG_SCL_1V8AP_I2C_DPBRDG_SDA_1V8AP_I2C_WLAN_SCL_1V8AP_I2C_WLAN_SDA_1V8AP_I2C_AUD_SCL_1V8AP_I2C_AUD_SDA_1V8AP_I2C_TPM_SCL_1V8AP_I2C_UCAM_SDA_1V8AP_I2C_UCAM_SCL_1V8AP_I2C_UCAM_SDA_1V8AP_I2C_WCAM_SCL_1V8AP_I2C_WCAM_SDA_1V8SCP_I2C_SENSOR_SCL_1V8SCP_I2C_SENSOR_SDA_1V8AP_EC_WARM_RST_REQAP_XHCI_INIT_DONEUSB3_HUB_RST_LEN_SPKRBEEP_ONAP_EDP_BKLTENEN_PP3300_DISP_XEN_PP3300_SDBRDG_XBT_KILL_1V8_LWIFI_KILL_1V8_LPWRAP_SPI0_CSNPWRAP_SPI0_CKPWRAP_SPI0_MOPWRAP_SPI0_MISRCLKENA0SRCLKENA1SCP_VREQ_VAOAP_RTC_CLK32KAP_PMIC_WDTRST_LAUD_CLK_MOSIAUD_SYNC_MOSIAUD_DAT_MOSI0AUD_DAT_MOSI1AUD_CLK_MISOAUD_SYNC_MISOAUD_DAT_MISO0AUD_DAT_MISO1NCNCDPBRDG_PWRENDPBRDG_RST_LLTE_W_DISABLE_LLTE_SAR_DETECT_LEN_PP3300_LTE_XLTE_PWR_OFF_LLTE_RESET_LTPTP¿,aud-clk-mosi-off-pins¿¡pins-clk-syncw¦§~‹aud-clk-mosi-on-pins¿¢pins-clk-syncw¦§aud-clk-miso-off-pins¿£pins-clk-syncwª«~‹aud-clk-miso-on-pins¿¤pins-clk-syncwª«aud-dat-mosi-off-pins¿§pins-datw¨©~‹aud-dat-mosi-on-pins¿¨pins-datw¨©aud-dat-miso-off-pins¿¥pins-datw¬­~‹aud-dat-miso-on-pins¿¦pins-datw¬­š¯aud-gpio-i2s0-off-pins¿©pins-sdatawaud-gpio-i2s0-on-pins¿ªpins-sdatawaud-gpio-i2s-off-pins¿«pins-clk-sdataw89:;¼aud-gpio-i2s1-on-pins¿¬pins-clk-sdataw89:;aud-gpio-i2s2-off-pins¿­pins-cmd-datw¼aud-gpio-i2s2-on-pins¿®pins-clkwÇaud-gpio-i2s3-off-pins¿¯pins-sdataw¼aud-gpio-i2s3-on-pins¿°pins-sdatawÇaud-gpio-pcm-off-pins¿±pins-clk-sdatawstuv¼aud-gpio-pcm-on-pins¿²pins-clk-sdatawstuvaud-gpio-dmic-sec-pins¿³pinsw¼bt-reset-pins¿rpins-bt-resetw›Ödpi-sleep-pins¿}pins-cmd-dat@wghijklmnopqredfcÇ ¼dpi-default-pins¿|pins-cmd-dat@wghijklmnopqredfcÇ cros-ec-int-pins¿dpins-ec-ap-int-odlw ~edp-panel-fixed-pins¿ pins-vreg-enw™Öen-pp1800-dpbrdg-pins¿Ÿpins-vreg-enw'¼gsc-int-pins¿fpins-gsc-ap-int-odlw~i2c0-pins¿Gpins-busw€¯Ç~i2c1-pins¿Qpins-busw‚�¯Ç~i2c2-pins¿Tpins-busw„ƒ¯Ç~i2c3-pins¿Vpins-busw†…¯Ç~i2c5-pins¿\pins-buswЉ¯Ç~it6505-pins¿Wpins-hpdw ~âpins-intw~âpins-resetw±¼âmmc0-default-pins¿kpins-clkwD‹fpins-cmd-dat$wGHIJKLMNE~âepins-rstwFâemmc0-uhs-pins¿lpins-clkwDÇ‹fpins-cmd-dat$wGHIJKLMNE~Çâepins-dswCÇ‹fpins-rstwFâemmc1-default-pins¿npins-clkwTÇ‹fpins-cmd-datwVWXYU~Çâemmc1-uhs-pins¿opins-clkwTÇ‹fpins-cmd-datwVWXYU~Çâemmc1-eint-pins¿ppins-dat1wW~âenor-default-pins¿Epins-clk-dat w?=@Ç‹pins-cs-dat w>ABÇâpen-eject-pins¿žpinsw~¯disp-pwm-pins¿bpinswaÖspeaker-codec-default-pins¿¹pins-sdbw–¼scp-default-pins¿>pins-scp-uartw01spi1-pins¿cpins-busw()*+¯~spi2-pins¿epins-busw,-./¯~spmi-pinspins-busw·¸touchscreen-pins¿Rpins-irqw ~âpins-resetw<Öpins-report-sww%¼trackpad-default-pins¿Upins-int-nw ~¯wifi-enable-pins¿»pins-wifi-enablew6wifi-wakeup-pins¿¼pins-wifi-wakeupw~anx7625-pins¿Hpins-intw ~¯pins-resetwb¼pins-power-enw`¼pp1000-edpbrdg-en-pins¿½pins-vreg-enw¼pp1800-edpbrdg-en-pins¿¾pins-vreg-enw¼pp3300-edpbrdg-en-pins¿¿pins-vreg-enw¼syscon@10006000)mediatek,mt8186-scpsyssysconsimple-mfdˆ`power-controller!mediatek,mt8186-power-controller+ï¿Bpower-domain@0ˆ�-“mfg00+ï.power-domain@1ˆ/+ï0power-domain@2ˆïpower-domain@3ˆïpower-domain@17ˆ�--$“subsys-csirx-top0subsys-csirx-top1ïpower-domain@4ˆ�-/=“sys_ckref_ckïpower-domain@5ˆ�/B/?“sys_ckref_ckïpower-domain@18ˆ�-/->“audioadspsubsys-adsp-bus+ïpower-domain@19ˆ+ïpower-domain@20ˆ/ïpower-domain@16ˆ/ïpower-domain@6ˆ0�-*-+1 111M“dispmdpsubsys-smi-infrasubsys-smi-commonsubsys-smi-galssubsys-smi-iommu/+ïpower-domain@14ˆ�-)2 “vdec0larb/ïpower-domain@10ˆ 8�---- 3-#-%6“cam0cam1cam2cam3galssubsys-cam-tmsubsys-cam-top/+ïpower-domain@12ˆ ïpower-domain@11ˆ ïpower-domain@7ˆ�4-&“galssubsys-img-top/+ïpower-domain@8ˆïpower-domain@9ˆ (�-'5555P“subsys-ipe-topsubsys-ipe-larb0subsys-ipe-larb1subsys-ipe-smisubsys-ipe-gals/ïpower-domain@13ˆ �-$6“venc0subsys-larb/ïpower-domain@15ˆ�-:77%“wpe0subsys-larb-cksubsys-larb-pclk/ïwatchdog@10007000mediatek,mt8186-wdt#ˆp(;¿gsyscon@1000c000"mediatek,mt8186-apmixedsyssysconˆÀf¿pwrap@1000d000mediatek,mt8186-pwrapsysconˆÐ5pwrap¬Â�// “spiwrappmic mediatek,mt6366mediatek,mt6358ê T,ÉÂaudio-codec,mediatek,mt6366-soundmediatek,mt6358-soundh8tregulators4mediatek,mt6366-regulatormediatek,mt6358-regulator‡9˜9©9º9Ì9ß9ð999'9;9K9[:k;{<‹<vcore›pp0750_dvdd_coreªdp 5ÚjïÈ #vdram1›pp1125_emi_vdd2ª*ˆÂ*ˆÚ0Ôï #¿;vgpu›ppvar_dvdd_vgpuª¡ Â~ðÚjïÈ 7.N† ¿0vproc11›ppvar_dvdd_proc_bc_mt6366ª 'ÀÂO€ÚjïÈ #¿'vproc12›ppvar_dvdd_proc_lcª 'ÀÂO€ÚjïÈ #¿vs1 ›pp2000_vs1ª„€Â„€Ú0Ôï#¿:vs2 ›pp1350_vs2ª™p™pÚ0Ôï#¿<va12 ›pp1200_va12ªO€ÂO€ï#vaud28›pp2800_vaud28ª*¹€Â*¹€ï¿8vaux18›pp1840_vaux18ªw@€ïvbif28›pp2800_vbif28ª*¹€Â*¹€ïvcn18›pp1800_vcn18_xªw@Âw@ïvcn28›pp2800_vcn28_xª*¹€Â*¹€ïvefuse›pp1800_vefuseªw@Âw@ïvfe28›pp2800_vfe28_xª*¹€Â*¹€ïvemc ›pp3000_vemcª-ÆÀÂ-ÆÀï<¿mvibr›pp2800_vibr_xª*¹€Â*¹€ï<vio18›pp1800_vio18_s3ªw@Âw@ï Œ#¿]vio28›pp2800_vio28_xª*¹€Â*¹€ïvm18›pp1800_emi_vdd1ªw@€ïE#vmc ›pp3000_vmcª-ÆÀÂ-ÆÀï<vmddr›pm0750_emi_vmddrª ®` q°ïE#vmch ›pp3000_vmchª-ÆÀÂ-ÆÀï<vcn33›pp3300_vcn33_xª2Z Â2Z ïvdram2›pp0600_emi_vddqª 'À 'Àï ä#vrf12›pp1200_vrf12_xªO€ÂO€ïxvrf18›pp1800_vrf18_xªw@Âw@ïxvsim1›pp1860_vsim1_xªw@Âa ïvsim2›pp2760_vsim2_xª)2àÂ*@ï¿Xvsram-gpu›pp0900_dvdd_sram_gpuª øPÂ�Újïð70N† ¿.vsram-others›pp0900_dvdd_sram_coreª »  » Újïð#vsram-proc11›pp0900_dvdd_sram_bcª øPÂÚjïð#vsram-proc12›pp0900_dvdd_sram_lcª øPÂÚjïð#vusb ›pp3070_vusbª-ÆÀÂ.Ø0ï#vxo22 ›pp2240_vxo22ª!‘ÀÂ".ïx#rtc(mediatek,mt6366-rtcmediatek,mt6358-rtcspmi@10015000*mediatek,mt8186-spmimediatek,mt8195-spmi ˆP° 5pmifspmimst�//-2(“pmif_sys_ckpmif_tmr_ckspmimst_clk_muxk-2{-t ¬íñ Œdisabledtimer@10017000,mediatek,mt8186-timermediatek,mt6765-timerˆp¬Ï�=mailbox@1022c000mediatek,mt8186-gceˆ"À@�/“gce¬ª’¿yscp@10500000mediatek,mt8186-scp ˆP\�€ 5sramcfg¬Íždefault¬>¶mediatek/mt8186/scp.imgÄ?Œokay¿�cros-ec-rpmsggoogle,cros-ec-rpmsgÒcros-ec-rpmsgadsp@10680000mediatek,mt8186-dsp@ˆh €h°hð5cfgsramsecbus�-/->“audiodspadsp_busk-/-> {)-Eærxtxñ@AøBŒokayÄCD¿´mailbox@10686100mediatek,mt8186-adsp-mbox’ˆha¬i¿@mailbox@10687100mediatek,mt8186-adsp-mbox’ˆhq¬j¿Aspi@11000000mediatek,mt8186-norˆ �-3/O/c/d“spisfaxiaxi_sk-3{-P¬%Œokayždefault¬E+flash@0jedec,spi-norˆSÀadc@11001000.mediatek,mt8186-auxadcmediatek,mt8173-auxadcˆ�/"“mainserial@11002000*mediatek,mt8186-uartmediatek,mt6577-uartˆ ¬p �)/ “baudbusŒokayserial@11003000*mediatek,mt8186-uartmediatek,mt6577-uartˆ0¬q �)/ “baudbus Œdisabledi2c@11007000mediatek,mt8186-i2c ˆp ¬i�F/' “maindmas+Œokayždefault¬G€anx7625@58analogix,anx7625ˆXždefault¬H *,` 7,bCIPJ]Kjp0p0ports+port@0ˆendpoint”L¤¿€port@1ˆendpoint”M¿Paux-buspanel edp-panel¯N¼Oportendpoint”P¿Mi2c@11008000mediatek,mt8186-i2c ˆ€ ¬j�F/' “maindmas+Œokayždefault¬Q€Æ@touchscreen@5dgoodix,gt7375pˆ] T, ždefault¬R 7,<iSài2c@11009000mediatek,mt8186-i2c ˆ� €¬k�F/' “maindmas+Œokayždefault¬T€ÆUðtrackpad@15elan,ekth3000ˆ T, ždefault¬UÿS Œfail-needs-probetrackpad@2c hid-over-i2cˆ,  T, ždefault¬UiS  Œdisabledi2c@1100f000mediatek,mt8186-i2c ˆð €¬l�F/' “maindmas+Œokayždefault¬V† dp-bridge@5c ite,it6505ˆ\ T,ždefault¬W'8XDY 7,±QZ¿·ports+port@0ˆendpointXðÑ€”[¿~port@1ˆi2c@11011000mediatek,mt8186-i2c ˆ €€¬m�F/' “maindmas+ Œdisabledi2c@11016000mediatek,mt8186-i2c ˆ` ¬b�F/' “maindmas+Œokayždefault¬\codec@1arealtek,rt5682sˆ T,'i]u]‚]‘^Ÿ¿¶i2c@1100d000mediatek,mt8186-i2c ˆÐ ¬c�F/' “maindmas+ Œdisabledi2c@11004000mediatek,mt8186-i2c ˆ@ €¬n�F/' “maindmas+ Œdisabledi2c@11005000mediatek,mt8186-i2c ˆP €€¬o�F/' “maindmas+ Œdisabledspi@1100a000(mediatek,mt8186-spimediatek,mt6765-spi+ˆ ¬Š�-K- /“parent-clksel-clkspi-clk Œdisabledthermal-sensor@1100b000mediatek,mt8186-lvtsˆ°¬c�/ ®/µ_`$Álvts-calib-data-1lvts-calib-data-2Ò¿”svs@1100bc00mediatek,mt8186-svsˆ¼¬Ž�/ “mainµa_(Ásvs-calibration-datat-calibration-data®/èsvs_rstpwm@1100e0002mediatek,mt8186-disp-pwmmediatek,mt8183-disp-pwmˆà¬�ô�-/4“mainmmŒokayždefault¬b¿œspi@11010000(mediatek,mt8186-spimediatek,mt6765-spi+ˆ¬‹�-K- /8“parent-clksel-clkspi-clkŒokayždefault¬cÿec@0google,cros-ec-spiˆ T, ždefault¬dB@i2c-tunnelgoogle,cros-ec-i2c-tunnel +sbs-battery@bsbs,sbs-batteryˆ  % 9typecgoogle,cros-ec-typec+connector@0usb-c-connectorˆ Nleft Tdual _host isourceconnector@1usb-c-connectorˆ Nright Tdual _host isource Œdisabledextcon0google,extcon-usbc-cros-ec x¿Zkeyboard-controllergoogle,cros-ec-keyb ‹ ›  ®L È}0Y1 d"#(  \V |})  Ž + ^a !%$' & + ,./-32*5 4 9    8 l j6  g iž­txcàá¤ø q rs0 Õ  spi@11012000(mediatek,mt8186-spimediatek,mt6765-spi+ˆ ¬‘�-K- /;“parent-clksel-clkspi-clkŒokayždefault¬e ê,-ÿtpm@0 google,cr50ˆ T,ždefault¬fB@spi@11013000(mediatek,mt8186-spimediatek,mt6765-spi+ˆ0¬’�-K- /<“parent-clksel-clkspi-clk Œdisabledspi@11014000(mediatek,mt8186-spimediatek,mt6765-spi+ˆ@¬t�-K- /J“parent-clksel-clkspi-clk Œdisabledspi@11015000(mediatek,mt8186-spimediatek,mt6765-spi+ˆP¬u�-K- /K“parent-clksel-clkspi-clk Œdisabledclock-controller@11017000mediatek,mt8186-imp_iic_wrapˆpf¿Fserial@11018000*mediatek,mt8186-uartmediatek,mt6577-uartˆ€¬ö �)/ “baudbus Œdisabledi2c@11019000mediatek,mt8186-i2c ˆ� €¬d�F /' “maindmas+ Œdisabledaudio-controller@11210000mediatek,mt8186-soundˆ! Ä�/,/6---F- - --e--h-?-@-A-B-C-ƒ-„-…-†-‡-,)}“aud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_audio_inttop_mainpll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s4_m_seltop_tdm_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div4top_apll12_div_tdmtop_mux_audio_htop_clk26m_clk¬© ó/ -®g èaudiosysŒokayÄh¿µusb@11201000#mediatek,mt8186-mtu3mediatek,mtu3 ˆ -ÿ > 5macippc(�-/=/3//>$“sys_ckref_ckmcu_ckdma_ckxhci_ck¬/ iøB+»  j Œokayusb@11200000'mediatek,mt8186-xhcimediatek,mtk-xhciˆ 5mac(�-/=/3//>$“sys_ckref_ckmcu_ckdma_ckxhci_ck¬&Œokay 5Smmc@11230000(mediatek,mt8186-mmcmediatek,mt8183-mmc ˆ#Í �- //U/“sourcehclksource_cgcrypto¬dk- {Œokayždefaultstate_uhs¬k Al K ë U c u „ “   ¦ ® ¿ Î åm ñ]mmc@11240000(mediatek,mt8186-mmcmediatek,mt8183-mmc ˆ$É�-//V“sourcehclksource_cgk-{-oŒokayždefaultstate_uhsstate_eint¬n Ao þp msdcsdio_wakeup Te,W+ K ë  ) 7 D  Z g   åS ñ] nqbluetooth@2mediatek,mt7921s-bluetoothˆždefault¬r 7,›usb@11281000#mediatek,mt8186-mtu3mediatek,mtu3 ˆ(-ÿ(> 5macippc$�/B/?/7)/@$“sys_ckref_ckmcu_ckdma_ckxhci_ck¬K støB+»  j$Œokayusb@11280000'mediatek,mt8186-xhcimediatek,mtk-xhciˆ(5mac$�/B/?/7)/@$“sys_ckref_ckmcu_ckdma_ckxhci_ck¬DŒokay 5ut-phy@11c80000.mediatek,mt8186-tphymediatek,generic-tphy-v2+»ÈŒokayusb-phy@0ˆ�)“ref y¿susb-phy@700ˆ �)“ref y¿tt-phy@11ca0000.mediatek,mt8186-tphymediatek,generic-tphy-v2+»ÊŒokayusb-phy@0ˆ�)“ref y „¿iefuse@11cb0000%mediatek,mt8186-efusemediatek,efuseˆË+lvts1-calib@1ccˆÌ¿_lvts2-calib@2f8ˆø¿`calib@550ˆPP¿agpu-speedbin@59cˆœ ”¿wsocinfo-data1@7a0ˆ dsi-phy@11cc0000mediatek,mt8183-mipi-txˆÌ�)f y ˆmipi_tx0_pllŒokay¿clock-controller@13000000mediatek,mt8186-mfgsysˆf¿vgpu@13040000&mediatek,mt8186-maliarm,mali-bifrostˆ@�v0¬ jobmmugpuøBB ™core0core1ɵw Áspeed-binŸx#OŒokay ¬0¿™syscon@14000000mediatek,mt8186-mmsyssysconˆf(ñyy ¸y¿1mutex@14001000mediatek,mt8186-disp-mutexˆ�1¬' ¸y в³øBsmi@14002000mediatek,mt8186-smi-commonˆ  �1111“apbsmigals0gals1øB¿zsmi@14003000mediatek,mt8186-smi-larbˆ0�11“apbsmi ä õzøB¿�smi@14004000mediatek,mt8186-smi-larbˆ@�11“apbsmi ä õzøB¿‚ovl@140050002mediatek,mt8186-disp-ovlmediatek,mt8192-disp-ovlˆP�1¬) { ¸yPøBovl@140060008mediatek,mt8186-disp-ovl-2lmediatek,mt8192-disp-ovl-2lˆ`�1¬* {! ¸y`øBrdma@140070004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmaˆp�1¬+ {" ¸ypøBcolor@140090006mediatek,mt8186-disp-colormediatek,mt8173-disp-colorˆ��1 ¬- ¸y€øBdpi@1400a000mediatek,mt8186-dpiˆ �-;1 “pixelenginepllk-;{-j¬5øB Œdisabledždefaultsleep¬| A}portendpoint”~¿[ccorr@1400b0006mediatek,mt8186-disp-ccorrmediatek,mt8192-disp-ccorrˆ°�1¬. ¸y°øBaal@1400c0002mediatek,mt8186-disp-aalmediatek,mt8183-disp-aalˆÀ�1¬0 ¸yÀøBgamma@1400d0006mediatek,mt8186-disp-gammamediatek,mt8183-disp-gammaˆÐ�1 ¬1 ¸yÐøBpostmask@1400e000<mediatek,mt8186-disp-postmaskmediatek,mt8192-disp-postmaskˆà�1 ¬2 ¸yàøBdither@1400f0008mediatek,mt8186-disp-dithermediatek,mt8183-disp-ditherˆð�1¬3 ¸yðøBdsi@14013000mediatek,mt8186-dsiˆ0�11“enginedigitalhs¬7øB®1  dphyŒokayportendpoint”€¿Liommu@14016000mediatek,mt8186-iommu-mmˆ`�1“bclk¬98 �‚ƒ„…†‡ˆ‰Š‹Œ�ŽøB "¿{rdma@1401f0004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmaˆð�1¬4 {  ¸yðøBclock-controller@14020000mediatek,mt8186-wpesysˆf¿7smi@14023000mediatek,mt8186-smi-larbˆ0�77“apbsmi ä õzøB¿†clock-controller@15020000mediatek,mt8186-imgsys1ˆf¿4smi@1502e000mediatek,mt8186-smi-larbˆà�44“apbsmi ä  õzøB¿‡clock-controller@15820000mediatek,mt8186-imgsys2ˆ‚f¿�smi@1582e000mediatek,mt8186-smi-larbˆ‚à�4�“apbsmi ä  õzøB¿ˆvideo-decoder@16000000mediatek,mt8186-vcodec-decˆ»+·@ÿð {€ /�video-codec@16025000mediatek,mtk-vcodec-coreˆP¬W` {€{�{‚{ƒ{„{…{†{‡{ˆ{‰{Š{‹ �-)22-U%“vdec-selvdec-soc-vdecvdecvdec-topk-){-UøBsmi@1602e000mediatek,mt8186-smi-larbˆà�22“apbsmi ä õzøB¿„clock-controller@1602f000mediatek,mt8186-vdecsysˆðf¿2clock-controller@17000000mediatek,mt8186-vencsysˆf¿6smi@17010000mediatek,mt8186-smi-larbˆ�66“apbsmi ä õzøB ¿…video-encoder@170200006mediatek,mt8186-vcodec-encmediatek,mt8183-vcodec-encˆ ¬óH {à{á{â{ã{ä{å{æ{ç{è�6 “venc_selk-${-UøB  /�jpeg-encoder@17030000+mediatek,mt8186-jpgencmediatek,mtk-jpgencˆ¬õ�6“jpgenc {é{ê{ë{ìøB clock-controller@1a000000mediatek,mt8186-camsysˆf¿3smi@1a001000mediatek,mt8186-smi-larbˆ�33“apbsmi ä  õzøB ¿‰smi@1a002000mediatek,mt8186-smi-larbˆ �33“apbsmi ä õzøB ¿Šsmi@1a00f000mediatek,mt8186-smi-larbˆð�3‘“apbsmi ä õzøB ¿‹smi@1a010000mediatek,mt8186-smi-larbˆ�3’“apbsmi ä õzøB ¿Œclock-controller@1a04f000mediatek,mt8186-camsys_rawaˆðf¿‘clock-controller@1a06f000mediatek,mt8186-camsys_rawbˆðf¿’clock-controller@1b000000mediatek,mt8186-mdpsysˆf¿“smi@1b002000mediatek,mt8186-smi-larbˆ �“““apbsmi ä õzøB¿ƒclock-controller@1c000000mediatek,mt8186-ipesysˆf¿5smi@1c00f000mediatek,mt8186-smi-larbˆð�55“apbsmi ä õzøB ¿Žsmi@1c10f000mediatek,mt8186-smi-larbˆð�55“apbsmi ä õzøB ¿�thermal-zonescpu-little0-thermal <è J– `”tripstrip-alert0 pL |Ðpassive¿•trip-alert1 ps |Ðhottrip-crit p†  | criticalcooling-mapsmap0 ‡•H Œÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu-little1-thermal <è J– `”tripstrip-alert0 pL |Ðpassive¿–trip-alert1 ps |Ðhottrip-crit p†  | criticalcooling-mapsmap0 ‡–H Œÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu-little2-thermal <è J– `”tripstrip-alert0 pL |Ðpassive¿—trip-alert1 ps |Ðhottrip-crit p†  | criticalcooling-mapsmap0 ‡—H Œÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcam-thermal <è Jú `”tripstrip-alert0 pL |Ðpassivetrip-alert1 ps |Ðhottrip-crit p†  | criticalnna-thermal <è Jú `”tripstrip-alert0 pL |Ðpassivetrip-alert1 ps |Ðhottrip-crit p†  | criticaladsp-thermal <è Jú `”tripstrip-alert0 pL |Ðpassivetrip-alert1 ps |Ðhottrip-crit p†  | criticalgpu-thermal <è Jú `”tripstrip-alert0 pL |Ðpassive¿˜trip-alert1 ps |Ðhottrip-crit p†  | criticalcooling-mapsmap0 ‡˜ Œ™ÿÿÿÿÿÿÿÿcpu-big0-thermal <è Jd `”tripstrip-alert0 pL |Ðpassive¿štrip-alert1 ps |Ðhottrip-crit p†  | criticalcooling-mapsmap0 ‡š Œÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu-big1-thermal <è Jd `”tripstrip-alert0 pL |Ðpassive¿›trip-alert1 ps |Ðhottrip-crit p†  | criticalcooling-mapsmap0 ‡› Œÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿchosen ›serial0:115200n8memory@40000000ùmemoryˆ@backlight-lcd0pwm-backlight §œ¡ ¯� *,˜ ¬ÿ ¾ÿ Õ@¿Obt-sco linux,bt-sco'dmic-codec dmic-codec' î û2gpio-keys gpio-keysždefault¬žpen-insert-switch NPen Insert 1,    *regulator-pp1800-dpbrdg-dxregulator-fixedždefault¬Ÿ 1,'›pp1800_dpbrdg_dx ; N]¿Yregulator-pp3300-disp-xregulator-fixedždefault¬  1,™›pp3300_disp_x ; Y N^¿Nregulator-pp3300-ldo-z5regulator-fixed›pp3300_ldo_z5# Yª2Z Â2Z  N�regulator-pp3300-s3regulator-fixed ›pp3300_s3# Y N^¿Sregulator-pp3300-z2regulator-fixed ›pp3300_z2# Yª2Z Â2Z  N�¿^regulator-pp4200-z2regulator-fixed ›pp4200_z2# Yª@@Â@@ N�¿9regulator-pp5000-z2regulator-fixed ›pp5000_z2# YªLK@ÂLK@ N�¿ºregulator-ppvar-sysregulator-fixed ›ppvar_sys# Y¿�reserved-memory+»audio-dma-poolshared-dma-poolh k u¿hmemory@61000000shared-dma-poolˆa u¿Cmemory@60000000shared-dma-poolˆ` u¿Dmemory@50000000shared-dma-poolˆP  u¿?sound,mediatek,mt8186-mt6366-rt1019-rt5682s-soundCžaud_clk_mosi_offaud_clk_mosi_onaud_clk_miso_offaud_clk_miso_onaud_dat_miso_offaud_dat_miso_onaud_dat_mosi_offaud_dat_mosi_onaud_gpio_i2s0_offaud_gpio_i2s0_onaud_gpio_i2s1_offaud_gpio_i2s1_onaud_gpio_i2s2_offaud_gpio_i2s2_onaud_gpio_i2s3_offaud_gpio_i2s3_onaud_gpio_pcm_offaud_gpio_pcm_onaud_gpio_dmic_sec¬¡ A¢ þ£ |¤ †¥ �¦ š§ ¤¨ ®© ¸ª « ͬ Ø­ ã® î¯ ù°±²³%´3µIEHeadphoneHPOLHeadphoneHPORIN1PHeadset MicSpeakersSpeakerHDMI1TX7mt8186_rt1019_rt5682shs-playback-dai-linkSI2S0]i2shcpucodec~¶hs-capture-dai-linkSI2S1]i2shcpucodec~¶spk-share-dai-linkSI2S2hcpuspk-hdmi-playback-dai-linkSI2S3]i2shcpucodec~·¸speaker-codecrealtek,rt1019pždefault¬¹' ˆ,–¿¸regulator-usb-p1-vbusregulator-fixed ’,”›vbus1ªLK@ÂLK@ ; Nº¿uwifi-pwrseqmmc-pwrseq-simpleždefault¬»—2 7,6¿qwifi-wakeup gpio-keysždefault¬¼wowlan-event NWake on WiFi 1, � regulator-pp1000-edpbrdgregulator-fixed›pp1000_edpbrdgždefault¬½ ; Y ’, N^¿Iregulator-pp1800-edpbrdg-dxregulator-fixed›pp1800_edpbrdg_dxždefault¬¾ ; Y ’, N]¿Jregulator-pp3300-edp-dxregulator-fixed›pp3300_edp_dxždefault¬¿ ; Y ’, N^¿K compatibleinterrupt-parent#address-cells#size-cellsmodelovl0ovl-2l0rdma0rdma1i2c0i2c1i2c2i2c3i2c5mmc0mmc1serial0clocksregstatusclock-namesoperating-points-v2proc-supplyphandleopp-sharedopp-hzopp-microvoltrequired-oppscpudevice_typeenable-methodclock-frequencydynamic-power-coefficientcapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-divclock-multclock-output-namesopp-supported-hwinterruptsdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxinput-enablebias-pull-downinput-schmitt-enablebias-disableoutput-lowdrive-strengthoutput-highbias-pull-up#power-domain-cellsdomain-supplymediatek,infracfgmediatek,disable-extrstmediatek,reset-by-toprguinterrupts-extendedAvdd-supplymediatek,dmic-modevsys-ldo1-supplyvsys-ldo2-supplyvsys-ldo3-supplyvsys-vcore-supplyvsys-vdram1-supplyvsys-vgpu-supplyvsys-vmodem-supplyvsys-vpa-supplyvsys-vproc11-supplyvsys-vproc12-supplyvsys-vs1-supplyvsys-vs2-supplyvs1-ldo1-supplyvs2-ldo1-supplyvs2-ldo2-supplyvs2-ldo3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-allowed-modesregulator-always-onregulator-coupled-withregulator-coupled-max-spreadassigned-clocksassigned-clock-parents#mbox-cellspinctrl-namespinctrl-0firmware-namememory-regionmediatek,rpmsg-namembox-namesmboxespower-domainsspi-max-frequency#io-channel-cellsenable-gpiosreset-gpiosvdd10-supplyvdd18-supplyvdd33-supplyanalogix,lane0-swinganalogix,lane1-swingremote-endpointdata-lanespower-supplybacklighti2c-scl-internal-delay-nsgoodix,no-reset-during-suspendvcc-supplywakeup-sourcehid-descr-addr#sound-dai-cellsovdd-supplypwr18-supplyextconlink-frequenciesAVDD-supplyDBVDD-supplyLDO1-IN-supplyMICVDD-supplyrealtek,jd-srcresetsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreset-names#pwm-cellsmediatek,pad-selectgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countlabelpower-roledata-roletry-power-rolegoogle,usb-port-idkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapcs-gpiosmediatek,apmixedsysmediatek,topckgenphysmediatek,syscon-wakeupvbus-supplypinctrl-1bus-widthnon-removablecap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqeno-sdno-sdiocap-mmc-hw-reseths400-ds-delaymediatek,hs400-ds-dly3vmmc-supplyvqmmc-supplypinctrl-2interrupt-namescap-sd-highspeedsd-uhs-sdr104sd-uhs-sdr50keep-power-in-suspendcap-sdio-irqno-mmcmmc-pwrseq#phy-cellsmediatek,discthbitspower-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusphy-namesmediatek,larbs#iommu-cellsmediatek,scppolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathpwmsbrightness-levelsnum-interpolated-stepsdefault-brightness-levelnum-channelswakeup-delay-mswakeup-event-actionlinux,codelinux,input-typeenable-active-highvin-supplyregulator-boot-onalignmentno-mappinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9pinctrl-10pinctrl-11pinctrl-12pinctrl-13pinctrl-14pinctrl-15pinctrl-16pinctrl-17pinctrl-18mediatek,adspmediatek,platformaudio-routinglink-namedai-formatmediatek,clk-providersound-daisdb-gpiosgpiopost-power-on-delay-ms