Ð þí„á8|d(}|,$mediatek,mt8173-evbmediatek,mt8173 +!7MediaTek MT8173 evaluation board =embeddedaliasesJ/soc/ovl@1400c000O/soc/ovl@1400d000T/soc/rdma@1400e000Z/soc/rdma@1400f000`/soc/rdma@14010000f/soc/wdma@14011000l/soc/wdma@14012000r/soc/color@14013000y/soc/color@14014000€/soc/split@14018000‡/soc/split@14019000Ž/soc/dpi@1401d000“/soc/dsi@1401b000˜/soc/dsi@1401c000�/soc/rdma@14001000§/soc/rdma@14002000±/soc/rsz@14003000º/soc/rsz@14004000Ã/soc/rsz@14005000Ì/soc/wdma@14006000Ö/soc/wrot@14007000à/soc/wrot@14008000ê/soc/serial@11002000ò/soc/serial@11003000ú/soc/serial@11004000/soc/serial@11005000opp-table-0operating-points-v2  opp-50700000084À$ xopp-702000000)׫€$ Úàopp-1001000000;ª @$ÿØopp-1105000000AÜö@$ehopp-1209000000Hà@$Çopp-1300000000M|m$ èopp-1508000000YâA$ìopp-1703000000e�·À$*ˆopp-table-1operating-points-v2  opp-50700000084À$ ¢`opp-702000000)׫€$ :¸opp-1001000000;ª @$%opp-1209000000Hà@$Å@opp-1404000000S¯W$]˜opp-1612000000`+$¨opp-1807000000k´¡À$�èopp-2106000000}‡€$*ˆcpus+cpu-mapcluster0core02core12cluster1core02core12cpu@06cpuarm,cortex-a53BFpsciTds� ”cpuintermediate  ´äÇ cpu@16cpuarm,cortex-a53BFpsciTds� ”cpuintermediate  ´äÇ cpu@1006cpuarm,cortex-a72BFpsciTds�”cpuintermediate  ´Ç Ó cpu@1016cpuarm,cortex-a72BFpsciTds�”cpuintermediate  ´Ç Ó idle-statesßpscicpu-sleep-0arm,idle-stateìý¨@/pmu-a53arm,cortex-a53-pmuF Qpmu-a72arm,cortex-a72-pmuF  Qpsci#arm,psci-1.0arm,psci-0.2arm,psciMsmcd„p„x„oscillator0 fixed-clockŒŒº€œclk26moscillator1 fixed-clockŒ}œclk32koscillator2 fixed-clockŒœcpum_ckthermal-zonescpu-thermal¯èÅèÓãÜtripstrip-point0õ  ÐEpassivetrip-point1õLÐEpassivecpu-crit0õÁ8Ð Ecriticalcooling-mapsmap0 ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ map1 ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ reserved-memory+-audio-dma-poolshared-dma-pool49C(vpu-dma-mem@b7000000shared-dma-poolB·P9Ctimerarm,armv8-timer 0F   Jsoc+ simple-bus-clock-controller@10000000mediatek,mt8173-topckgenBclock-controller@10001000 mediatek,mt8173-infracfgsysconBaclock-controller@10003000mediatek,mt8173-pericfgsysconB0asyscon@10005000%mediatek,mt8173-pctl-a-syscfgsysconBPpinctrl@1000b000mediatek,mt8173-pinctrlB°nƒ“Ÿ´$F‘’“hdmi-hotplug-pinsBpins-htplgÅÌÙi2c0-pinspins-busÅ-.èi2c1-pins pins-busÅ}~èpins-da9211Åõi2c2-pins!pins-busÅ+,èi2c3-pins%pins-busÅjkèi2c4-pins&pins-busÅ…†èi2c6-pins'pins-busÅdeèdisp-pwm0-pins@pins1ÅWmmc0-default-pins)pins-cmd-dat$Å9:;<=>?@BÌõpins-clkÅAÙpins-rstÅDõmmc1-default-pins-pins-cmd-datÅIJKLNÌ õfpins-clkÅMÙ pins-insertÅ„õmmc0-uhs-pins*pins-cmd-dat$Å9:;<=>?@BÌ õepins-clkÅA Ùepins-rstÅDõspi0-pins"pins-busÅEFGHmmc1-uhs-pins.pins-cmd-datÅIJKLNÌ õfpins-clkÅM Ùfusb-iddig-pu-pins7pins-iddig-puÅõusb-iddig-pd-pinspins-iddig-pdÅÙsyscon@10006000)mediatek,mt8173-scpsyssysconsimple-mfdB`power-controller!mediatek,mt8173-power-controller+power-domain@0B�U”mmpower-domain@1B�UX”mmvencpower-domain@2B�U”mmpower-domain@3B�U”mm0power-domain@4B�Ui ”mmvencltpower-domain@5Bpower-domain@6Bpower-domain@7B�”mfg+Bpower-domain@8B+power-domain@9B 0watchdog@10007000(mediatek,mt8173-wdtmediatek,mt6589-wdtBptimer@10008000,mediatek,mt8173-timermediatek,mt6577-timerB€ F�� xpwrap@1000d000mediatek,mt8173-pwrapBÐPpwrap F™Zapwrap�   ”spiwrapmpmicmediatek,mt6397 { Ÿ´regulatorsmediatek,mt6397-regulatorbuck_vpca15�vpca15ž ®`¶™pÎ0Ôã buck_vpca7�vpca7ž ®`¶™pÎ0Ô÷sbuck_vsramca15 �vsramca15ž ®`¶™pÎ0Ôãbuck_vsramca7 �vsramca7ž ®`¶™pÎ0Ôã buck_vcore�vcorež ®`¶™pÎ0Ôãbuck_vgpu�vgpuž ®`¶™pÎ0Ô÷sbuck_vdrm�vdrmžO€¶\ÀÎ0Ôãbuck_vio18�vio18ž¸ ¶6`Î0Ôã,ldo_vtcxo�vtcxoãldo_va28�va28ãldo_vcama�vcamažã`¶*¹€÷Úldo_vio28�vio28ãldo_vusb�vusb4ldo_vmc�vmcžw@¶2Z ÷Ú0ldo_vmch�vmchž-ÆÀ¶2Z ÷Ú/ldo_vemc3v3 �vemc_3v3ž-ÆÀ¶2Z ÷Ú+ldo_vgp1�vcamdž� ¶2Z ÷ðldo_vgp2�vcamiožB@¶2Z ÷Úldo_vgp3�vcamafžO€¶2Z ÷Úldo_vgp4�vgp4žO€¶2Z ÷Úldo_vgp5�vgp5žO€¶-ÆÀ÷Úldo_vgp6�vgp6žO€¶2Z ÷Úldo_vibr�vibržÖ ¶2Z ÷Úcec@10013000mediatek,mt8173-cecB0¼ F§� okayvpu@10020000mediatek,mt8173-vpu B Ptcmcfg_reg F¦�g”main<interrupt-controller@10200620.mediatek,mt8173-sysirqmediatek,mt6577-sysirqŸ´ B  iommu@10205000mediatek,mt8173-m4uB P F‹�”bclk0(7;efuse@10206000mediatek,mt8173-efuseB `+socinfo-data1@40B@socinfo-data2@44BDcalib@528B( $clock-controller@10209000mediatek,mt8173-apmixedsysB �hdmi-phy@10209100mediatek,mt8173-hdmi-phyB ‘$�”pll_refœhdmitx_dig_ctsD SeokayCmailbox@10212000mediatek,mt8173-gceB!  F‡�”gcep9dsi-phy@10215000mediatek,mt8173-mipi-txB!P� œmipi_tx0_plle disabled=dsi-phy@10216000mediatek,mt8173-mipi-txB!`� œmipi_tx1_plle disabled>interrupt-controller@10221000 arm,gic-400´ Ÿ@B"" "@ "`  F auxadc@11001000mediatek,mt8173-auxadcB�”main|#serial@11002000*mediatek,mt8173-uartmediatek,mt6577-uartB  FS�$ ”baudbusokayserial@11003000*mediatek,mt8173-uartmediatek,mt6577-uartB0 FT�% ”baudbus disabledserial@11004000*mediatek,mt8173-uartmediatek,mt6577-uartB@ FU�& ”baudbus disabledserial@11005000*mediatek,mt8173-uartmediatek,mt6577-uartBP FV�' ”baudbus disabledi2c@11007000mediatek,mt8173-i2c Bpp€ FLŽ�  ”maindma˜default¦+ disabledi2c@11008000mediatek,mt8173-i2c B€p€€ FMŽ�  ”maindma˜default¦ +okayda9211@68 dlg,da9211Bh {regulatorsBUCKA�VBUCKAž ®`¶ý0°„€ÇC#€Î'ã BUCKB�VBUCKBž ®`¶ý0°„€Ç-ÆÀÎ'i2c@11009000mediatek,mt8173-i2c B�p€ FNŽ�  ”maindma˜default¦!+ disabledspi@1100a000mediatek,mt8173-spi+B  Fn�4\”parent-clksel-clkspi-clkokay˜default¦"Þthermal@1100b000òmediatek,mt8173-thermalB° FF� ”thermauxadcZ#,$8calibration-dataspi@1100d000mediatek,mt8173-norBÐàI\Y�!r ”spisfaxi+ disabledi2c@11010000mediatek,mt8173-i2c Bp€€ FOŽ�  ”maindma˜default¦%+ disabledi2c@11011000mediatek,mt8173-i2c Bp€ FPŽ�  ”maindma˜default¦&+ disabledi2c@11012000mediatek,mt8173-hdmi-ddc FQB �”ddc-i2ci2c@11013000mediatek,mt8173-i2c B0p€€ FRŽ�#  ”maindma˜default¦'+ disabledaudio-controller@11220000mediatek,mt8173-afe-pcmB" F†mP�dey…†‡ˆ‰b”infra_sys_audio_clktop_pdn_audiotop_pdn_aud_intbusbck0bck1i2s0_mi2s1_mi2s2_mi2s3_mi2s3_bImnY(mmc@11230000mediatek,mt8173-mmcB# FG�_ ”sourcehclkokay˜defaultstate_uhs¦)p*z„úð€’¤ÁÞ+ ,mmc@11240000mediatek,mt8173-mmcB$ FH�R ”sourcehclkokay˜defaultstate_uhs¦-p.z„úð€(9 F„/ 0mmc@11250000mediatek,mt8173-mmcB% FI�R ”sourcehclk disabledmmc@11260000mediatek,mt8173-mmcB& FJ�u ”sourcehclk disabledusb@11271000#mediatek,mt8173-mtu3mediatek,mtu3 B'0( Pmacippc F@O123m �^”sys_ckref_ck T+-okayk4y5…6Œotg”˜default¦7usb@11270000'mediatek,mt8173-xhcimediatek,mtk-xhciB'Pmac Fsm �^”sys_ckref_ckokayk4y8t-phy@11290000mediatek,mt8173-u3phyB)+-okayusb-phy@11290800B)�”refeokay1usb-phy@11290900B) �”refeokay2usb-phy@11291000B)�”refeokay3syscon@14000000mediatek,mt8173-mmsyssysconBmIU¢ׄa·99¾9:rdma@14001000-mediatek,mt8173-mdp-rdmamediatek,mt8173-mdpB�::mÖ;Ý<rdma@14002000mediatek,mt8173-mdp-rdmaB �::mÖ;„rsz@14003000mediatek,mt8173-mdp-rszB0�:mrsz@14004000mediatek,mt8173-mdp-rszB@�:mrsz@14005000mediatek,mt8173-mdp-rszBP�:mwdma@14006000mediatek,mt8173-mdp-wdmaB`�: mÖ;wrot@14007000mediatek,mt8173-mdp-wrotBp�: mÖ;wrot@14008000mediatek,mt8173-mdp-wrotB€�: mÖ;…ovl@1400c000mediatek,mt8173-disp-ovlBÀ F´m�:Ö;¾9Àovl@1400d000mediatek,mt8173-disp-ovlBÐ Fµm�:Ö;€¾9Ðrdma@1400e000mediatek,mt8173-disp-rdmaBà F¶m�:Ö;¾9àrdma@1400f000mediatek,mt8173-disp-rdmaBð F·m�:Ö;�¾9ðrdma@14010000mediatek,mt8173-disp-rdmaB F¸m�:Ö;‚¾9wdma@14011000mediatek,mt8173-disp-wdmaB F¹m�:Ö;¾9wdma@14012000mediatek,mt8173-disp-wdmaB  Fºm�:Ö;ƒ¾9 color@14013000mediatek,mt8173-disp-colorB0 F»m�:¾90color@14014000mediatek,mt8173-disp-colorB@ F¼m�:¾9@aal@14015000mediatek,mt8173-disp-aalBP F½m�:¾9Pgamma@14016000mediatek,mt8173-disp-gammaB` F¾m�:¾9`merge@14017000mediatek,mt8173-disp-mergeBpm�:split@14018000mediatek,mt8173-disp-splitB€m�:split@14019000mediatek,mt8173-disp-splitB�m�:ufoe@1401a000mediatek,mt8173-disp-ufoeB  F¿m�:¾9 dsi@1401b000mediatek,mt8173-dsiB° FÀm�:$:%=”enginedigitalhsZ:O=êdphy disableddsi@1401c000mediatek,mt8173-dsiBÀ FÁm�:&:'>”enginedigitalhsO>êdphy disableddpi@1401d000mediatek,mt8173-dpiBÐ FÂm�:(:)”pixelenginepllokayportendpointô?Dpwm@1401e000mediatek,mt8173-disp-pwmBà�:!: ”mainmmokay˜default¦@pwm@1401f000mediatek,mt8173-disp-pwmBð�:#:"”mainmm disabledmutex@14020000mediatek,mt8173-disp-mutexB F©m�:¾956larb@14021000mediatek,mt8173-smi-larbB#Am�::”apbsmismi@14022000mediatek,mt8173-smi-commonB m�::”apbsmiAod@14023000mediatek,mt8173-disp-odB0�:¾90hdmi@14025000mediatek,mt8173-hdmiBP FÎ �:,:-:.:/”pixelpllbclkspdif˜default¦BOCêhdmi0: IsYCokayports+port@0BendpointôD?port@1BendpointôEJlarb@14027000mediatek,mt8173-smi-larbBp#Am�:2:2”apbsmiclock-controller@15000000mediatek,mt8173-imgsyssysconBFlarb@15001000mediatek,mt8173-smi-larbB#Am�FF”apbsmiclock-controller@16000000mediatek,mt8173-vdecsyssysconBGvcodec@16020000mediatek,mt8173-vcodec-dec°B 0@Phpx„(Pmiscldtopcmadavpphwdhwqhwbhwg FÌ@Ö; ;!;%;&;';";#;$Ý<EGm@� >lWMiNZ”vcodecpllunivpll_d2clk_cci400_selvdec_selvdecpllvencpllvenc_lt_selvdec_bus_clk_src(IilW YN>M¢XU†€/¯larb@16010000mediatek,mt8173-smi-larbB#Am�GG”apbsmiclock-controller@18000000mediatek,mt8173-vencsyssysconBHlarb@18001000mediatek,mt8173-smi-larbB#Am�HH”apbsmivcodec@18002000mediatek,mt8173-vcodec-encB  FÆXÖ;`;a;b;c;d;i;j;k;l;m;nÝ<�X ”venc_selIXYMmjpegdec@18004000mediatek,mt8173-jpgdecB@ FË�HH”jpgdec-smijpgdecmÖ;g;hclock-controller@19000000!mediatek,mt8173-vencltsyssysconBIlarb@19001000mediatek,mt8173-smi-larbB#Am�II”apbsmivcodec@19002000mediatek,mt8173-vcodec-enc-vp8B  FÊHÖ; ;¡;¤;¨;§;¥;¦;¢;£Ý<�i ”venc_lt_selIiYNmmemory@400000006memoryB@€chosenconnectorhdmi-connectorVhdmiEdportendpointôJEextcon_iddiglinux,extcon-usb-gpio \6regulator-usb-p1regulator-fixed �usb_vbusžLK@¶LK@ e‚j8regulator-usb-p0regulator-fixed�vbusžLK@¶LK@ e j5 compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl1rdma0rdma1rdma2wdma0wdma1color0color1split0split1dpi0dsi0dsi1mdp-rdma0mdp-rdma1mdp-rsz0mdp-rsz1mdp-rsz2mdp-wdma0mdp-wrot0mdp-wrot1serial0serial1serial2serial3opp-sharedphandleopp-hzopp-microvoltcpudevice_typeregenable-methodcpu-idle-states#cooling-cellsdynamic-power-coefficientclocksclock-namesoperating-points-v2capacity-dmips-mhzproc-supplysram-supplyentry-methodlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usarm,psci-suspend-paraminterruptsinterrupt-affinitycpu_suspendcpu_offcpu_on#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionrangessizealignmentno-maparm,no-tick-in-suspend#reset-cellsmediatek,pctl-regmapgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinmuxinput-enablebias-pull-downbias-disablebias-pull-upoutput-lowdrive-strength#power-domain-cellsmediatek,infracfgdomain-supplyreg-namesresetsreset-namespower-domainsinterrupts-extendedregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-enable-ramp-delaystatusmemory-regionmediatek,larbs#iommu-cellsmediatek,ibiasmediatek,ibias_up#phy-cells#mbox-cells#io-channel-cellsclock-divpinctrl-namespinctrl-0regulator-min-microampregulator-max-microampmediatek,pad-select#thermal-sensor-cellsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namesassigned-clocksassigned-clock-parentspinctrl-1bus-widthmax-frequencycap-mmc-highspeedmediatek,hs200-cmd-int-delaymediatek,hs400-cmd-int-delaymediatek,hs400-cmd-resp-sel-risingvmmc-supplyvqmmc-supplynon-removablecap-sd-highspeedsd-uhs-sdr25cd-gpiosphysmediatek,syscon-wakeupvusb33-supplyvbus-supplyextcondr_modewakeup-sourceassigned-clock-ratesmboxesmediatek,gce-client-regiommusmediatek,vpuphy-namesremote-endpoint#pwm-cellsmediatek,gce-eventsmediatek,smimediatek,syscon-hdmimediatek,vdecsyslabelid-gpiosgpioenable-active-high