w8n,( m<bananapi,bpi-r4-pro-8xbananapi,bpi-r4-promediatek,mt7988a +7Bananapi BPI-R4 Pro 8Xcci(mediatek,mt7988-ccimediatek,mt8183-cci=DcciintermediatePdpopp-table-ccioperating-points-v2xpopp-4800000008 Popp-660000000'V Popp-9000000005 Popp-1080000000@_~ cpus+cpu@0arm,cortex-a73cpupsci=DcpuintermediatePdp:cpu@1arm,cortex-a73cpupsci=DcpuintermediatePdp;cpu@2arm,cortex-a73cpupsci=DcpuintermediatePdp<cpu@3arm,cortex-a73cpupsci=DcpuintermediatePdp=opp-table-0operating-points-v2xpopp-800000000/ Popp-1100000000A Popp-1500000000Yh/ Popp-1800000000kI oscillator-40m fixed-clockbZclkxtalpmuarm,cortex-a73-pmu  psci arm,psci-0.2smcreserved-memory+secmon@43000000Csoc simple-bus+interrupt-controller@c000000 arm,gic-v3P   @ A B     !pclock-controller@10001000 mediatek,mt7988-infracfgsyscon2p clock-controller@1001b000 mediatek,mt7988-topckgensysconpwatchdog@1001c000mediatek,mt7988-wdt n2?okayp!clock-controller@1001e000mediatek,mt7988-apmixedsysppinctrl@1001f000mediatek,mt7988-pinctrlp7Fgpioiocfg_triocfg_briocfg_rbiocfg_lbiocfg_tleintP`lT   !ppcie0-pinspmuxxpcie3pcie_2l_0_peresetpcie_clk_req_n0_0pcie_wake_n0_0pcie1-pinspmuxxpcie1pcie_2l_1_peresetpcie_clk_req_n1pcie_wake_n1_0pcie2-pinspmuxxpcie3pcie_1l_0_peresetpcie_clk_req_n2_0pcie_wake_n2_0pcie3-pinspmuxxpcie1pcie_1l_1_peresetpcie_clk_req_n3pcie_wake_n3_0spi1-pinspmuxxspispi1uart0-pinsp muxxuartuart0gbe0-led0-pinsp)muxxled gbe0_led0i2c0-g0-pinsp muxxi2ci2c0_1i2c1-g0-pinsp muxxi2ci2c1_0i2c2-g1-pinspmuxxi2ci2c2_1mdio0-pinsp/muxxeth mdc_mdio0confSMI_0_MDCSMI_0_MDIOmmc0-emmc-51-pinsp>muxxflashemmc_51mmc0-sdcard-pinsp?muxxflashsdcardpcie-2-hogOpcie-3-hog?pwm0-pinsp5muxpwm0xpwmspi0-flash-pinspmuxxspispi0spi0_wp_holdpwm@10048000mediatek,mt7988-pwmP=         !1Dtopmainpwm1pwm2pwm3pwm4pwm5pwm6pwm7pwm8?okayp6mcusys@100e0000mediatek,mt7988-mcusyssysconpserial@11000000*mediatek,mt7988-uartmediatek,mt6577-uart { uartwakeup=' / Dbaudbusdefault ?okayp@serial@11000100*mediatek,mt7988-uartmediatek,mt6577-uart | uartwakeup=' 0 Dbaudbus ?disabledserial@11000200*mediatek,mt7988-uartmediatek,mt6577-uart } uartwakeup=' 1 Dbaudbus ?disabledi2c@11003000mediatek,mt7981-i2c 0!p = . * Dmaindma+?okay defaultpArt5190a@64richtek,rt5190ad   pBregulatorsbuck1rt5190a-buck1'M?MWop buck2vcore' '?\obuck3vproc' '?\opbuck4rt5190a-buck4'w@?w@Woldo rt5190a-ldo'w@?w@oi2c@11004000mediatek,mt7981-i2c @!q = . * Dmaindma+?okay defaultpCi2c@11005000mediatek,mt7981-i2c P!q = . * Dmaindma+?okaydefaultpDi2c-mux@70 nxp,pca9545p+pEi2c@0+pFi2c-gpio-expander@20 nxp,pca9555 P`p7rtc@51 nxp,pcf8563Qeeprom@57 atmel,24c02Wi2c@1+p8i2c@2+p9i2c@3+pGspi@11007000*mediatek,mt7988-spi-quadmediatek,spi-ipmp  =* 5 8 Dparent-clksel-clkspi-clkhclk+?okaydefaultpHnand@0 spi-nandupIpartitionsfixed-partitions+partition@0 bl2partition@200000 linux,ubi ubispi@11008000,mediatek,mt7988-spi-singlemediatek,spi-ipm  =+ 6 9 Dparent-clksel-clkspi-clkhclk+default ?disabledpJspi@11009000*mediatek,mt7988-spi-quadmediatek,spi-ipm  =* 7 : Dparent-clksel-clkspi-clkhclk+ ?disabledpKlvts@1100a000mediatek,mt7988-lvts-ap= -  lvts-calib-data-1p0usb@11190000'mediatek,mt7988-xhcimediatek,mtk-xhci .> Fmacippc (= K M I G U$Dsys_ckref_ckmcu_ckdma_ckxhci_ck ?okay%pLusb@11200000'mediatek,mt7988-xhcimediatek,mtk-xhci  . > Fmacippc (= L N J H V$Dsys_ckref_ckmcu_ckdma_ckxhci_ck ?okaypMmmc@11230000mediatek,mt7988-mmc #  = ? @ B A:()J Dsourcehclkaxi_cgahb_cg+ ?disabledpNpcie@11280000*mediatek,mt7986-pciemediatek,mt8192-pciepci+(  Fpcie-maca r8  = ] Y  a!Dpl_250mtl_26mperi_26mtop_133mdefault?okay  |pcie-phy!`pOinterrupt-controller! ppcie@11290000*mediatek,mt7986-pciemediatek,mt8192-pciepci+)  Fpcie-maca r8(( ( (  = ^ Z  b!Dpl_250mtl_26mperi_26mtop_133mdefault?okay!`pPinterrupt-controller! ppcie@11300000*mediatek,mt7986-pciemediatek,mt8192-pciepci+0  Fpcie-maca r800 0 0  = [ W  _!Dpl_250mtl_26mperi_26mtop_133mdefault?okay!`pQinterrupt-controller! ppcie@11310000*mediatek,mt7986-pciemediatek,mt8192-pciepci+1  Fpcie-maca r888 8 8  = \ X  `!Dpl_250mtl_26mperi_26mtop_133mdefault?okay!`pRinterrupt-controller! pt-phy@11c50000.mediatek,mt7986-tphymediatek,generic-tphy-v2+?okaypSusb-phy@0= TDrefpusb-phy@700 = RDrefpsystem-controller@11d10084mediatek,mt7988-topmiscsysconpxs-phy@11e10000%mediatek,mt7988-xsphymediatek,xsphy+9?okaypTusb-phy@0= SDrefpusb-phy@34004= QDref pphy@11f20000mediatek,mt7988-xfi-tphy= GDxfiplltopxtal!pUphy@11f30000mediatek,mt7988-xfi-tphy= HDxfiplltopxtal!pVclock-controller@11f40000mediatek,mt7988-xfi-pll!p efuse@11f50000%mediatek,mt7988-efusemediatek,efuse+soc-uuid@140@calib@918 (pcalib@940 @p(calib@954 Tp*calib@968 hp+calib@97c |p,clock-controller@15000000mediatek,mt7988-ethsyssyscon2p-switch@15020000mediatek,mt7988-switch ! "?okaypWports+port@0# internalmgmtpXport@1$ internal ?disabledpYport@2% internal ?disabledpZport@3& internal ?disabledp[port@6 ' internalfixed-link'%mdio++ethernet-phy@0ethernet-phy-ieee802.3-c22( phy-cal-data)gbe-ledp#leds+led@0?okay8p\led@1 ?disabledp]ethernet-phy@1ethernet-phy-ieee802.3-c22* phy-cal-data ?disabledp$leds+led@0 ?disabledp^led@1 ?disabledp_ethernet-phy@2ethernet-phy-ieee802.3-c22+ phy-cal-data ?disabledp%leds+led@0 ?disabledp`led@1 ?disabledpaethernet-phy@3ethernet-phy-ieee802.3-c22, phy-cal-data ?disabledp&leds+led@0 ?disabledpbled@1 ?disabledpcclock-controller@15031000mediatek,mt7988-ethwarp2p"ethernet@15100000mediatek,mt7988-eth`(fe0fe1fe2fe3pdma0pdma1pdma2pdma3=-----"""-"KLMNf$ade---DDcryptofegp2gp1gp3ethwarp_wocpu2ethwarp_wocpu1ethwarp_wocpu0eswtop_eth_gmii_seltop_eth_refck_50m_seltop_eth_sys_200m_seltop_eth_sys_seltop_eth_xgmii_seltop_eth_mii_seltop_netsys_seltop_netsys_500m_seltop_netsys_pao_2x_seltop_netsys_sync_250m_seltop_netsys_ppefb_250m_seltop_netsys_warp_selxgp1xgp2xgp30: !ABCE0J>.+C-S/default?okaypdmac@0mediatek,eth-mac internal?okayp'fixed-link'%mac@1mediatek,eth-mac ?disabledpemac@2mediatek,eth-mac ?disabledpfmdio-bus+pgethernet-phy@15ethernet-phy-ieee802.3-c45 ?disabledphsram@15400000 mmio-sram@ +@ p.thermal-zonescpu-thermale{0pitripscritH criticalpjhothotpkactive-high8activep2active-medLactivep3active-low@activep4cooling-mapsmap-cpu-active-high 12map-cpu-active-med 13map-cpu-active-low 14timerarm,armv8-timer 0   aliases/soc/ethernet@15100000/mac@0/soc/i2c@11003000/soc/i2c@11004000/soc/i2c@11005000#/soc/i2c@11005000/i2c-mux@70/i2c@0#/soc/i2c@11005000/i2c-mux@70/i2c@1#/soc/i2c@11005000/i2c-mux@70/i2c@2#/soc/i2c@11005000/i2c-mux@70/i2c@3chosen/soc/serial@11000000pwm-fanpwm-fanP5default  6P?okayp1gpio-keys gpio-keysbutton-resetreset   button-wpsWPS  gpio-leds gpio-ledssys-led-red8 7+onplsys-led-blue8 7+onpmregulator-dvdd1v8regulator-fixed DVDD1V8_SOC'w@?w@opnregulator-3v3vdregulator-fixed3V3VD'2Z?2Zoposfp1sff,sfp98 AF KE Zk ppsfp2sff,sfp99 A K Zk pq__symbols__/cci/opp-table-cci /cpus/cpu@0 /cpus/cpu@1 /cpus/cpu@2 /cpus/cpu@3/cpus/opp-table-0"/soc/interrupt-controller@c000000\/soc/clock-controller@10001000/soc/clock-controller@1001b000/soc/watchdog@1001c000/soc/clock-controller@1001e0004/soc/pinctrl@1001f000!/soc/pinctrl@1001f000/pcie0-pins!/soc/pinctrl@1001f000/pcie1-pins!/soc/pinctrl@1001f000/pcie2-pins!/soc/pinctrl@1001f000/pcie3-pins /soc/pinctrl@1001f000/spi1-pins!/soc/pinctrl@1001f000/uart0-pins%/soc/pinctrl@1001f000/gbe0-led0-pins#/soc/pinctrl@1001f000/i2c0-g0-pins#'/soc/pinctrl@1001f000/i2c1-g0-pins#1/soc/pinctrl@1001f000/i2c2-g1-pins!=/soc/pinctrl@1001f000/mdio0-pins(H/soc/pinctrl@1001f000/mmc0-emmc-51-pins'Z/soc/pinctrl@1001f000/mmc0-sdcard-pins k/soc/pinctrl@1001f000/pwm0-pins&u/soc/pinctrl@1001f000/spi0-flash-pins/soc/pwm@10048000/soc/mcusys@100e0000/soc/serial@11000000/soc/i2c@11003000/soc/i2c@11003000/rt5190a@64./soc/i2c@11003000/rt5190a@64/regulators/buck1./soc/i2c@11003000/rt5190a@64/regulators/buck3/soc/i2c@11004000/soc/i2c@11005000/soc/i2c@11005000/i2c-mux@70#/soc/i2c@11005000/i2c-mux@70/i2c@08/soc/i2c@11005000/i2c-mux@70/i2c@0/i2c-gpio-expander@20#/soc/i2c@11005000/i2c-mux@70/i2c@1#/soc/i2c@11005000/i2c-mux@70/i2c@2#/soc/i2c@11005000/i2c-mux@70/i2c@3/soc/spi@11007000/soc/spi@11007000/nand@0/soc/spi@11008000/soc/spi@11009000 /soc/lvts@1100a000/soc/usb@11190000/soc/usb@11200000/soc/mmc@11230000$/soc/pcie@11280000(*/soc/pcie@11280000/interrupt-controller5/soc/pcie@11290000(;/soc/pcie@11290000/interrupt-controllerF/soc/pcie@11300000(L/soc/pcie@11300000/interrupt-controllerW/soc/pcie@11310000(]/soc/pcie@11310000/interrupt-controllerh/soc/t-phy@11c50000m/soc/t-phy@11c50000/usb-phy@0 y/soc/t-phy@11c50000/usb-phy@700 /soc/system-controller@11d10084/soc/xs-phy@11e10000/soc/xs-phy@11e10000/usb-phy@0"/soc/xs-phy@11e10000/usb-phy@3400/soc/phy@11f20000/soc/phy@11f30000/soc/clock-controller@11f40000/soc/efuse@11f50000/calib@918/soc/efuse@11f50000/calib@940/soc/efuse@11f50000/calib@954/soc/efuse@11f50000/calib@968/soc/efuse@11f50000/calib@97cL/soc/clock-controller@15000000$/soc/switch@15020000"+/soc/switch@15020000/ports/port@0"5/soc/switch@15020000/ports/port@1"?/soc/switch@15020000/ports/port@2"I/soc/switch@15020000/ports/port@3)S/soc/switch@15020000/mdio/ethernet-phy@04\/soc/switch@15020000/mdio/ethernet-phy@0/leds/led@04j/soc/switch@15020000/mdio/ethernet-phy@0/leds/led@1)x/soc/switch@15020000/mdio/ethernet-phy@14/soc/switch@15020000/mdio/ethernet-phy@1/leds/led@04/soc/switch@15020000/mdio/ethernet-phy@1/leds/led@1)/soc/switch@15020000/mdio/ethernet-phy@24/soc/switch@15020000/mdio/ethernet-phy@2/leds/led@04/soc/switch@15020000/mdio/ethernet-phy@2/leds/led@1)/soc/switch@15020000/mdio/ethernet-phy@34/soc/switch@15020000/mdio/ethernet-phy@3/leds/led@04/soc/switch@15020000/mdio/ethernet-phy@3/leds/led@1/soc/clock-controller@15031000/soc/ethernet@15100000/soc/ethernet@15100000/mac@0/soc/ethernet@15100000/mac@1/soc/ethernet@15100000/mac@2 /soc/ethernet@15100000/mdio-bus0 /soc/ethernet@15100000/mdio-bus/ethernet-phy@15 /soc/sram@15400000 $/thermal-zones/cpu-thermal& 0/thermal-zones/cpu-thermal/trips/crit% >/thermal-zones/cpu-thermal/trips/hot- K/thermal-zones/cpu-thermal/trips/active-high, `/thermal-zones/cpu-thermal/trips/active-med, t/thermal-zones/cpu-thermal/trips/active-low /pwm-fan /gpio-leds/sys-led-red /gpio-leds/sys-led-blue /regulator-dvdd1v8 /regulator-3v3vd/sfp1/sfp2 compatibleinterrupt-parent#address-cells#size-cellsmodelclocksclock-namesoperating-points-v2proc-supplyphandleopp-sharedopp-hzopp-microvoltregdevice_typeenable-methodmediatek,cciclock-frequency#clock-cellsclock-output-namesinterruptsrangesno-mapinterrupt-controller#interrupt-cells#reset-cellsstatusreg-namesgpio-controller#gpio-cellsgpio-rangesfunctiongroupspinsdrive-strengthgpio-hoggpiosoutput-high#pwm-cellsinterrupt-namespinctrl-namespinctrl-0clock-divvin2-supplyvin3-supplyvin4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-allowed-modesregulator-boot-onregulator-always-onaddress-widthpagesizespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthlabel#thermal-sensor-cellsresetsnvmem-cellsnvmem-cell-namesphysmediatek,u3p-dis-mskassigned-clocksassigned-clock-parentslinux,pci-domainbus-rangephy-namesinterrupt-map-maskinterrupt-map#phy-cellsmediatek,syscon-typemediatek,usxgmii-performance-erratadsa,memberphy-handlephy-modeethernetspeedfull-duplexpausemediatek,piocolorsrammediatek,ethsysmediatek,infracfgpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresiscooling-devicetripethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6stdout-pathcooling-levelspwms#cooling-cellslinux,codedefault-statei2c-buslos-gpiosmod-def0-gpiostx-disable-gpiosmaximum-power-milliwattcci_oppcpu0cpu1cpu2cpu3cluster0_oppgictopckgenwatchdogapmixedsyspcie0_pinspcie1_pinspcie2_pinspcie3_pinsspi1_pinsuart0_pinsgbe0_led0_pinsi2c0_pinsi2c1_pinsi2c2_1_pinsmdio0_pinsmmc0_pins_emmc_51mmc0_pins_sdcardpwm0_pinsspi0_flash_pinspwmmcusysserial0rt5190a_64rt5190_buck1rt5190_buck3pca9545imux0pca9555imux1_sfp1imux2_sfp2imux3_wifispi0spi_nandspi1spi2lvtsssusb0ssusb1mmc0pcie2pcie_intc2pcie3pcie_intc3pcie0pcie_intc0pcie1pcie_intc1tphytphyu2port0tphyu3port0topmiscxsphyxphyu2port0xphyu3port0xfi_tphy0xfi_tphy1xfi_plllvts_calibrationphy_calibration_p0phy_calibration_p1phy_calibration_p2phy_calibration_p3switchgsw_port0gsw_port1gsw_port2gsw_port3gsw_phy0gsw_phy0_led0gsw_phy0_led1gsw_phy1gsw_phy1_led0gsw_phy1_led1gsw_phy2gsw_phy2_led0gsw_phy2_led1gsw_phy3gsw_phy3_led0gsw_phy3_led1ethwarpethgmac0gmac1gmac2mdio_busint_2p5g_phyeth_sramcpu_thermalcpu_trip_critcpu_trip_hotcpu_trip_active_highcpu_trip_active_medcpu_trip_active_lowfanled_redled_bluereg_1p8vreg_3p3v