Ð þí*8&ü(&Ä cudy,wr3000-v1mediatek,mt7981b +7Cudy WR3000 V1cpus+cpu@0arm,cortex-a53=AcpuMpscicpu@1arm,cortex-a53=AcpuMpscioscillator-40m fixed-clock[bZkclkxtal~psci arm,psci-1.0Tsmcreserved-memory+‹wo-boot@15194000=@’™wo-ilm@151e0000=€’™wo-dlm@151e8000=€ ’™secmon@43000000=C’wmcpu-reserved@47c80000=GÈ’™wo-emi@47d80000=GØ’™ wo-data@47dc0000=GÜ$’™soc simple-bus‹+interrupt-controller@c000000 arm,gic-v3 =     ¡ ¬Á™clock-controller@10001000 mediatek,mt7981-infracfgsyscon=~™clock-controller@1001b000 mediatek,mt7981-topckgensyscon=°~™watchdog@1001c000mediatek,mt7986-wdt=À ¡nÒ™clock-controller@1001e000mediatek,mt7981-apmixedsys=à~™pwm@10048000mediatek,mt7981-pwm=€(ß ætopmainpwm1pwm2pwm3òsyscon@10060000"mediatek,mt7981-sgmiisys_0syscon=~™syscon@10070000"mediatek,mt7981-sgmiisys_1syscon=~™serial@11002000*mediatek,mt7981-uartmediatek,mt6577-uart=  ¡{ ýuartwakeupß æbaudbus default %disabledserial@11003000*mediatek,mt7981-uartmediatek,mt6577-uart=0 ¡| ýuartwakeupß  æbaudbus %disabledserial@11004000*mediatek,mt7981-uartmediatek,mt6577-uart=@ ¡} ýuartwakeupß! æbaudbus %disabledi2c@11007000mediatek,mt7981-i2c =p!p€€ ¡ˆ ß34æmaindmaarbpmic+ %disabledspi@11009000)mediatek,mt7981-spi-ipmmediatek,spi-ipm=� ¡Ž ßN"# æparent-clksel-clkspi-clkhclk+ %disabledspi@1100a000)mediatek,mt7981-spi-ipmmediatek,spi-ipm=  ¡Œ ßN') æparent-clksel-clkspi-clkhclk+ %disabledspi@1100b000)mediatek,mt7981-spi-ipmmediatek,spi-ipm=° ¡� ßN(* æparent-clksel-clkspi-clkhclk+ %disabledthermal@1100c8000mediatek,mt7981-thermalmediatek,mt7986-thermal=È ¡Šß0 æthermauxadc,8calibration-dataI_oadc@1100d000.mediatek,mt7981-auxadcmediatek,mt7986-auxadc=Ðß0æmainƒ %disabled™usb@11200000'mediatek,mt7986-xhcimediatek,mtk-xhci = . > •macippc(ß7856k$æsys_ckref_ckmcu_ckdma_ckxhci_ck ¡­Ÿ  %disabledpcie@11280000*mediatek,mt7981-pciemediatek,mt8192-pcie=(@ •pcie-mac‹‚ ¤ÿ ß9:;<!æpl_250mtl_26mperi_26mtop_133mApciŸ  ®pcie-phy ¡¨¸`Ë    Á+ %disabledinterrupt-controller¬Á™ pinctrl@11d00000mediatek,mt7981-pinctrl�=ÐÀÁÒàâðñ°I•gpioiocfg_rtiocfg_rmiocfg_rbiocfg_lbiocfg_bliocfg_tmiocfg_tleint¬ ¡á Ù 9åõÁ™ uart0-pins™muxuart uart0topmisc@11d10000mediatek,mt7981-topmiscsyscon=Ñ~™ t-phy@11e10000.mediatek,mt7981-tphymediatek,generic-tphy-v2‹á+ %disabledusb-phy@0=ßlæref™usb-phy@700= ßdæref  ™ efuse@11f20000%mediatek,mt7981-efusemediatek,efuse=ò+soc-uuid@140=@thermal-calib@274=t ™phy-calib@8dc=Ü™clock-controller@15000000mediatek,mt7981-ethsyssyscon=~Ò™wed@15010000mediatek,mt7981-wedsyscon= ¡Í1 %?wo-emiwo-ilmwo-dlmwo-datawo-bootS™ethernet@15100000mediatek,mt7981-eth=d`at"xß@]^™æfegp2gp1wocpu0sgmii_cksgmii_tx250msgmii_rx250msgmii_cdr_refsgmii_cdr_fbsgmii2_tx250msgmii2_rx250msgmii2_cdr_refsgmii2_cdr_fbnetsys0netsys1`¡ÄÅÆÇ½¾¿À(ýfe0fe1fe2fe3pdma0pdma1pdma2pdma3‹� ² Ä %disabledmdio-bus+ethernet-phy@0ethernet-phy-ieee802.3-c22=ÑgmiiÚ, 8phy-cal-datasram@15140000 mmio-sram=‹+™syscon@151a5000mediatek,mt7986-wo-ccifsyscon=P ¡Ó™wifi@18000000mediatek,mt7981-wmac0=0Ñ0¡ÕÖרß_\ æmcuap2conn1ìóconsys %disabledtimerarm,armv8-timer 0¡   memory@40000000=@Amemorykeys gpio-keyskey-wpsÿWPS   key-resetÿRESET   ˜leds gpio-ledsled-0wan  led-1 wlan-2ghz  led-2 wlan-5ghz  led-3lan  led-4status  led-5 wan-online   compatibleinterrupt-parent#address-cells#size-cellsmodelregdevice_typeenable-methodclock-frequencyclock-output-names#clock-cellsrangesno-mapphandleinterruptsinterrupt-controller#interrupt-cells#reset-cellsclocksclock-names#pwm-cellsinterrupt-namespinctrl-namespinctrl-0statusnvmem-cellsnvmem-cell-names#thermal-sensor-cellsmediatek,auxadcmediatek,apmixedsys#io-channel-cellsreg-namesphysbus-rangephy-namesinterrupt-map-maskinterrupt-mapgpio-rangesgpio-controller#gpio-cellsfunctiongroups#phy-cellsmediatek,syscon-typememory-regionmemory-region-namesmediatek,wo-ccifassigned-clocksassigned-clock-parentssrammediatek,ethsysmediatek,sgmiisysmediatek,infracfgmediatek,wedphy-modephy-is-integratedresetsreset-nameslabelgpioslinux,codecolor