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compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl1rdma0rdma1rdma2wdma0wdma1color0color1split0split1dpi0dsi0dsi1mmc0mmc1mmc2serial0serial1methoddevice_typeenable-methodregcci-control-portnext-level-cachephandlei-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setscpucache-levelcache-unified#clock-cellsclock-frequencyclock-output-namesinterruptsinterrupt-affinityranges#reset-cells#power-domain-cellsclocksclock-namesmediatek,infracfgreg-namesgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspinmuxinput-enablebias-pull-upbias-pull-downdrive-strengthoutput-highbias-disabletimeout-secresetsreset-namesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-allowed-modesregulator-always-onregulator-boot-onlinux,keycodeswakeup-sourcelabelmediatek,larbspower-domains#iommu-cellsstatusmediatek,hopping-ssc-percent#mbox-cells#phy-cellsinterface-typedmasdma-namespinctrl-namespinctrl-0dma-requestsmediatek,dma-33bits#dma-cells#pwm-cellsclock-divinterrupts-extendedsyna,startup-delay-mssyna,reset-delay-mssyna,nosleep-modesyna,sensor-typeenable-gpiosfirmware-gpiosmediatek,latch-ckmediatek,hs200-cmd-int-delaymediatek,hs400-cmd-int-delaymediatek,hs400-ds-dly3non-removablepinctrl-1vmmc-supplyvqmmc-supplyassigned-clocksassigned-clock-ratesmboxesmediatek,gce-client-regiommusphysphy-namesavdd-supplyavee-supplyvddi-supplyvddh-supplyreset-gpiosbacklightremote-endpointmediatek,gce-eventsmediatek,smimediatek,larb-idledsdefault-brightness-levelpwmsmax-brightnessno-mapgpioenable-active-high