Ð þíñ¡8ê„(êL ,Einfochips i.MX8QXP AI_ML%2einfochips,imx8qxp-ai_mlfsl,imx8qxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000�/bus@5a000000/i2c@5a800000†/bus@5a000000/i2c@5a810000‹/bus@5a000000/i2c@5a820000�/bus@5a000000/i2c@5a830000•/bus@5b000000/mmc@5b010000š/bus@5b000000/mmc@5b020000Ÿ/bus@5b000000/mmc@5b030000¤/bus@5d000000/mailbox@5d1b0000¨/bus@5d000000/mailbox@5d1c0000¬/bus@5d000000/mailbox@5d1d0000°/bus@5d000000/mailbox@5d1e0000´/bus@5d000000/mailbox@5d1f0000¸/bus@5a000000/serial@5a060000À/bus@5a000000/serial@5a070000È/bus@5a000000/serial@5a080000Ð/bus@5a000000/serial@5a090000Ø/bus@5a000000/spi@5a000000Ý/bus@5a000000/spi@5a010000â/bus@5a000000/spi@5a020000ç/bus@5a000000/spi@5a030000 ì/vpu@2c000000/vpu-core@2d080000 ö/vpu@2c000000/vpu-core@2d090000cpus cpu@0cpu2arm,cortex-a35 psci€+@=J€W@i€v ‡ûŽ¢±cpu@1cpu2arm,cortex-a35 psci€+@=J€W@i€v ‡ûŽ¢± cpu@2cpu2arm,cortex-a35 psci€+@=J€W@i€v ‡ûŽ¢± cpu@3cpu2arm,cortex-a35 psci€+@=J€W@i€v ‡ûŽ¢± l2-cache02cache¹Å -@?±opp-table2operating-points-v2Ó±opp-900000000Þ5¤éåB@óIðopp-1200000000ÞG†ŒåÈàóIðinterrupt-controller@51a00000 2arm,gic-v3  Q Q° ! 6 ±reserved-memory Adecoder-boot@84000000 „Hencoder-boot@86000000 † Hdecoder-rpc@92000000 ’Hdsp@92400000 ’@H Odisabledencoder-rpc@94400000 ”@pHpmu2arm,cortex-a35-pmu 6psci 2arm,psci-1.0smcsystem-controller 2fsl,imx-scu Vtx0rx0gip3$apower-controller2fsl,imx8qxp-scu-pdfsl,scu-pdh±clock-controller2fsl,imx8qxp-clkfsl,scu-clk|±pinctrl2fsl,imx8qxp-iomuxc±�fec1grp¨‰5 4 & % ' ( ) * , - . / 0 1 ±rledsgrpH‰=!>!!!!!±Œlpuart0grp0‰o p j i ±Wlpuart1grp‰N M ±Ylpuart2grp‰r q ±[lpuart3grp‰m n ±]usdhc1grpH‰ A ! ! ! !!±kusdhc2grp`‰A! !!!"!#!!!±nwifiregongrp ‰¬!±Žocotp2fsl,imx8qxp-scu-ocotp mac@2c4 Ämac@2c6 Ækeys"2fsl,imx8qxp-sc-keyfsl,imx-sc-key’t¡ Odisabledreset-controller2fsl,imx-scu-reset¯±rtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt¼<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermalȱtimer2arm,armv8-timer06   clock-dummy 2fixed-clock|Þ îclk_dummy±clock-xtal32k 2fixed-clock|Þ€ îxtal_32KHzclock-xtal24m 2fixed-clock|Þn6 îxtal_24MHzthermal-zonescpu0-thermalúÐ%ctripstrip05¡øAÐpassive±trip15ðAÐ criticalcooling-mapsmap0L0Qÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿclock-img-ipg 2fixed-clock|Þ ë îimg_ipg_clk±clock-img-pxl 2fixed-clock|Þ#ÃF îimg_pxl_clk±#bus@58000000 2simple-bus AXXisi@58100000 XH6)*+,-.0‡ `per0per1per2per3per4per50lyz{|}~ Odisabled2fsl,imx8qxp-isiports port@2 endpointz±irqsteer@58220000%2fsl,imx8qm-irqsteerfsl,imx-irqsteer X"! 6@‡`ipgl‘Š– ±gpio@582220002fsl,imx8qm-gpiofsl,imx35-gpio X" !6£¯l‘clock-controller@582230182fsl,imx8qxp-lpcg X"0 ‡‘|¿îcsi0_lpcg_core_clkly±clock-controller@5822301c2fsl,imx8qxp-lpcg X"0 ‡‘|¿îcsi0_lpcg_esc_clkly±i2c@58226000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c X"`6‡“`peripg Í“Ýn6l“ Odisabledcsi@582270002fsl,imx8qxp-mipi-csi2 X"pX"‡ `coreescuiÍÝu*J¢lyò‘ Odisabledports port@0 port@1 endpointz±irqsteer@58240000%2fsl,imx8qm-irqsteerfsl,imx-irqsteer X$! 6A‡`ipgl”Š–  Odisabled±gpio@582420002fsl,imx8qm-gpiofsl,imx35-gpio X$ !6£¯l” Odisabledclock-controller@582430182fsl,imx8qxp-lpcg X$0 ‡”|¿îcsi1_lpcg_core_clkly Odisabled±clock-controller@5824301c2fsl,imx8qxp-lpcg X$0 ‡”|¿îcsi1_lpcg_esc_clkly Odisabled±i2c@58246000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c X$`6‡–`peripg Í–Ýn6l– Odisabledcsi@582470002fsl,imx8qxp-mipi-csi2 X$pX$‡ `coreescuiÍÝu*J¢lyò” Odisabledirqsteer@58260000%2fsl,imx8qm-irqsteerfsl,imx-irqsteer X&! 6B‡`ipglFŠ–  Odisabled± clock-controller@582630042fsl,imx8qxp-lpcg X&0 ‡F|¿îpi0_lpcg_ipg_clklyclock-controller@582630182fsl,imx8qxp-lpcg X&0 ‡F|¿îpi0_lpcg_pxl_clklyclock-controller@5826301c2fsl,imx8qxp-lpcg X&0 ‡F|¿îpi0_lpcg_misc_clklyi2c@58266000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c X&`6‡I`peripg ÍIÝn6 lI Odisabledjpegdec@58400000 X@ 65‡!!Í!!Ý ë ëÂl�2nxp,imx8qxp-jpgdecjpegenc@58450000 XE 61‡""Í""Ý ë ëÂl…2nxp,imx8qxp-jpgencclock-controller@585000002fsl,imx8qxp-lpcg XP‡#|¿îpdma0_lpcg_clkly± clock-controller@585100002fsl,imx8qxp-lpcg XQ‡#|¿îpdma1_lpcg_clklz± clock-controller@585200002fsl,imx8qxp-lpcg XR‡#|¿îpdma2_lpcg_clkl{±clock-controller@585300002fsl,imx8qxp-lpcg XS‡#|¿îpdma3_lpcg_clkl|±clock-controller@585400002fsl,imx8qxp-lpcg XT‡#|¿îpdma4_lpcg_clkl}±clock-controller@585500002fsl,imx8qxp-lpcg XU‡#|¿îpdma5_lpcg_clkl~±clock-controller@585600002fsl,imx8qxp-lpcg XV‡#|¿îpdma6_lpcg_clklclock-controller@585700002fsl,imx8qxp-lpcg XW‡#|¿îpdma7_lpcg_clkl€clock-controller@585800002fsl,imx8qxp-lpcg XX‡#|¿îcsi0_lpcg_pxl_clkl‘±clock-controller@585900002fsl,imx8qxp-lpcg XY‡#|¿îcsi1_lpcg_pxl_clkl” Odisabled±clock-controller@585a00002fsl,imx8qxp-lpcg XZ‡#|¿îhdmi_rx_lpcg_pxl_link_clkl›clock-controller@585d00002fsl,imx8qxp-lpcg X]|‡¿0îimg_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clkl±!clock-controller@585f00002fsl,imx8qxp-lpcg X_|‡¿0îimg_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clkl±"vpu@2c000000 A,, ,l Odisabledmailbox@2d0000002fsl,imx6sx-mu - 6Õùl Odisabled±$mailbox@2d0200002fsl,imx6sx-mu - 6Öùl Odisabled±%vpu-core@2d080000 -2nxp,imx8q-vpu-decoderl Vtx0tx1rx$a$$$ Odisabledvpu-core@2d090000 -2nxp,imx8q-vpu-encoderl Vtx0tx1rx$a%%% Odisabledbus@31400000 2simple-bus A1@1@ crypto@314000002fsl,imx8qxp-caamfsl,sec-v4.0 1@  6”  A1@ lõ jr@30000+2fsl,imx8qxp-job-ringfsl,sec-v4.0-job-ring  6Ålõjr@40000+2fsl,imx8qxp-job-ringfsl,sec-v4.0-job-ring  6Ælöclock-cm40-ipg 2fixed-clock|ÞÞ) îcm40_ipg_clk±)bus@34000000 2simple-bus A44&serial@372200002fsl,imx8qxp-lpuart 7"6‡'' `ipgbaud ÍÝn6l Odisabledi2c@37230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c 7#6 ‡((`peripg Í Ýn6l  Odisabledintmux@374000002fsl,imx-intmux 7@`6!‡)`ipgl! Odisabled±&clock-controller@376200002fsl,imx8qxp-lpcg 7b|‡)¿*îcm40_lpcg_uart_clkcm40_lpcg_uart_ipg_clkl±'clock-controller@376300002fsl,imx8qxp-lpcg 7c|‡ )¿(îcm40_lpcg_i2c_clkcm40_lpcg_i2c_ipg_clkl ±(bus@53000000 2simple-bus ASSgpu@53100000 2vivante,gc S 6@‡�� `coreshaderÍ��Ý)¹'2©ø€l�clock-audio-ipg 2fixed-clock|Þ'îaudio_ipg_clk±1clock-ext-aud-mclk0 2fixed-clock|Þîext_aud_mclk0±Cclock-ext-aud-mclk1 2fixed-clock|Þîext_aud_mclk1±Dclock-esai0-rx 2fixed-clock|Þ îesai0_rx_clk±Eclock-esai0-rx-hf 2fixed-clock|Þîesai0_rx_hf_clk±Fclock-esai0-tx 2fixed-clock|Þ îesai0_tx_clk±Gclock-esai0-tx-hf 2fixed-clock|Þîesai0_tx_hf_clk±Hclock-spdif0-rx 2fixed-clock|Þ îspdif0_rx±Iclock-sai0-rx-bclk 2fixed-clock|Þ îsai0_rx_bclk±Jclock-sai0-tx-bclk 2fixed-clock|Þ îsai0_tx_bclk±Kclock-sai1-rx-bclk 2fixed-clock|Þ îsai1_rx_bclk±Lclock-sai1-tx-bclk 2fixed-clock|Þ îsai1_tx_bclk±Mclock-sai2-rx-bclk 2fixed-clock|Þ îsai2_rx_bclk±Nclock-sai3-rx-bclk 2fixed-clock|Þ îsai3_rx_bclk±Oclock-sai4-rx-bclk 2fixed-clock|Þ îsai4_rx_bclk±Pbus@59000000 2simple-bus AYYasrc@590000002fsl,imx8qm-asrc Y 6td‡**+,--�`memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`......rxarxbrxctxatxbtxc @.=lž Odisabledesai@59010000!2fsl,imx8qm-esaifsl,imx6ull-esai Y 6™‡///`coreextalfsysspba ..rxtxlŸ Odisabledspdif@590200002fsl,imx8qm-spdif Y6ÈÊ0‡001:`corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba .. rxtxl  Odisabledsai@590400002fsl,imx8qm-sai Y 6:‡22`busmclk0mclk1mclk2mclk3rxtx . . l> Odisabledsai@590500002fsl,imx8qm-sai Y 6<‡33`busmclk0mclk1mclk2mclk3rxtx ..l? Odisabledsai@590600002fsl,imx8qm-sai Y 6>‡44`busmclk0mclk1mclk2mclk3rx.l@ Odisabledsai@590700002fsl,imx8qm-sai Y 6C‡55`busmclk0mclk1mclk2mclk3rx.l¢ Odisableddma-controller@591f00002fsl,imx8qm-edma YNYf\ ,6vwxyz{ššÉË;;==?D‡‰qÀl@ABCDEFGHIJKLMNOPQRSTUVW±.clock-controller@594000002fsl,imx8qxp-lpcg Y@|‡1¿îasrc0_lpcg_ipg_clklž±*clock-controller@594100002fsl,imx8qxp-lpcg YA| ‡-1¿(îesai0_lpcg_extal_clkesai0_lpcg_ipg_clklŸ±/clock-controller@594200002fsl,imx8qxp-lpcg YB| ‡-1¿%îspdif0_lpcg_tx_clkspdif0_lpcg_gclkwl ±0clock-controller@594400002fsl,imx8qxp-lpcg YD| ‡- 1¿!îsai0_lpcg_mclksai0_lpcg_ipg_clkl>±2clock-controller@594500002fsl,imx8qxp-lpcg YE| ‡- 1¿!îsai1_lpcg_mclksai1_lpcg_ipg_clkl?±3clock-controller@594600002fsl,imx8qxp-lpcg YF| ‡-1¿!îsai2_lpcg_mclksai2_lpcg_ipg_clkl@±4clock-controller@594700002fsl,imx8qxp-lpcg YG| ‡-1¿!îsai3_lpcg_mclksai3_lpcg_ipg_clkl¢±5clock-controller@595800002fsl,imx8qxp-lpcg YX| ‡111 ¿4îdsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clkl±6clock-controller@595900002fsl,imx8qxp-lpcg YY|‡1¿îdsp_ram_lpcg_ipg_clkl±7dsp@596e80002fsl,imx8qxp-hifi4 Yn€€‡676`ipgocramcorelë× Vtxrxrxdb$a888wimx/dsp/hifi4.bin Odisabledasrc@598000002fsl,imx8qm-asrc Y€ 6|d‡99+,--�`memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`::::::rxarxbrxctxatxbtxc @.=lÆ Odisabledsai@598200002fsl,imx8qm-sai Y‚ 6I‡;;`busmclk0mclk1mclk2mclk3 :: rxtxl£ Odisabled±>sai@598300002fsl,imx8qm-sai Yƒ 6K‡<<`busmclk0mclk1mclk2mclk3: txl¤ Odisabled±?amix@598400002fsl,imx8qm-audmix Y„‡=`ipglÊ…>? Odisabledmqs@598500002fsl,imx8qm-mqs Y…‡@@ `mclkcorelË Odisableddma-controller@599f00002fsl,imx8qm-edma YŸ NY fÀ�6~€�‚ƒJJLsXllmnopqrstuv±:clock-controller@59d000002fsl,imx8qxp-lpcg YÐ| ‡E¿îaud_rec_clk0_lpcg_clklE±Aclock-controller@59d100002fsl,imx8qxp-lpcg YÑ| ‡ì¿îaud_rec_clk1_lpcg_clklì±Bclock-controller@59d200002fsl,imx8qxp-lpcg YÒ| ‡E¿îaud_pll_div_clk0_lpcg_clklE±+clock-controller@59d300002fsl,imx8qxp-lpcg YÓ| ‡ì¿îaud_pll_div_clk1_lpcg_clklì±,clock-controller@59d500002fsl,imx8qxp-lpcg YÕ|‡-¿îmclkout0_lpcg_clklïclock-controller@59d600002fsl,imx8qxp-lpcg YÖ|‡-¿îmclkout1_lpcg_clklðacm@59e000002fsl,imx8qxp-acm Yà|ˆlíîïðEìžÆŸ>?@¢£¤ ËX‡AB+,CDEFGHIJKLMNOP`aud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkext_aud_mclk0ext_aud_mclk1esai0_rx_clkesai0_rx_hf_clkesai0_tx_clkesai0_tx_hf_clkspdif0_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclksai4_rx_bclk±-clock-controller@59c000002fsl,imx8qxp-lpcg YÀ|‡1¿îasrc1_lpcg_ipg_clklƱ9clock-controller@59c200002fsl,imx8qxp-lpcg YÂ| ‡-1¿!îsai4_lpcg_mclksai4_lpcg_ipg_clkl£±;clock-controller@59c300002fsl,imx8qxp-lpcg YÃ| ‡-1¿!îsai5_lpcg_mclksai5_lpcg_ipg_clkl¤±<clock-controller@59c400002fsl,imx8qxp-lpcg YÄ|‡1¿îamix_lpcg_ipg_clklʱ=clock-controller@59c500002fsl,imx8qxp-lpcg YÅ| ‡-1¿!îmqs0_lpcg_mclkmqs0_lpcg_ipg_clkl˱@clock-dma-ipg 2fixed-clock|Þ' îdma_ipg_clk±_bus@5a000000 2simple-bus AZZspi@5a0000002fsl,imx7ulp-spi Z  6P‡QQ`peripg Í5Ý“‡l5 RRtxrx Odisabledspi@5a0100002fsl,imx7ulp-spi Z  6Q‡SS`peripg Í6Ý“‡l6 RRtxrx Odisabledspi@5a0200002fsl,imx7ulp-spi Z  6R‡TT`peripg Í7Ý“‡l7 RRtxrx Odisabledspi@5a0300002fsl,imx7ulp-spi Z  6S‡UU`peripg Í8Ý“‡l8 RRtxrx Odisabledserial@5a060000 Z 6Y‡VV `ipgbaud Í9ÝÄ´l9rxtx RR Ookay2fsl,imx8qxp-lpuartŠdefault˜W¢serial@5a070000 Z 6Z‡XX `ipgbaud Í:ÝÄ´l:rxtx R R Ookay2fsl,imx8qxp-lpuartŠdefault˜Yserial@5a080000 Z 6[‡ZZ `ipgbaud Í;ÝÄ´l;rxtx R R Ookay2fsl,imx8qxp-lpuartŠdefault˜[serial@5a090000 Z  6\‡\\ `ipgbaud Í<ÝÄ´l<rxtx RROokay2fsl,imx8qxp-lpuartŠdefault˜]pwm@5a1900002fsl,imx8qxp-pwmfsl,imx27-pwm Z 6‡^^`ipgper ͼÝn6²l¼dma-controller@5a1f00002fsl,imx8qm-edma ZNYÌ6 ¡¢£¤¥¦§²³´µ¶·¸¹C€lþÿ«¬­®¯°±²³´µ±Rclock-controller@5a4000002fsl,imx8qxp-lpcg Z@|‡5_¿ îspi0_lpcg_clkspi0_lpcg_ipg_clkl5±Qclock-controller@5a4100002fsl,imx8qxp-lpcg ZA|‡6_¿ îspi1_lpcg_clkspi1_lpcg_ipg_clkl6±Sclock-controller@5a4200002fsl,imx8qxp-lpcg ZB|‡7_¿ îspi2_lpcg_clkspi2_lpcg_ipg_clkl7±Tclock-controller@5a4300002fsl,imx8qxp-lpcg ZC|‡8_¿ îspi3_lpcg_clkspi3_lpcg_ipg_clkl8±Uclock-controller@5a4600002fsl,imx8qxp-lpcg ZF|‡9_¿'îuart0_lpcg_baud_clkuart0_lpcg_ipg_clkl9±Vclock-controller@5a4700002fsl,imx8qxp-lpcg ZG|‡:_¿'îuart1_lpcg_baud_clkuart1_lpcg_ipg_clkl:±Xclock-controller@5a4800002fsl,imx8qxp-lpcg ZH|‡;_¿'îuart2_lpcg_baud_clkuart2_lpcg_ipg_clkl;±Zclock-controller@5a4900002fsl,imx8qxp-lpcg ZI|‡<_¿'îuart3_lpcg_baud_clkuart3_lpcg_ipg_clkl<±\clock-controller@5a5900002fsl,imx8qxp-lpcg ZY|‡¼_¿(îadma_pwm_lpcg_clkadma_pwm_lpcg_ipg_clkl¼±^i2c@5a800000 Z€@  6܇```peripg Í`Ýn6l` Odisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a810000 Z�@  6݇aa`peripg ÍaÝn6la Odisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a820000 Z‚@  6Þ‡bb`peripg ÍbÝn6lb Odisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a830000 Zƒ@  6߇cc`peripg ÍcÝn6lc Odisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cadc@5a8800002nxp,imx8qxp-adc½ Zˆ 6ð‡dd`peripg ÍeÝn6le Odisabledadc@5a8900002nxp,imx8qxp-adc½ Z‰ 6ñ‡ee`peripg ÍfÝn6lf Odisabledcan@5a8d00002fsl,imx8qm-flexcan Z� 6ë‡ff`ipgper ÍiÝbZliÏÞ Odisabledcan@5a8e00002fsl,imx8qm-flexcan ZŽ 6ì‡ff`ipgper ÍiÝbZljÏÞ Odisabledcan@5a8f00002fsl,imx8qm-flexcan Z� 6í‡ff`ipgper ÍiÝbZlkÏÞ Odisableddma-controller@5a9f00002fsl,imx8qm-edma ZŸ NYl6¨©ª«¬­®¯E@lÌÍÎÏÐÑÒÓclock-controller@5ac000002fsl,imx8qxp-lpcg ZÀ|‡`_¿ îi2c0_lpcg_clki2c0_lpcg_ipg_clkl`±`clock-controller@5ac100002fsl,imx8qxp-lpcg ZÁ|‡a_¿ îi2c1_lpcg_clki2c1_lpcg_ipg_clkla±aclock-controller@5ac200002fsl,imx8qxp-lpcg ZÂ|‡b_¿ îi2c2_lpcg_clki2c2_lpcg_ipg_clklb±bclock-controller@5ac300002fsl,imx8qxp-lpcg ZÃ|‡c_¿ îi2c3_lpcg_clki2c3_lpcg_ipg_clklc±cclock-controller@5ac800002fsl,imx8qxp-lpcg ZÈ|‡e_¿ îadc0_lpcg_clkadc0_lpcg_ipg_clkle±dclock-controller@5ac900002fsl,imx8qxp-lpcg ZÉ|‡f_¿ îadc1_lpcg_clkadc1_lpcg_ipg_clklf±eclock-controller@5acd00002fsl,imx8qxp-lpcg ZÍ|‡i__ ¿5îcan0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clkli±fclock-conn-axi 2fixed-clock|ÞÞCU îconn_axi_clk±xclock-conn-ahb 2fixed-clock|Þ ï!ª îconn_ahb_clk±yclock-conn-ipg 2fixed-clock|Þ÷�Õ îconn_ipg_clk±wclock-conn-bch 2fixed-clock|Þׄ îconn_bch_clkbus@5b000000 2simple-bus A[[usb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb [  6 ìg÷h‡i(l Odisabledusbmisc@5b0d0200<82fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc [ ±husbphy@5b100000&2fsl,imx8qxp-usbphyfsl,imx7ulp-usbphy [‡il Odisabled±gmmc@5b010000 6è [‡jjj `ipgahbper ÍøÝ ëÂløI^Ookay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc Šdefault˜knx~Œlwifi@1 2brcm,bcm4329-fmacmmc@5b020000 6é [‡mmm `ipgahbper ÍùÝ ëÂlùI^Ookay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcŠdefault˜nn —ommc@5b030000 6ê [‡ppp `ipgahbper ÍúÝ ëÂlúI^ Odisabled"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcethernet@5b040000 [06(‡qqq qq'`ipgahbenet_clk_refptpenet_2x_txclkÍûûÝæ²€sY@ ²lûOokay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecŠdefault˜r Ärgmii-idÍsØmdio ethernet-phy@02ethernet-phy-ieee802.3-c22 ±sethernet@5b050000 [06(‡ttt tq'`ipgahbenet_clk_refptpenet_2x_txclkÍüüÝæ²€sY@ ²lü Odisabled.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecusb@5b1100002fsl,imx8qm-usb3 [ A(‡uuuuu`lpmbusaclkipgcore ÍÝæ²€l Odisabledusb@5b120000 2cdns,usb3 [[[ éotgxhcidev06óhostperipheralotgwakeupvcdns3,usb3-phy Odisabledusb-phy@5b1600002nxp,salvo-phy [‡u`salvo_phy_clkl) Odisabled±vclock-controller@5b2000002fsl,imx8qxp-lpcg [ |‡øwx ¿9îsdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clklø±jclock-controller@5b2100002fsl,imx8qxp-lpcg [!|‡ùwx ¿9îsdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clklù±mclock-controller@5b2200002fsl,imx8qxp-lpcg ["|‡úwx ¿9îsdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clklú±pclock-controller@5b2300002fsl,imx8qxp-lpcg [#|0‡ûûxûww¿ …îenet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clklû±qclock-controller@5b2400002fsl,imx8qxp-lpcg [$|0‡üüxüww¿ …îenet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clklü±tclock-controller@5b2700002fsl,imx8qxp-lpcg ['|‡yw¿"îusboh3_ahb_clkusboh3_phy_ipg_clkl±iclock-controller@5b2800002fsl,imx8qxp-lpcg [(|¿0‡wwwMîusb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclkl±uclock-controller@5b2900002fsl,imx8qxp-lpcg [)| ‡  xx¿'îgpmi_bchgpmi_iogpmi_apbgpmi_bch_apbl ±{clock-controller@5b2900042fsl,imx8qxp-lpcg [)|‡x¿ îapbhdma_hclkl ±zdma-controller@5b810000(2fsl,imx8qxp-dma-apbhfsl,imx28-dma-apbh [� 06NY‡zl ±|nand-controller@5b8120002fsl,imx8qxp-gpmi-nand [� [�@ égpmi-nandbch  6óbch ‡{{{{'`gpmi_iogpmi_apbgpmi_bchgpmi_bch_apb|rx-txl  Í Ýúð€ Odisabledbus@5c000000 2simple-bus A\\ddr-pmu@5c020000%2fsl,imx8qxp-ddr-pmufsl,imx8-ddr-pmu \ 6ƒclock-lsio-bus 2fixed-clock|Þõá îlsio_bus_clk±‚bus@5d000000 2simple-bus  A]]pwm@5d0000002fsl,imx27-pwm ]`ipgper‡}} Í¿Ýn6² 6^ Odisabledpwm@5d0100002fsl,imx27-pwm ]`ipgper‡~~ ÍÀÝn6² 6_ Odisabledpwm@5d0200002fsl,imx27-pwm ]`ipgper‡ ÍÁÝn6² 6` Odisabledpwm@5d0300002fsl,imx27-pwm ]`ipgper‡€€ ÍÂÝn6² 6a Odisabledgpio@5d080000 ] 6ˆ¯£!lÇ 2fsl,imx8qxp-gpiofsl,imx35-gpioP4�8 � E�K�P�R±�gpio@5d090000 ]  6‰¯£!lÈ 2fsl,imx8qxp-gpiofsl,imx35-gpio04�Y � c�tgpio@5d0a0000 ]  6Н£!lÉ 2fsl,imx8qxp-gpiofsl,imx35-gpio04�{�~��gpio@5d0b0000 ]  6‹¯£!lÊ 2fsl,imx8qxp-gpiofsl,imx35-gpio04�’�— �¥±�gpio@5d0c0000 ]  6Œ¯£!lË 2fsl,imx8qxp-gpiofsl,imx35-gpio€4��� � ����%±ogpio@5d0d0000 ]  6�¯£!lÌ 2fsl,imx8qxp-gpiofsl,imx35-gpio04�(�,� 3gpio@5d0e0000 ] 6ޝ£!lÍ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000 ] 6�¯£!lÎ 2fsl,imx8qxp-gpiofsl,imx35-gpiospi@5d120000 2nxp,imx8qxp-fspi ]éfspi_basefspi_mmap 6\‡íí `fspi_enfspilí Odisabledmailbox@5d1b0000 ] 6°ù Odisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000 ] 6±ù-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mu±mailbox@5d1d0000 ] 6²ù Odisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000 ] 6³ù Odisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000 ] 6´ù Odisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000 ]  6¸ùlÚ Odisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000 ]! 6¹ùlÛ Odisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000 ]( 6Àùlâ2fsl,imx8qxp-mufsl,imx6sx-mu±8clock-controller@5d4000002fsl,imx8qxp-lpcg ]@|4‡¿¿¿‚¿¿hîpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clkl¿±}clock-controller@5d4100002fsl,imx8qxp-lpcg ]A|4‡ÀÀÀ‚À¿hîpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clklÀ±~clock-controller@5d4200002fsl,imx8qxp-lpcg ]B|4‡ÁÁÁ‚Á¿hîpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clklÁ±clock-controller@5d4300002fsl,imx8qxp-lpcg ]C|4‡Â‚¿hîpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clkl±€clock-controller@5d4400002fsl,imx8qxp-lpcg ]D|4‡ÃÃÂÿhîpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clklÃclock-controller@5d4500002fsl,imx8qxp-lpcg ]E|4‡ÄÄĂĿhîpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clklÄclock-controller@5d4600002fsl,imx8qxp-lpcg ]F|4‡ÅÅłſhîpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clklÅclock-controller@5d4700002fsl,imx8qxp-lpcg ]G|4‡ÆÆÆ‚Æ¿hîpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clklÆclock-hsio-axi 2fixed-clock|Þׄ îhsio_axi_clk±…clock-hsio-per 2fixed-clock|Þò�U îhsio_per_clk±†clock-hsio-refa2gpio-gate-clock‡ƒ| @oclock-hsio-refb2gpio-gate-clock‡ƒ| @o±‡clock-xtal100m 2fixed-clock|Þõá îxtal_100MHz±ƒbus@5f000000 2simple-bus A__€p M€€€pcie@5f0100002fsl,imx8q-pcie _�ð édbiconfig0A��ø‚€€ð6fhómsidma ‡„„„ `dbimstrslvXÿpci€bijklpƒ�l©š Odisabledpcie-ep@5f0100002fsl,imx8q-pcie-ep _€édbiaddr_spaceƒ 6hódma‡„„„ `dbimstrslvl©š­¼ Odisabledclock-controller@5f0600002fsl,imx8qxp-lpcg _ ‡………| ¿Fîhsio_pcieb_mstr_axi_clkhsio_pcieb_slv_axi_clkhsio_pcieb_dbi_axi_clkl©±„clock-controller@5f0b00002fsl,imx8qxp-lpcg _ ‡†|¿îhsio_phyx1_per_clkl«±‰clock-controller@5f0d00002fsl,imx8qxp-lpcg _ ‡†|¿îhsio_pcieb_per_clkl©±Šclock-controller@5f0f00002fsl,imx8qxp-lpcg _‡†|¿îhsio_misc_per_clkl¬±‹clock-controller@5f0900002fsl,imx8qxp-lpcg _ ‡‡†††|¿Qîhsio_phyx1_pclkhsio_phyx1_epcs_tx_clkhsio_phyx1_epcs_rx_clkhsio_phyx1_apb_clkl«±ˆphy@5f1a00002fsl,imx8qxp-hsio  ____éregphyctrlmisc(‡ˆˆ‰Š‹+`pclk0apb_pclk0phy0_crrctl0_crrmisc_crr)l« OdisabledchosenË/bus@5a000000/serial@5a080000memory@80000000memory €€leds 2gpio-ledsŠdefault˜Œuser-led1 ×green:user1 šo Ýheartbeatuser-led2 ×green:user2 š�Ýnoneuser-led3 ×green:user3 š�Ýmmc1óoffuser-led4 ×green:user4 šoÝnonewlan-active-led ×yellow:wlan šoÝphy0txóoffbt-active-led×blue:bt šo Ýhci0-poweróoffsdio-pwrseq2mmc-pwrseq-simpleŠdefault˜Ž �±l interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3spi0spi1spi2spi3vpu-core0vpu-core1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusmbox-namesmboxes#power-domain-cells#clock-cellsfsl,pinslinux,keycodeswakeup-source#reset-cellstimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceclock-namespower-domainsremote-endpointfsl,channelfsl,num-irqs#gpio-cellsgpio-controllerclock-indicesassigned-clocksassigned-clock-ratesresets#mbox-cellsfsl,sec-eradmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-map#dma-cellsdma-channelsdma-channel-maskfirmware-namedaispinctrl-namespinctrl-0uart-has-rtscts#pwm-cells#io-channel-cellsfsl,clk-sourcefsl,scu-indexfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dword#index-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthno-sdnon-removablemmc-pwrseqcd-gpiosfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-rangesenable-gpiosdma-rangesbus-rangeinterrupt-mapinterrupt-map-masknum-lanesnum-viewportfsl,max-link-speednum-ib-windowsnum-ob-windowsstdout-pathlabellinux,default-triggerdefault-statepanic-indicatorreset-gpios