Ð þíe£8a(£`È ,Sinovoip BPI-M2%2sinovoip,bpi-m2allwinner,sun6i-a31saliases=/soc/ethernet@1c30000G/soc/serial@1c28000chosen OVserial0:115200n8framebuffer-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_be0-lcd0-hdmi@u3/2w’z�Š |disabledframebuffer-lcd002allwinner,simple-framebuffersimple-framebuffer bde_be0-lcd00u3/w’z |disabledtimer2arm,armv7-timer0ƒ   Žn6žcpusÂallwinner,sun6i-a31 cpu@02arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿcpu@12arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿcpu@22arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿcpu@32arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿ thermal-zonescpu_thermal!ú7èEcooling-mapsmap0U0Zÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿtripscpu_alert0ipuÐ×passivecpu_criti† uÐ ×criticalpmu2arm,cortex-a7-pmu0ƒxyz{clocks Oclk-24M€ 2fixed-clockŽn6�ÃPœosc24M clk-32k€ 2fixed-clockŽ€�ÃP œext_osc32k:clk-mii-phy-tx€ 2fixed-clockŽ}x@ œmii_phy_tx clk-gmac-int-tx€ 2fixed-clockŽsY@ œgmac_int_tx clk@1c200d0€2allwinner,sun7i-a20-gmac-clkÜÂÐu œgmac_tx&display-engine$2allwinner,sun6i-a31s-display-engine¯  |disabledsoc 2simple-bus Odma-controller@1c020002allwinner,sun6i-a31-dmaÜÀ  ƒ2uÃÊlcd-controller@1c0c0002allwinner,sun6i-a31s-tconÜÀÀ ƒVÕ Ã) Úlcdlvds u/�æahbtcon-ch0tcon-ch1lvds-altœtcon0-pixel-clock€ports port@0 Üendpoint@0Üò8endpoint@1Üò2port@1 Üendpoint@1Üòlcd-controller@1c0d0002allwinner,sun6i-a31-tconÜÀÐ ƒWÕ Ã) Úlcdlvds u0€‚æahbtcon-ch0tcon-ch1lvds-altœtcon1-pixel-clock€ports port@0 Üendpoint@0Üò9endpoint@1Üò3port@1 Üendpoint@1Üòmmc@1c0f0002allwinner,sun7i-a20-mmcÜÀð uOQPæahbmmcoutputsampleÃÚahb ƒ<default'|okay 1=Gmmc@1c100002allwinner,sun7i-a20-mmcÜÁ uRTSæahbmmcoutputsampleÃÚahb ƒ=default' |disabled mmc@1c110002allwinner,sun7i-a20-mmcÜÁ uUWVæahbmmcoutputsampleÃÚahb ƒ>|okay default'1P=[wifi@1Ü2brcm,bcm4329-fmac ƒ ihost-wakemmc@1c120002allwinner,sun7i-a20-mmcÜÁ  uXZYæahbmmcoutputsampleà Úahb ƒ? |disabled hdmi@1c160002allwinner,sun6i-a31-hdmiÜÁ` ƒX(u2Š‹ æahbmodddcpll-0pll-1Ãyddc-txddc-rxaudio-txÕ   |disabledports port@0 Üendpoint@0Üòendpoint@1Üòport@1Üusb@1c190002allwinner,sun6i-a31-musbÜÁ�u(à ƒGimcƒˆusb’™otg |disabledphy@1c194002allwinner,sun6i-a31-usb-phyÜÁ”Á¨Á¸¡phy_ctrlpmu1pmu2udefæusb0_phyusb1_phyusb2_phyÃ!Úusb0_resetusb1_resetusb2_reset|okay«usb@1c1a000&2allwinner,sun6i-a31-ehcigeneric-ehciÜÁ  ƒHu)Èusb|okayusb@1c1a400&2allwinner,sun6i-a31-ohcigeneric-ohciÜÁ¤ ƒIu+gÈusb|okayusb@1c1b000&2allwinner,sun6i-a31-ehcigeneric-ehciÜÁ° ƒJu*Èusb |disabledusb@1c1b400&2allwinner,sun6i-a31-ohcigeneric-ohciÜÁ´ ƒKu,hÈusb |disabledusb@1c1c400&2allwinner,sun6i-a31-ohcigeneric-ohciÜÁÄ ƒMu-ià |disabledclock@1c200002allwinner,sun6i-a31-ccuÜ u ! æhosclosc€¶pinctrl@1c208002allwinner,sun6i-a31s-pinctrlÜÂ0ƒ u@ !æapbhoscloscÃÓèùgmac-gmii-pins‚PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27 gmacgmac-mii-pinsTPA0PA1PA2PA3PA8PA9PA11PA12PA13PA14PA19PA20PA21PA22PA23PA24PA26PA27 gmacgmac-rgmii-pinsFPA0PA1PA2PA3PA9PA10PA11PA12PA13PA14PA19PA20PA25PA26PA27 gmac('i2c0-pins PH14PH15 i2c0#i2c1-pins PH16PH17 i2c1$i2c2-pins PH18PH19 i2c2%lcd0-rgb888-pins‚PD0PD1PD2PD3PD4PD5PD6PD7PD8PD9PD10PD11PD12PD13PD14PD15PD16PD17PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27 lcd0mmc0-pinsPF0PF1PF2PF3PF4PF5 mmc0"mmc1-pinsPG0PG1PG2PG3PG4PG5 mmc1"mmc2-4bit-pinsPC6PC7PC8PC9PC10PC11 mmc2"mmc2-8bit-emmc-pins3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24 mmc2"mmc3-8bit-emmc-pins3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24 mmc3("spdif-tx-pinPH28 spdifuart0-ph-pins PH20PH21 uart0"timer@1c20c002allwinner,sun4i-a10-timerÜ  Hƒu watchdog@1c20ca02allwinner,sun6i-a31-wdtÜ    ƒu spdif@1c21000/2allwinner,sun6i-a31-spdifÜ ƒ u>cÃ+ æapbspdifÕyrxtx |disabledi2s@1c22000/2allwinner,sun6i-a31-i2sÜ  ƒ uAaÃ-æapbmodÕyrxtx |disabledi2s@1c22400/2allwinner,sun6i-a31-i2sÜÂ$ ƒuBbÃ.æapbmodÕyrxtx |disabledlradc@1c228002allwinner,sun4i-a10-lradc-keysÜÂ( ƒ |disabledrtp@1c250002allwinner,sun6i-a31-tsÜÂP ƒ@serial@1c280002snps,dw-apb-uartÜ€ ƒV`uGÃ3Õyrxtx|okaydefault'"serial@1c284002snps,dw-apb-uartÜ„ ƒV`uHÃ4Õyrxtx |disabledserial@1c288002snps,dw-apb-uart܈ ƒV`uIÃ5Õyrxtx |disabledserial@1c28c002snps,dw-apb-uartÜÂŒ ƒV`uJÃ6Õ  yrxtx |disabledserial@1c290002snps,dw-apb-uartÜÂ� ƒV`uKÃ7Õ  yrxtx |disabledserial@1c294002snps,dw-apb-uartÜ” ƒV`uLÃ8Õyrxtx |disabledi2c@1c2ac002allwinner,sun6i-a31-i2cܬ ƒuCÃ/default'# |disabled i2c@1c2b0002allwinner,sun6i-a31-i2cܰ ƒuDÃ0default'$ |disabled i2c@1c2b4002allwinner,sun6i-a31-i2cÜ´ ƒuEÃ1default'% |disabled i2c@1c2b8002allwinner,sun6i-a31-i2cܸ ƒ uFÃ2 |disabled ethernet@1c300002allwinner,sun7i-a20-gmacÜÃT ƒRimacirq u!&æstmmacethallwinner_gmac_txà  Ústmmacethmv‡|okaydefault''ž(©rgmii²)mdio2snps,dwmac-mdio ethernet-phy@1ܽÉ'Ùu0(crypto-engine@1c1500062allwinner,sun6i-a31-cryptoallwinner,sun4i-a10-cryptoÜÁP ƒPu\æahbmodÃÚahbcodec@1c22c00/2allwinner,sun6i-a31-codecÜÂ, ƒu=‡ æapbcodecÃ*Õyrxtx |disabledtimer@1c6000082allwinner,sun6i-a31-hstimerallwinner,sun7i-a20-hstimerÜÆ0ƒ3456u#Ãspi@1c680002allwinner,sun6i-a31-spiÜÆ€ ƒAu$]æahbmodÕyrxtxà |disabled spi@1c690002allwinner,sun6i-a31-spiÜÆ� ƒBu%^æahbmodÕyrxtxà |disabled spi@1c6a0002allwinner,sun6i-a31-spiÜÆ  ƒCu&_æahbmodÕyrxtxà |disabled spi@1c6b0002allwinner,sun6i-a31-spiÜư ƒDu'`æahbmodÕyrxtxà |disabled interrupt-controller@1c81000 2arm,gic-400 ÜÈÈ È@ È` Óè ƒ display-frontend@1e00000%2allwinner,sun6i-a31-display-frontendÜà ƒ]u5|u æahbmodramÃ! ports port@1 Üendpoint@0Üò*4endpoint@1Üò+.display-frontend@1e20000%2allwinner,sun6i-a31-display-frontendÜâ ƒ^u6}v æahbmodramÃ" ports port@1 Üendpoint@0Üò,5endpoint@1Üò-/display-backend@1e40000$2allwinner,sun6i-a31-display-backendÜä ƒ`u4{x æahbmodramà ports port@0 Üendpoint@0Üò.+endpoint@1Üò/-port@1 Üendpoint@1Üò01drc@1e500002allwinner,sun6i-a31-drcÜå ƒ[u<“r æahbmodramÃ(ports port@0 Üendpoint@1Üò10port@1 Üendpoint@0Üò2endpoint@1Üò3display-backend@1e60000$2allwinner,sun6i-a31-display-backendÜæ ƒ_u3zw æahbmodramÃports port@0 Üendpoint@0Üò4*endpoint@1Üò5,port@1Üendpointò67drc@1e700002allwinner,sun6i-a31-drcÜç ƒ[u;’q æahbmodramÃ'ports port@0Üendpointò76port@1 Üendpoint@0Üò8endpoint@1Üò9rtc@1f00000€2allwinner,sun6i-a31-rtcÜðTƒ()u:œosc32k!interrupt-controller@1f00c002allwinner,sun6i-a31-r-intcÓèÜð  ƒ Cprcm@1f014002allwinner,sun6i-a31-prcmÜðar100_clk2allwinner,sun6i-a31-ar100-clk€u!   œar100;ahb0_clk2fixed-factor-clock€ëõu;œahb0<apb0_clk2allwinner,sun6i-a31-apb0-clk€u<œapb0=apb0_gates_clk#2allwinner,sun6i-a31-apb0-gates-clk€u=Dœapb0_pioapb0_irapb0_timerapb0_p2wiapb0_uartapb0_1wireapb0_i2c>ir_clk€2allwinner,sun4i-a10-mod0-clk u! œir?apb0_rst 2allwinner,sun6i-a31-clock-reset¶@cpucfg@1f01c002allwinner,sun6i-a31-cpuconfigÜðir@1f020002allwinner,sun6i-a31-ir u>?æapbirÃ@ ƒ%Üð @|okaydefault'Apinctrl@1f02c002allwinner,sun6i-a31-r-pinctrlÜð,ƒ-.u> !æapbhoscloscÃ@ÃÓèùs-ir-rx-pinPL4 s_irAs-p2wi-pinsPL0PL1 s_p2wiBi2c@1f034002allwinner,sun6i-a31-p2wiÜð4 ƒ'u>ކ Ã@default'B|okay pmic@682x-powers,axp221ÜhCƒÓèac-power-supply 2x-powers,axp221-ac-power-supply |disabledadc2x-powers,axp221-adc%battery-power-supply%2x-powers,axp221-battery-power-supply |disabledregulators7 ¸dcdc1Jvdd-3v0Ym-ÆÀ…-ÆÀdcdc2Jvdd-gpum ®`…$@dcdc3Jvdd-cpuYm ®`…$@dcdc4 Jvdd-sys-dllYm ®`…$@dcdc5 Jvcc-dramYmã`…ã`dc1swJdc1swdc5ldo Jvdd-cpusYm ®`…$@aldo1 Jvcc-wifim2Z …2Z aldo2 Jvcc-gmacYm&% …&% aldo3JavccYm-ÆÀ…-ÆÀdldo1Jvcc-macm-ÆÀ…-ÆÀ)dldo2 Javdd-csim*¹€…*¹€dldo3Jvcc-pbYm2Z …2Z dldo4Jdldo4eldo1Jvdd-csimw@…w@|okayeldo2Jeldo2eldo3Jeldo3ldo_io0Jldo_io0 |disabledldo_io1 Jvcc-pm-cpus|okayYmw@…w@rtc_ldoYm-ÆÀ…-ÆÀJrtc_ldodrivevbus Jdrivevbus |disabledusb_power_supply!2x-powers,axp221-usb-power-supply |disabledleds 2gpio-ledsblue�bpi-m2:blue:usrJ green�bpi-m2:green:usrJ red�bpi-m2:red:usrJmmc2_pwrseq2mmc-pwrseq-simple½ interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0serial0rangesstdout-pathallwinner,pipelineclocksstatusinterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methoddevice_typeregclock-latencyoperating-points#cooling-cellscpu-supplyphandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-accuracyclock-output-namesallwinner,pipelinesresets#dma-cellsdmasreset-namesclock-namesremote-endpointallwinner,tcon-channelpinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpiosmmc-pwrseqnon-removableinterrupt-namesdma-namesphysphy-namesextcondr_modereg-names#phy-cells#reset-cellsgpio-controllerinterrupt-controller#interrupt-cells#gpio-cellspinsfunctiondrive-strengthbias-pull-up#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthsnps,pblsnps,fixed-burstsnps,force_sf_dma_modephy-handlephy-modephy-supplyreset-gpiosreset-assert-usreset-deassert-usclock-divclock-multeldoin-supplyx-powers,drive-vbus-en#io-channel-cellsx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltlabel