Ð þíQR8M\(öM$(STMicroelectronics STM32429i-EVAL board!st,stm32429i-evalst,stm32f429interrupt-controller@e000e100!arm,armv7m-nvic,ARàá Vtimer@e000e010!arm,armv7m-systickRàà^okay esoc !simple-busl} „Àefuse@1fff7800!st,stm32f4-otpRÿxcalib@22cR,calib@22eR.timer@40000000!st,stm32-timerR@� e€ ^disabledtimers@40000000!st,stm32-timersR@ e€šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimer@40000400!st,stm32-timerR@� e� ^disabledtimers@40000400!st,stm32-timersR@ e�šint^okaypwm !st,stm32-pwm¦^okay±»defaulttimer@2!st,stm32-timer-triggerR^okaytimer@40000800!st,stm32-timerR@� e‚ ^disabledtimers@40000800!st,stm32-timersR@ e‚šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimer@40000c00!st,stm32-timerR@ �2 eƒtimers@40000c00!st,stm32-timersR@  eƒšint ^disabledpwm !st,stm32-pwm¦ ^disabledtimer@4!st,stm32-timer-triggerR ^disabledtimer@40001000!st,stm32-timerR@�6 e„ ^disabledtimers@40001000!st,stm32-timersR@ e„šint ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimer@40001400!st,stm32-timerR@�7 e… ^disabledtimers@40001400!st,stm32-timersR@ e…šint ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ e†šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ e‡šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimers@40002000!st,stm32-timersR@  eˆšint ^disabledpwm !st,stm32-pwm¦ ^disabledrtc@40002800 !st,stm32-rtcR@( e É Ùl� ð^okaywatchdog@40003000!st,stm32-iwdgR@0ešlsi^okayú spi@40003800!st,stm32f4-spiR@8�$ eŽ ^disabledspi@40003c00!st,stm32f4-spiR@<�3 e� ^disabledserial@40004400!st,stm32-uartR@D�& e‘ ^disabledserial@40004800!st,stm32-uartR@H�' e’ ^disabled( rxtxserial@40004c00!st,stm32-uartR@L�4 e“ ^disabledserial@40005000!st,stm32-uartR@P�5 e” ^disabledi2c@40005400!st,stm32f4-i2cR@T�  e•^okay±»defaultcamera@30 !ovti,ov2640R0   ) e šxvclk^okayportendpoint4 V!stmpe1600@42 !st,stmpe1600RB�l ,Dstmpe_gpio!st,stmpe-gpioRbV i2c@40005c00!st,stm32f4-i2cR@\�HI e— ^disableddac@40007400!st,stm32f4-dac-coreR@t e�špclk ^disableddac@1 !st,stm32-dacnR ^disableddac@2 !st,stm32-dacnR ^disabledserial@40007800!st,stm32-uartR@x�R ež ^disabledserial@40007c00!st,stm32-uartR@|�S eŸ ^disabledtimers@40010000!st,stm32-timersR@ e šint^okaypwm !st,stm32-pwm¦^okay± »defaulttimer@0!st,stm32-timer-triggerR^okaytimers@40010400!st,stm32-timersR@ e¡šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32-uartR@�% e¤^okay( rxtx±»defaultserial@40011400!st,stm32-uartR@�G e¥ ^disabledadc@40012000!st,stm32f4-adc-coreR@ � e¨šadc,A^okay»default±€ŒVadc@0!st,stm32f4-adcnR e¨l� rx ^disabledadc@100!st,stm32f4-adcnR e©l� rx ^disabledadc@200!st,stm32f4-adcnR eªl� rx^okay˜sdio@40012c00!arm,pl180arm,primecell¨ˆ€R@, e« šapb_pclk�1¿¾¼ ^okayÍ Ù »defaultopendrain±âìspi@40013000!st,stm32f4-spiR@0�# e¬ ^disabledspi@40013400!st,stm32f4-spiR@4�T e­ ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8Vinterrupt-controller@40013c00!st,stm32-exti,AR@<8� ()*>LVtimers@40014000!st,stm32-timersR@@ e°šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D e±šint ^disabledpwm !st,stm32-pwm¦ ^disabledtimers@40014800!st,stm32-timersR@H e²šint ^disabledpwm !st,stm32-pwm¦ ^disabledspi@40015000!st,stm32f4-spiR@P�U e´( rxtx ^disabledspi@40015400!st,stm32f4-spiR@T�V eµ ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVdisplay-controller@40016800!st,stm32-ltdcR@h�XY: ešlcd^okay±»defaultportendpoint4V'crc@40023000!st,stm32f4-crcR@0 e ^okayrcc@40023800ö!st,stm32f42xx-rccst,stm32-rccR@8eð ÉB@Vdma-controller@40026000 !st,stm32-dmaR@` � / e%Vdma-controller@40026400 !st,stm32-dmaR@d �89:;<DEF e%0Vethernet@40028000 !st,stm32-dwmacsnps,dwmac-3.50aR@€€ ;stmmaceth�=Emacirq šstmmacethmac-clk-txmac-clk-rx$eU_h^okay±»defaultymii‚mdio0!snps,dwmac-mdioethernet-phy@1RVusb@40040000 !snps,dwc2R@�M ešotg^okay�host• šusb2-phy±»defaultusb@50000000!st,stm32f4x9-fsotgRP�C e'šotg ^disableddcmi@50050000!st,stm32-dcmiRP�N  e šmclk»default±  tx^okayportendpoint4!줱¾V rng@50060800 !st,stm32-rngRP e&pin-controller }@0lðÊ!st,stm32f429-pinctrlV"gpio@40020000Rb,AR eÜGPIOAé"V$gpio@40020400Rb,AR eÜGPIOBé"gpio@40020800Rb,AR eÜGPIOCé" V%gpio@40020c00Rb,AR  eÜGPIODé"0gpio@40021000Rb,AR eÜGPIOEé"@gpio@40021400Rb,AR eÜGPIOFé"Pgpio@40021800Rb,AR eÜGPIOGé"`V#gpio@40021c00Rb,AR eÜGPIOHé"pgpio@40022000Rb,AR  eÜGPIOIé"€V gpio@40022400Rb,AR$ e ÜGPIOJé"�gpio@40022800Rb,AR( e ÜGPIOKé" usart1-0Vpins1õ ü pins2õ üusart3-0pins1õü pins2õüusbotg-fs-0pins õ ü usbotg-fs-1pins õ   ü usbotg-hs-0Vpins0õt ‹          ü mii-0Vpins8õm n "  # k  !   $ % v w adc-200VpinsõZpwm1-0V pins õpwm3-0Vpinsõi2c1-0Vpinsõü#ltdc-0VpinspõŒ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§ltdc-1pinsXõ&g*   fj 6k'3l Zspi5-0pins1õWYü pins2õXüi2c3-0pinsõ)ü#dcmi-0V pins<õ&'()+3F*,62ü sdio-pins-0Vpinsõ( ) * + , 2  sdio-pins-od-0Vpins1õ( ) * + ,  pins2õ2 #clocksclk-hse !fixed-clock4}x@Vclk-lse !fixed-clock4€clk-lsi !fixed-clock4}Vi2s-ckin !fixed-clock4Vclk-ext-camera !fixed-clock4n6V chosenDroot=/dev/ramMserial0:115200n8memory@00000000YmemoryRaliasese/soc/serial@40011000regulator-vdda!regulator-fixedmvdda|2Z ”2Z Vregulator-vref!regulator-fixedmvref|2Z ”2Z Vvdd-panel!regulator-fixed mvdd_panel|2Z ”2Z V&leds !gpio-ledsled-green ## ¬heartbeatled-orange ##led-red ## led-blue ## gpio-keys !gpio-keysÂbutton-0ÍWake upÓ� #$button-1ÍTamperÓ˜ #% usbphyÞ!usb-nop-xceiv e šmain_clkVpanel-rgb!ampire,am-480272h3tmqw-t01hé&^okayportendpoint4'Vmmc_vcard!regulator-fixed mmmc_vcard|2Z ”2Z V #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesdma-rangesinterruptsclock-names#pwm-cellspinctrl-0pinctrl-namesassigned-clocksassigned-clock-parentsst,syscfgtimeout-secdmasdma-namesresetsresetb-gpiospwdn-gpiosremote-endpointwakeup-sourcegpio-controller#gpio-cells#io-channel-cellsvdda-supplyvref-supplyst,adc-channelsarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiospinctrl-1bus-width#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memreg-namesinterrupt-namesst,sysconsnps,pblsnps,mixed-burstphy-modephy-handledr_modephysphy-nameshsync-activevsync-activepclk-samplepins-are-numberedst,bank-namegpio-rangespinmuxbias-disabledrive-push-pullslew-ratedrive-open-drainclock-frequencybootargsstdout-pathdevice_typeserial0regulator-nameregulator-min-microvoltregulator-max-microvoltlinux,default-triggerautorepeatlabellinux,code#phy-cellspower-supply