Ð þí˜D8�l(Ø�4mqmaker,miqirockchip,rk3288& 7mqmaker MiQialiases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000…/serial@ff190000�/serial@ff690000•/serial@ff1b0000�/serial@ff1c0000¥/spi@ff110000ª/spi@ff120000¯/spi@ff130000arm-pmuarm,cortex-a12-pmu0´—˜™š¿cpusÒrockchip,rk3066-smpàcpu@500ícpuarm,cortex-a12ùý'œ@5<rV acpu@501ícpuarm,cortex-a12ùý'œ@5<rV acpu@502ícpuarm,cortex-a12ùý'œ@5<rV acpu@503ícpuarm,cortex-a12ùý'œ@5<rV acpu-opp-tableoperating-points-v2iaopp-126000000t‚›€{ » opp-216000000t ßæ{ » opp-312000000t˜¾{ » opp-408000000tQ–{ » opp-600000000t#ÃF{ » opp-696000000t)|{~ðopp-816000000t0£,{B@opp-1008000000t<Ü{�opp-1200000000tG†Œ{Èàopp-1416000000tTfr{O€opp-1512000000tZJ{Ö opp-1608000000t_Ø"{™pbus simple-bus‰dma-controller@ff250000arm,pl330arm,primecellùÿ%@´�›¶5 Íapb_pclkadma-controller@ff600000arm,pl330arm,primecellùÿ`@´�›¶5Á Íapb_pclk Ùdisableddma-controller@ffb20000arm,pl330arm,primecellùÿ²@´�›¶5Á Íapb_pclkaZreserved-memory‰dma-unusable@fe000000ùþoscillator fixed-clockàn6ðxin24ma timerarm,armv7-timer0´   àn64timer@ff810000rockchip,rk3288-timerùÿ�  ´H 5a  Ípclktimerdisplay-subsystemrockchip,display-subsystemK mmc@ff0c0000rockchip,rk3288-dw-mshcQðÑ€ 5ÈDrvÍbiuciuciu-driveciu-sample_ ´ ùÿ @ý€jresetÙokayv€’£ÈµÀdefaultÎ Øämmc@ff0d0000rockchip,rk3288-dw-mshcQðÑ€ 5ÉEswÍbiuciuciu-driveciu-sample_ ´!ùÿ @ý�jreset Ùdisabledmmc@ff0e0000rockchip,rk3288-dw-mshcQðÑ€ 5ÊFtxÍbiuciuciu-driveciu-sample_ ´"ùÿ@ý‚jreset Ùdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcQðÑ€ 5ËGuyÍbiuciuciu-driveciu-sample_ ´#ùÿ@ýƒjresetÙokayv€ñÀdefaultÎØäsaradc@ff100000rockchip,saradcùÿ ´$ÿ5I[Ísaradcapb_pclkýW jsaradc-apbÙokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARÍspiclkapb_pclk  "txrx ´,ÀdefaultÎùÿ Ùdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSÍspiclkapb_pclk "txrx ´-ÀdefaultÎ !"ùÿ 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5ÐÜjVpower-domain@13ù 5ÀjWXreboot-modesyscon-reboot-modeq”xRBÄRBÃ’RBà ¢RBÃsyscon@ff740000rockchip,rk3288-sgrfsysconùÿtclock-controller@ff760000rockchip,rk3288-cruùÿvÌ7®H2ÑÝjÒÞk$»#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀasyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdùÿwa7edp-phyrockchip,rk3288-dp-phy5hÍ24mÐ Ùdisabledamio-domains"rockchip,rk3288-io-voltage-domainÙokayÛYèö=".<usbphyrockchip,rk3288-usb-phyÙokayusb-phy@320Ðù 5]Íphyclký… jphy-resetaAusb-phy@334Ðù45^Íphyclkýˆ jphy-reseta?usb-phy@348ÐùH5_Íphyclký‹ jphy-reseta@watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdtùÿ€5p ´OÙokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifùÿ‹H5TÐ ÍmclkhclkZ"tx ´6ÀdefaultÎ[Ì7 Ùdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sùÿ‰H ´55RÎÍi2s_clki2s_hclkZZ"txrxÀdefaultÎ\Yt Ùdisabledcrypto@ff8a0000rockchip,rk3288-cryptoùÿŠ@ ´0 5ÇÍ}ÁÍaclkhclksclkapb_pclký® jcrypto-rstÙokayiommu@ff900800rockchip,iommuùÿ�@ ´"iep_mmu5ÊÔ ÍaclkifaceŽ Ùdisablediommu@ff914000rockchip,iommu ùÿ‘@ÿ‘P ´"isp_mmu5ÍÕ ÍaclkifaceŽ› Ùdisabledrga@ff920000rockchip,rk3288-rgaùÿ’€ ´5ÈÖjÍaclkhclksclk¶] ýilm jcoreaxiahbvop@ff930000rockchip,rk3288-vop ùÿ“œÿ“ ´5žÑÍaclk_vopdclk_vophclk_vop¶] ýdef jaxiahbdclkÄ^Ùokayporta endpoint@0ùË_aqendpoint@1ùË`anendpoint@2ùËaahendpoint@3ùËbakiommu@ff930300rockchip,iommuùÿ“ ´ "vopb_mmu5ÅÑ Íaclkiface¶] ŽÙokaya^vop@ff940000rockchip,rk3288-vop ùÿ”œÿ” ´5Æ¿ÒÍaclk_vopdclk_vophclk_vop¶] ý°±² jaxiahbdclkÄcÙokayporta endpoint@0ùËdarendpoint@1ùËeaoendpoint@2ùËfaiendpoint@3ùËgaliommu@ff940300rockchip,iommuùÿ” ´ "vopl_mmu5ÆÒ Íaclkiface¶] ŽÙokayacmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsiùÿ–@ ´5~d Írefpclk¶] Ì7 Ùdisabledportsportendpoint@0ùËhaaendpoint@1ùËiaflvds@ff96c000rockchip,rk3288-lvdsùÿ–À@5g Ípclk_lvdsÀlcdcÎj¶] Ì7 Ùdisabledportsport@0ùendpoint@0ùËkabendpoint@1ùËlagdp@ff970000rockchip,rk3288-dpùÿ—@ ´b5icÍdppclkÇmÌdp¶] ýojdpÌ7 Ùdisabledportsport@0ùendpoint@0ùËna`endpoint@1ùËoaehdmi@ff980000rockchip,rk3288-dw-hdmiùÿ˜6HÌ7 ´g5hmnÍiahbisfrcec¶] ÙokayÛpportsportendpoint@0ùËqa_endpoint@1ùËradvideo-codec@ff9a0000rockchip,rk3288-vpuùÿš´   "vepuvdpu5ÐÜ ÍaclkhclkÄs¶] iommu@ff9a0800rockchip,iommuùÿš ´ "vpu_mmu5ÐÜ Íaclkiface޶] asiommu@ff9c0440rockchip,iommu ùÿœ@@ÿœ€@ ´o "hevc_mmu5ÏÛ ÍaclkifaceŽ Ùdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760ùÿ£$´ "jobmmugpu5Àt¶]  Ùdisableda4gpu-opp-tableoperating-points-v2atopp-100000000tõá{~ðopp-200000000t ëÂ{~ðopp-300000000tá£{B@opp-400000000tׄ{Èàopp-600000000t#ÃF{Ðqos@ffaa0000sysconùÿª aWqos@ffaa0080sysconùÿª€ aXqos@ffad0000sysconùÿ­ aLqos@ffad0100sysconùÿ­ aMqos@ffad0180sysconùÿ­€ aNqos@ffad0400sysconùÿ­ aOqos@ffad0480sysconùÿ­€ aPqos@ffad0500sysconùÿ­ aKqos@ffad0800sysconùÿ­ aQqos@ffad0880sysconùÿ­€ aRqos@ffad0900sysconùÿ­ aSqos@ffae0000sysconùÿ® aVqos@ffaf0000sysconùÿ¯ aTqos@ffaf0080sysconùÿ¯€ aUefuse@ffb40000rockchip,rk3288-efuseùÿ´ 5q Ípclk_efusecpu-id@7ùcpu_leakage@17ùinterrupt-controller@ffc01000 arm,gic-400çü@ùÿÀÿÀ ÿÀ@ ÿÀ`  ´ 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#address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathgpioslabellinux,default-triggerenable-active-highstartup-delay-us