Ð þís¼8k¤(kl),mundoreader,bq-edison2qcrockchip,rk31887BQ Edison2 Quad-Corealiases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/mmc@1021c000f/mmc@10214000l/mmc@10218000r/serial@10124000z/serial@10126000‚/serial@20064000Š/serial@20068000’/spi@20070000—/spi@20074000bus ,simple-busœdma-controller@20018000,arm,pl330arm,primecell£ €@§²½ØïÀ öapb_pclkXdma-controller@2001c000,arm,pl330arm,primecell£ À@§²½ØïÀ öapb_pclk  disableddma-controller@20078000,arm,pl330arm,primecell£ €@§²½ØïÁ öapb_pclkoscillator ,fixed-clockn6!.xin24mgpu@10090000",rockchip,rk3188-maliarm,mali-400£ ïÅÅ öbuscoreAÅQõáfx okayx§ 5mgpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3}cache-controller@10138000,arm,pl310-cache£€‹™Lscu@1013c000,arm,cortex-a9-scu£Àglobal-timer@1013c200,arm,cortex-a9-global-timer£  § ï  disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer£Æ  § ïinterrupt-controller@1013d000,arm,cortex-a9-gic¥º£ÐÁserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uart£@ §"ËÕöbaudclkapb_pclkï@L okayâdefault ðbluetooth,brcm,bcm43438-btú„€   *âdefaultð serial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uart£` §#ËÕöbaudclkapb_pclkïAM okayâdefaultð qos@1012d000,syscon£Ð 'qos@1012e000,syscon£à &qos@1012f000,syscon£ð !qos@1012f080,syscon£ð€ #qos@1012f100,syscon£ñ $qos@1012f180,syscon£ñ€ "qos@1012f200,syscon£ò qos@1012f280,syscon£ò€ %usb@10180000,rockchip,rk3066-usbsnps,dwc2£ §ïÃöotg9otgASb€€@@ q vusb2-phy okayusb@101c0000 ,snps,dwc2£ §ïÉöotg9hostq vusb2-phy okayethernet@10204000,rockchip,rk3188-emac£ @< §€ïÄD öhclkmacrefúd�rmii  disabledmmc@10214000,rockchip,rk2928-dw-mshc£!@ §ïÀHöbiuciu–›rx-tx¥fQ°reset okay¼ÆØéâdefaultðômmc@10218000,rockchip,rk2928-dw-mshc£!€ §ïÁIöbiuciu–›rx-tx¥fR°reset okay¼Ø!âdefault ð/wifi@1£,brcm,bcm4329-fmac§ mhost-wake<âdefaultðmmc@1021c000,rockchip,rk2928-dw-mshc£!À §ïÂJöbiuciu–›rx-tx¥fS°reset okay¼Æ!âdefaultðô/ pmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd£ @Zreboot-mode,syscon-reboot-modeP@WRBÃcRBÃqRBà �RBÃpower-controller!,rockchip,rk3188-power-controller�power-domain@7£hïÃľ¿ÍÎOÊÐÈÑÉÒ¡!"#$%power-domain@6£ ïÎÍØ×¡&power-domain@8£ïÅ¡'grf@20008000,syscon£ €i2c@2002d000,rockchip,rk3188-i2c£ Ð §(€öi2cïP okayâdefaultð(€accelerometer@29 ,st,lis3de£)§âdefaultð)¨1000-10001¸i2c@2002f000,rockchip,rk3188-i2c£ ð §)€ïQöi2c okayâdefaultð*€tmp108@48 ,ti,tmp108£H+§âdefaultð,Ãrtc@51,haoyu,hym8563£Q§ âdefaultð-!.xin32kibattery@55 ,ti,bq27541£UÙ.5pmic@5a,active-semi,act8846£Zâdefaultð/0è1ó1þ1 1 1,1regulatorsREG18VCC_DDRGO€_O€wREG28VDD_LOGGB@_O€wREG38VDD_ARMG Yø_™pwNREG48VCC_IOG-ÆÀ_-ÆÀwREG58VDD_10GB@_B@wREG68VDD_12GO€_O€wREG7 8VCC18_CIFGw@_w@wREG88VCCA_33G2Z _2Z wREG98VCC_TPG2Z _2Z wREG10 8VCCIO_WLG*¹€_*¹€wREG118VCC_18Gw@_w@wCREG12 8VCC28_CIFG*¹€_*¹€wlcharger@6b ,ti,bq24196£k§âdefault ð234‹0Ô§5¹.usb-otg-vbuspwm@20030000,rockchip,rk2928-pwm£ ÌïF  disabledâdefaultð6pwm@20030010,rockchip,rk2928-pwm£ ÌïF okayâdefaultð7_watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdt£ ÀïK §3 okaypwm@20050020,rockchip,rk2928-pwm£  ÌïG  disabledâdefaultð8pwm@20050030,rockchip,rk2928-pwm£ 0ÌïG  disabledâdefaultð9i2c@20056000,rockchip,rk3188-i2c£ ` §*€ïRöi2c okayâdefaultð:€touchscreen@3e,edt,edt-ft5506£>+§âdefaultð;< ×ãú  i2c@2005a000,rockchip,rk3188-i2c£   §+€ïSöi2c okayâdefaultð=€i2c@2005e000,rockchip,rk3188-i2c£ à §4€ïTöi2c okayâdefaultð>€codec@1b,realtek,rt5616£ïKömclk8serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uart£ @ §$ËÕöbaudclkapb_pclkïBN okayâdefaultð?serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uart£ € §%ËÕöbaudclkapb_pclkïCO okayâdefault ð@ABsaradc@2006c000,rockchip,saradc£ À §IïGJösaradcapb_pclkfW °saradc-apb okay[Cspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiïEHöspiclkapb_pclk §&£ –  ›txrx  disabledâdefaultðDEFGspi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiïFIöspiclkapb_pclk §'£ @–  ›txrx  disabledâdefaultðHIJKcpusgrockchip,rk3066-smpcpu@0ucpu,arm,cortex-a9�L£’œ@ï Mf´Ncpu@1ucpu,arm,cortex-a9�L£ Mf´Ncpu@2ucpu,arm,cortex-a9�L£ Mf´Ncpu@3ucpu,arm,cortex-a9�L£ Mf´Nopp_table0,operating-points-v2¿Mopp-312000000ʘ¾Ñ Yøßœ@opp-504000000Ê nÑHopp-600000000Ê#ÃFÑ~ððopp-816000000Ê0£,Ñà˜opp-1008000000Ê<ÜÑg8opp-1200000000ÊG†ŒÑŒ0opp-1416000000ÊTfrÑÐopp-1608000000Ê_Ø"Ñ™pdisplay-subsystem,rockchip,display-subsystemüOPsram@10080000 ,mmio-sram£€ œ€smp-sram@0,rockchip,rk3066-smp-sram£Pvop@1010c000,rockchip,rk3188-vop£À § ïþÍöaclk_vopdclk_vophclk_vop}fdef °axiahbdclk okayportOendpointQcvop@1010e000,rockchip,rk3188-vop£à §ïÄ¿Îöaclk_vopdclk_vophclk_vop}fghi °axiahbdclk okayâdefaultðRSTUVportPtimer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timer£ à  §.ïEW öpclktimertimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timer£ €   §@ïBZ öpclktimeri2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2s£   § âdefaultðWïKÆöi2s_clki2s_hclk–XX›txrx-8 okaysound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdif£à 8ïNÅ ömclkhclk–X›tx § âdefaultðY okayclock-controller@20000000,rockchip,rk3188-cru£ €!G@AËÔ^ÌÕ_ Q#g¸€ ná£ðÑ€xhÀá£ðÑ€xhÀefuse@20010000,rockchip,rk3188-efuse£ @ï[ öpclk_efusecpu_leakage@17£phy0,rockchip,rk3188-usb-phyrockchip,rk3288-usb-phy€ okayusb-phy@10cT£ ïQöphyclk!usb-phy@11cT£ïRöphyclk!pinctrl,rockchip,rk3188-pinctrl€_Zœgpio0@2000a000,rockchip,rk3188-gpio-bank0£   §6ïUl|¥ºgpio1@2003c000,rockchip,gpio-bank£ À §7ïVl|¥º+gpio2@2003e000,rockchip,gpio-bank£ à §8ïWl|¥ºgpio3@20080000,rockchip,gpio-bank£  §9ïXl|¥ºpcfg_pull_upˆ\pcfg_pull_down•pcfg_pull_none¤[emmcemmc-clk±[emmc-cmd±\emmc-rst±[emacemac-xfer€±[[[[[[[[emac-mdio ±[[i2c0i2c0-xfer ±[[(i2c1i2c1-xfer ±[[*i2c2i2c2-xfer ±[[:i2c3i2c3-xfer ±[[=i2c4i2c4-xfer ±[[>lcdc1lcdc1-dclk±[Rlcdc1-den±[Slcdc1-hsync±[Tlcdc1-vsync±[Ulcdc1-rgb24€±[[[[[[[[[ [ [ [ [ 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#address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1rangesreginterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesphandlestatusclock-frequency#clock-cellsclock-output-namesassigned-clocksassigned-clock-ratesresetsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0max-speeddevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfphy-modedmasdma-namesfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplykeep-power-in-suspendmmc-pwrseqnon-removablevqmmc-supplybrcm,drive-strengthoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qosrotation-matrixvdd-supply#thermal-sensor-cellspower-suppliesvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onti,system-minimum-microvoltmonitored-batteryomit-battery-class#pwm-cellsreset-gpiostouchscreen-inverted-ytouchscreen-size-ytouchscreen-size-xtouchscreen-swapped-x-y#sound-dai-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsremote-endpointrockchip,playback-channelsrockchip,capture-channels#reset-cells#phy-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-highoutput-lowpower-supplypwmsautorepeatlinux,codelabellinux,input-typedebounce-intervalwakeup-sourceactive-delay-msbacklightenable-gpiosdata-mappingheight-mmwidth-mmhactivevactivehback-porchhfront-porchhsync-lenvback-porchvfront-porchvsync-lengpiostartup-delay-usvin-supplyenable-active-highregulator-boot-on