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ti,mux-clock¹µsyc_clk_div_ck@100{ti,divider-clock¹µÁúxusim_ck@1858{ti,divider-clock¹ŸµXÌúusim_fclk@1858{ti,gate-clock¹ŸµXtrace_clk_div_ck{ti,clkdm-gate-clock ¹úbandgap_fclk@1888{ti,gate-clock¹Ÿµˆclockdomainsemu_sys_clkdmti,clockdomain¹l4_wkup_cm@1800 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ \{úemu_sys_cm@1a00 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {úprm@400#ti,omap4-prm-instti,omap-prm-instµØú]prm@500#ti,omap4-prm-instti,omap-prm-instµåúwprm@700#ti,omap4-prm-instti,omap-prm-instµØúzprm@f00#ti,omap4-prm-instti,omap-prm-instµØprm@1b00#ti,omap4-prm-instti,omap-prm-instµ@Øtarget-module@a000ti,sysc-omap4ti,syscµ crev+ \ scrm@0ti,omap4-scrmµ clocks+auxclk0_src_gate_ck@310{ ti,composite-no-wait-gate-clock¹Ÿµúauxclk0_src_mux_ck@310{ti,composite-mux-clock ¹Ÿµúauxclk0_src_ck{ti,composite-clock¹úauxclk0_ck@310{ti,divider-clock¹ŸÁµú*auxclk1_src_gate_ck@314{ ti,composite-no-wait-gate-clock¹Ÿµúauxclk1_src_mux_ck@314{ti,composite-mux-clock ¹Ÿµúauxclk1_src_ck{ti,composite-clock¹úauxclk1_ck@314{ti,divider-clock¹ŸÁµú+auxclk2_src_gate_ck@318{ ti,composite-no-wait-gate-clock¹Ÿµúauxclk2_src_mux_ck@318{ti,composite-mux-clock ¹Ÿµúauxclk2_src_ck{ti,composite-clock¹ú auxclk2_ck@318{ti,divider-clock¹ ŸÁµú,auxclk3_src_gate_ck@31c{ ti,composite-no-wait-gate-clock¹Ÿµú!auxclk3_src_mux_ck@31c{ti,composite-mux-clock ¹Ÿµú"auxclk3_src_ck{ti,composite-clock¹!"ú#auxclk3_ck@31c{ti,divider-clock¹#ŸÁµú-auxclk4_src_gate_ck@320{ ti,composite-no-wait-gate-clock¹Ÿµ ú$auxclk4_src_mux_ck@320{ti,composite-mux-clock ¹Ÿµ ú%auxclk4_src_ck{ti,composite-clock¹$%ú&auxclk4_ck@320{ti,divider-clock¹&ŸÁµ ú.auxclk5_src_gate_ck@324{ ti,composite-no-wait-gate-clock¹Ÿµ$ú'auxclk5_src_mux_ck@324{ti,composite-mux-clock ¹Ÿµ$ú(auxclk5_src_ck{ti,composite-clock¹'(ú)auxclk5_ck@324{ti,divider-clock¹)ŸÁµ$ú/auxclkreq0_ck@210{ ti,mux-clock¹*+,-./Ÿµauxclkreq1_ck@214{ ti,mux-clock¹*+,-./Ÿµauxclkreq2_ck@218{ ti,mux-clock¹*+,-./Ÿµauxclkreq3_ck@21c{ ti,mux-clock¹*+,-./Ÿµauxclkreq4_ck@220{ ti,mux-clock¹*+,-./Ÿµ auxclkreq5_ck@224{ ti,mux-clock¹*+,-./Ÿµ$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkupµÀÀ crevsyscm+ \Àscm@c000ti,omap4-scm-wkupµÀsegment@10000 simple-bus+x\@@PP€€��ÀÀÐÐààððtarget-module@0ti,sysc-omap2ti,syscµcrevsyscsyssùm¹ Àfckdbclk+ \gpio@0ti,omap4-gpioµ L%5 !target-module@4000ti,sysc-omap2ti,syscµ@@@crevsyscsyssù"m ¹Àfck+ \@wdt@0ti,omap4-wdtti,omap3-wdtµ€ LPtarget-module@8000ti,sysc-omap2-timerti,syscµ€€€crevsyscsyssù' m ¹ Àfck+ \€AUtimer@0ti,omap3430-timerµ€¹ Àfcktimer_sys_ck L%` o target-module@c000ti,sysc-omap2ti,syscµÀÀÀcrevsyscsyssù' m ¹XÀfck+ \Àkeypad@0ti,omap4-keypadµ€ Lxcmputarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkupµàà crevsyscm+ \àpinmux@40 ti,omap4-padconfpinctrl-singleµ@8+–! ¥Ãÿpinmux_twl6030_wkup_pinsàúnsegment@20000 simple-bus+„\``    00@@PPpp€€��target-module@0ti,sysc ôdisabled+ \target-module@2000ti,sysc ôdisabled+ \ target-module@4000ti,sysc ôdisabled+ \@target-module@6000ti,sysc ôdisabled+0\`p €0�interconnect@4a000000ti,omap4-l4-cfgsimple-busµJJJ caplaia0+T\JJJJ J (J(0J0segment@0 simple-bus+ü\ 00@@PP``ppÀÀ€€@  00€€   ``ppàà @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_coreµ   crevsyscm+ \ scm@0ti,omap4-scm-coresimple-busµ+ \scm_conf@0sysconµ+ú{control-phy@300ti,control-phy-usb2µcpowerúacontrol-phy@33cti,control-phy-otghsµ<cotghs_controlú_target-module@4000ti,sysc-omap4ti,syscµ@crev+ \@cm1@0ti,omap4-cm1simple-busµ + \ clocks+extalt_clkin_ck{ fixed-clockû„DÀpad_clks_src_ck{ fixed-clockû·ú0pad_clks_ck@108{ti,gate-clock¹0Ÿµpad_slimbus_core_clks_ck{ fixed-clockû·secure_32k_clk_src_ck{ fixed-clockû€slimbus_src_clk{ fixed-clockû·ú1slimbus_clk@108{ti,gate-clock¹1Ÿ µsys_32k_ck{ fixed-clockû€úvirt_12000000_ck{ fixed-clockû·úvirt_13000000_ck{ fixed-clockûÆ]@ú virt_16800000_ck{ fixed-clockûYú virt_19200000_ck{ fixed-clockû$øú virt_26000000_ck{ fixed-clockûŒº€ú virt_27000000_ck{ fixed-clockû›üÀú virt_38400000_ck{ fixed-clockûIðútie_low_clock_ck{ fixed-clockûutmi_phy_clkout_ck{ fixed-clockû“‡xclk60mhsp1_ck{ fixed-clockû“‡úZxclk60mhsp2_ck{ fixed-clockû“‡ú[xclk60motg_ck{ fixed-clockû“‡dpll_abe_ck@1e0{ti,omap4-dpll-m4xen-clock¹23µàäìèú4dpll_abe_x2_ck@1f0{ti,omap4-dpll-x2-clock¹4µðú5dpll_abe_m2x2_ck@1f0{ti,divider-clock¹5Á µðˆú6abe_24m_fclk{fixed-factor-clock¹6¬·abe_clk@108{ti,divider-clock¹6Áµ4dpll_abe_m3x2_ck@1f4{ti,divider-clock¹5Á µôˆú7core_hsd_byp_clk_mux_ck@12c{ ti,mux-clock¹7Ÿµ,ú8dpll_core_ck@120{ti,omap4-dpll-core-clock¹8µ $,(ú9dpll_core_x2_ck{ti,omap4-dpll-x2-clock¹9ú:dpll_core_m6x2_ck@140{ti,divider-clock¹:Á µ@ˆdpll_core_m2_ck@130{ti,divider-clock¹9Á µ0ˆú;ddrphy_ck{fixed-factor-clock¹;¬·dpll_core_m5x2_ck@13c{ti,divider-clock¹:Á µ<ˆú<div_core_ck@100{ti,divider-clock¹<µÁúGdiv_iva_hs_clk@1dc{ti,divider-clock¹<ÁµÜ4ú@div_mpu_hs_clk@19c{ti,divider-clock¹<Áµœ4úFdpll_core_m4x2_ck@138{ti,divider-clock¹:Á µ8ˆú=dll_clk_div_ck{fixed-factor-clock¹=¬·dpll_abe_m2_ck@1f0{ti,divider-clock¹4ÁµðˆúJdpll_core_m3x2_gate_ck@134{ ti,composite-no-wait-gate-clock¹:Ÿµ4ú>dpll_core_m3x2_div_ck@134{ti,composite-divider-clock¹:Áµ4ˆú?dpll_core_m3x2_ck{ti,composite-clock¹>?údpll_core_m7x2_ck@144{ti,divider-clock¹:Á µDˆiva_hsd_byp_clk_mux_ck@1ac{ ti,mux-clock¹@Ÿµ¬úAdpll_iva_ck@1a0{ti,omap4-dpll-clock¹Aµ ¤¬¨oBJ7€üúBdpll_iva_x2_ck{ti,omap4-dpll-x2-clock¹BúCdpll_iva_m4x2_ck@1b8{ti,divider-clock¹CÁ µ¸ˆoDJÀ~úDdpll_iva_m5x2_ck@1bc{ti,divider-clock¹CÁ µ¼ˆoEJÜ] úEdpll_mpu_ck@160{ti,omap4-dpll-clock¹Fµ`dlhúdpll_mpu_m2_ck@170{ti,divider-clock¹Á µpˆper_hs_clk_div_ck{fixed-factor-clock¹7¬·úKusb_hs_clk_div_ck{fixed-factor-clock¹7¬·úQl3_div_ck@100{ti,divider-clock¹GŸÁµúHl4_div_ck@100{ti,divider-clock¹HŸÁµlp_clk_div_ck{fixed-factor-clock¹6¬·úmpu_periphclk{fixed-factor-clock¹¬·úocp_abe_iclk@528{ti,divider-clock ¹IŸµ(Ìper_abe_24m_fclk{fixed-factor-clock¹J¬·dummy_ck{ fixed-clockûclockdomainsmpuss_cm@300 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {tesla_cm@400 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {ú\abe_cm@500 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ l{úItarget-module@8000ti,sysc-omap4ti,syscµ€crev+ \€ cm2@0ti,omap4-cm2simple-busµ + \ clocks+per_hsd_byp_clk_mux_ck@14c{ ti,mux-clock¹KŸµLúLdpll_per_ck@140{ti,omap4-dpll-clock¹Lµ@DLHúMdpll_per_m2_ck@150{ti,divider-clock¹MÁµPˆúUdpll_per_x2_ck@150{ti,omap4-dpll-x2-clock¹MµPúNdpll_per_m2x2_ck@150{ti,divider-clock¹NÁ µPˆúTdpll_per_m3x2_gate_ck@154{ ti,composite-no-wait-gate-clock¹NŸµTúOdpll_per_m3x2_div_ck@154{ti,composite-divider-clock¹NÁµTˆúPdpll_per_m3x2_ck{ti,composite-clock¹OPúdpll_per_m4x2_ck@158{ti,divider-clock¹NÁ µXˆúdpll_per_m5x2_ck@15c{ti,divider-clock¹NÁ µ\ˆdpll_per_m6x2_ck@160{ti,divider-clock¹NÁ µ`ˆúSdpll_per_m7x2_ck@164{ti,divider-clock¹NÁ µdˆú‚dpll_usb_ck@180{ti,omap4-dpll-j-type-clock¹Qµ€„ŒˆúRdpll_usb_clkdcoldo_ck@1b4{ti,fixed-factor-clock¹R_ µ´ldpll_usb_m2_ck@190{ti,divider-clock¹RÁ µ�ˆúVducati_clk_mux_ck@100{ ti,mux-clock¹GSµfunc_12m_fclk{fixed-factor-clock¹T¬·func_24m_clk{fixed-factor-clock¹U¬·func_24mc_fclk{fixed-factor-clock¹T¬·func_48m_fclk@108{ti,divider-clock¹TµÌfunc_48mc_fclk{fixed-factor-clock¹T¬·func_64m_fclk@108{ti,divider-clock¹µÌfunc_96m_fclk@108{ti,divider-clock¹TµÌinit_60m_fclk@104{ti,divider-clock¹VµÌúYper_abe_nc_fclk@108{ti,divider-clock¹JµÁusb_phy_cm_clk32k@640{ti,gate-clock¹Ÿµ@úbclockdomainsl3_init_clkdmti,clockdomain¹Rl4_ao_cm@600 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {údl3_1_cm@700 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {l3_2_cm@800 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {ducati_cm@900 ti,omap4-cmµ + \ clk@20 ti,clkctrlµ {úyl3_dma_cm@a00 ti,omap4-cmµ + \ clk@20 ti,clkctrlµ {úWl3_emif_cm@b00 ti,omap4-cmµ + \ clk@20 ti,clkctrlµ {d2d_cm@c00 ti,omap4-cmµ + \ clk@20 ti,clkctrlµ {úcl4_cfg_cm@d00 ti,omap4-cmµ + \ clk@20 ti,clkctrlµ {úel3_instr_cm@e00 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ ${ivahd_cm@f00 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {iss_cm@1000 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {úgl3_dss_cm@1100 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {úƒl3_gfx_cm@1200 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ {ú�l3_init_cm@1300 ti,omap4-cmµ+ \clk@20 ti,clkctrlµ Ä{úXl4_per_cm@1400 ti,omap4-cmµ+ \clock@20ti,clkctrl-l4-perti,clkctrlµ D{úhclock@1a0 ti,clkctrl-l4-secureti,clkctrlµ <{úqtarget-module@56000ti,sysc-omap2ti,syscµ``,`(crevsyscsyssù# z m ¹WÀfck+ \`dma-controller@0ti,omap4430-sdmati,omap-sdmaµ0L  ˆ“  úrtarget-module@58000ti,sysc-omap2ti,syscµ€€€crevsyscsyssù#zm ¹XÀfck+ \€Phsi@0 ti,omap4-hsiµ@Pcsysgdd ¹XÀhsi_fck LG­gdd_mpu+ \@hsi-port@2000ti,omap4-hsi-portµ (ctxrx LChsi-port@3000ti,omap4-hsi-portµ08ctxrx LDtarget-module@5e000ti,sysc ôdisabled+ \à target-module@62000ti,sysc-omap2ti,syscµ   crevsyscsyssù m ¹XHÀfck+ \ usbhstll@0 ti,usbhs-tllµ LNtarget-module@64000ti,sysc-omap4ti,syscµ@@@crevsyscsyssùzm ¹X8Àfck+ \@usbhshost@0ti,usbhs-hostµ+ \ ¹YZ[3Àrefclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2ohci@800ti,ohci-omap3µ LL½ehci@c00 ti,ehci-omapµ  LMtarget-module@66000ti,sysc-omap2ti,syscµ```crevsyscsyssù m ¹\ÀfckÕ]Ürstctrl+ \`mmu@0ti,omap4-iommuµ Lèú|segment@80000 simple-bus+\� �   ° °À ÀÐ Ðà à@@PP``pp` `p pÐ Ðà à� �   ° °À ÀÐ Ðà àtarget-module@29000ti,sysc ôdisabled+ \�target-module@2b000ti,sysc-omap2ti,syscµ´´´crevsyscsyssù zm ¹X@Àfck+ \°usb_otg_hs@0ti,omap4-musbµÿL\]­mcdmaõ^ý^ usb2-phy  (_4defaultB`L[`2target-module@2d000ti,sysc-omap2ti,syscµÐÐÐcrevsyscsyssù m ¹XÀÀfck+ \Ðocp2scp@0ti,omap-ocp2scpµ+ \usb2phy@80 ti,omap-usb2µ€X(a¹bÀwkupclkfú^target-module@36000ti,sysc-omap2ti,syscµ```crevsyscsyssùm ¹cÀfck+ \`target-module@4d000ti,sysc-omap2ti,syscµÐÐÐcrevsyscsyssùm ¹cÀfck+ \Ðtarget-module@59000ti,sysc-omap4-srti,syscµ�8csyscùm ¹dÀfck+ \�smartreflex@0ti,omap4-smartreflex-mpuµ€ Ltarget-module@5b000ti,sysc-omap4-srti,syscµ°8csyscùm ¹dÀfck+ \°smartreflex@0ti,omap4-smartreflex-ivaµ€ Lftarget-module@5d000ti,sysc-omap4-srti,syscµÐ8csyscùm ¹dÀfck+ \Ðsmartreflex@0ti,omap4-smartreflex-coreµ€ Ltarget-module@60000ti,sysc ôdisabled+ \target-module@74000ti,sysc-omap4ti,syscµ@@ crevsyscù m ¹eÀfck+ \@mailbox@0ti,omap4-mailboxµ Lq}�ú}mbox-ipu ¡ ¬ú€mbox-dsp ¡ ¬ú~target-module@76000ti,sysc-omap2ti,syscµ```crevsyscsyssù m ¹eÀfck+ \`spinlock@0ti,omap4-hwspinlockµ·segment@100000 simple-bus+`\  00€€��  °°target-module@0ti,sysc-omap4ti,syscctrl_module_pad_coreµ crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-singleµ@–+–! ¥Ãÿ4defaultújpinmux_uart3_pinsàúipinmux_i2c1_pinsàâäúlpinmux_i2c2_pinsàæèúppinmux_i2c3_pinsàêìúkpinmux_i2c4_pinsàîðúvpinmux_mmc2_pinsPà  BDútpinmux_usb_otg_hs_pinsàTVXú`pinmux_twl6030_pinsà^Aúmomap4_padconf_global@5a0sysconsimple-busµ p+ \ púfpbias_regulator@60ti,pbias-omap4ti,pbias-omapµ`Åfpbias_mmc_omap4Ìpbias_mmc_omap4Ûw@ó-ÆÀústarget-module@2000ti,sysc ôdisabled+ \ target-module@8000ti,sysc ôdisabled+ \€target-module@a000ti,sysc-omap4ti,syscµ   crevsyscù z m  ¹gÀfck+ \ segment@180000 simple-bus+segment@200000 simple-bus+h\à!àð!ð   ° °@ @P P` `p p ! 0!0À ÀÐ Ð!!`!`p!p@!@P!P€!€�!�""`"`p"p€"€�"� " °"°À!ÀÐ!Ðtarget-module@4000ti,sysc ôdisabled+ \@target-module@6000ti,sysc ôdisabled+ \`target-module@a000ti,sysc ôdisabled+ \ target-module@c000ti,sysc ôdisabled+ \Àtarget-module@10000ti,sysc ôdisabled+ \target-module@12000ti,sysc ôdisabled+ \ target-module@14000ti,sysc ôdisabled+ \@target-module@16000ti,sysc ôdisabled+ \`target-module@18000ti,sysc ôdisabled+ \€target-module@1c000ti,sysc ôdisabled+ \Àtarget-module@1e000ti,sysc ôdisabled+ \àtarget-module@20000ti,sysc ôdisabled+ \target-module@26000ti,sysc ôdisabled+ \`target-module@28000ti,sysc ôdisabled+ \€target-module@2a000ti,sysc ôdisabled+ \ segment@280000 simple-bus+segment@300000 simple-bus+„\042@@2@ `2`p2p€2€�2�3 2  À2À@target-module@0ti,sysc ôdisabled+x\@@@ ``pp€€��   ÀÀ@interconnect@48000000ti,omap4-l4-persimple-bus0µHHHHHHcaplaia0ia1ia2ia3+\H H segment@0 simple-bus+ä\  00@@PP``ppààððPP``pp€€��  °°ÀÀÐÐàà  °°ÀÀÐÐààðð  00 ` ` p p``pp€€��``pp€€��    € € � �     ° ° À À Ð Ð à à ð ð  @ @ ` ` € €@ À À Ð Ð à à  0 0 @ @ P P € € � �     ° °    P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscµPTXcrevsyscsyssùm ¹h0Àfck+ \serial@0ti,omap4-uartµ LJûÜl4defaultBiJjtarget-module@32000ti,sysc-omap2-timerti,syscµ   crevsyscsyssù' m ¹hÀfck+ \ timer@0ti,omap3430-timerµ€¹hÀfcktimer_sys_ck L&target-module@34000ti,sysc-omap4-timerti,syscµ@@ crevsyscùm ¹h Àfck+ \@timer@0ti,omap4430-timerµ€¹h Àfcktimer_sys_ck L'target-module@36000ti,sysc-omap4-timerti,syscµ`` crevsyscùm ¹h(Àfck+ \`timer@0ti,omap4430-timerµ€¹h(Àfcktimer_sys_ck L(target-module@3e000ti,sysc-omap4-timerti,syscµàà crevsyscùm ¹h0Àfck+ \àtimer@0ti,omap4430-timerµ€¹h0Àfcktimer_sys_ck L-0target-module@40000ti,sysc ôdisabled+ \target-module@55000ti,sysc-omap2ti,syscµPPQcrevsyscsyssùm¹h@h@ Àfckdbclk+ \Pgpio@0ti,omap4-gpioµ L%5 !target-module@57000ti,sysc-omap2ti,syscµppqcrevsyscsyssùm¹hHhH Àfckdbclk+ \pgpio@0ti,omap4-gpioµ L%5 !ú„target-module@59000ti,sysc-omap2ti,syscµ��‘crevsyscsyssùm¹hPhP Àfckdbclk+ \�gpio@0ti,omap4-gpioµ L %5 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Lp£rArB¨up_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,syscµ€€ crevsyscùm ¹IHÀfck+\€I€I€timer@0ti,omap4430-timerµ€I€€¹IHxÀfcktimer_sys_ck L)&target-module@3a000ti,sysc-omap4-timerti,syscµ   crevsyscùm ¹IPÀfck+\ I I timer@0ti,omap4430-timerµ€I €¹IPxÀfcktimer_sys_ck L*&target-module@3c000ti,sysc-omap4-timerti,syscµÀÀ crevsyscùm ¹IXÀfck+\ÀIÀIÀtimer@0ti,omap4430-timerµ€IÀ€¹IXxÀfcktimer_sys_ck L+&target-module@3e000ti,sysc-omap4-timerti,syscµàà crevsyscùm ¹I`Àfck+\àIàIàtimer@0ti,omap4430-timerµ€Ià€¹I`xÀfcktimer_sys_ck L,0&target-module@80000ti,sysc ôdisabled+\IItarget-module@a0000ti,sysc ôdisabled+\ I I target-module@c0000ti,sysc ôdisabled+\ I I target-module@f1000ti,sysc-omap4ti,syscµ crevsyscz m ¹IÀfck+\IIsram@40304000 mmio-sramµ@0@ úgpmc@50000000ti,omap4430-gpmcµP+ L£r¨rxtx3?gpmcQ¹HÀfck !%5target-module@52000000ti,sysc-omap4ti,syscissµRR crevsyscùzm  ¹gÀfck+ \Rtarget-module@55082000ti,sysc-omap2ti,syscµU U U crevsyscsyss mù ¹yÀfckÕzÜrstctrl \U +mmu@0ti,omap4-iommuµ Ldèdútarget-module@4012c000ti,sysc-omap4ti,syscµ@À@À crevsyscùm ¹I@Àfck+\@ÀIÀIÀdmm@4e000000 ti,omap4-dmmµN Lqdmmemif@4c000000 ti,emif-4dµL Lnemif1Qzƒš¯emif@4d000000 ti,emif-4dµM Loemif2Qzƒš¯dsp ti,omap4-dsp Â{Í|Õ] ¹\Ôomap4-dsp-fw.xe64Tâ}~ ôdisabledipu@55020000 ti,omap4-ipuµUcl2ramÍÕzz ¹yÔomap4-ipu-fw.xem3â}€ ôdisabledtarget-module@4b501000ti,sysc-omap2ti,syscµKP€KP„KPˆcrevsyscsyssùm ¹qÀfck+ \KPaes@0 ti,omap4-aesµ  LU£rorn¨txrxtarget-module@4b701000ti,sysc-omap2ti,syscµKp€Kp„Kpˆcrevsyscsyssùm ¹qÀfck+ \Kpaes@0 ti,omap4-aesµ  L@£rrrq¨txrxtarget-module@4b100000ti,sysc-omap3-shamti,syscµKKKcrevsyscsyssù m ¹q(Àfck+ \Ksham@0ti,omap4-shamµ L3£rw¨rxregulator-abb-mpu ti,abb-v2Ìabb_mpu+逹2ôokayµJ0{ÐJ0`cbase-addressint-addressx#£èO€èû1Èregulator-abb-iva ti,abb-v2Ìabb_iva+逹2 ôdisabledµJ0{ØJ0`cbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscµVþVþ crevsysczm ¹�Àfck+ \Vo�‚J 'À‚target-module@58000000ti,sysc-omap2ti,syscµXX crevsyss0¹ƒƒ ƒ ƒ Àfckhdmi_clksys_clktv_clk+ \Xdss@0 ti,omap4-dssµ€ ôdisabled ¹ƒÀfck+ \target-module@1000ti,sysc-omap2ti,syscµcrevsyscsyss m zù¹ƒƒ  Àfcksys_clk+ \dispc@0ti,omap4-dispcµ L ¹ƒÀfcktarget-module@2000ti,sysc-omap2ti,syscµ   crevsyscsyss mù¹ƒƒ  Àfcksys_clk+ \ encoder@0µ ôdisabled¹ƒHÀfckicktarget-module@3000ti,sysc-omap2ti,syscµ0crev ¹ƒ Àsys_clk+ \0encoder@0ti,omap4-vencµ ôdisabled ¹ƒ Àfcktarget-module@4000ti,sysc-omap2ti,syscµ@@@crevsyscsyss mù+ \@encoder@0 ti,omap4-dsiµ@ cprotophypll L5 ôdisabled¹ƒƒ  Àfcksys_clk+target-module@5000ti,sysc-omap2ti,syscµPPPcrevsyscsyss mù+ \Pencoder@0 ti,omap4-dsiµ@ cprotophypll LT ôdisabled¹ƒƒ  Àfcksys_clk+target-module@6000ti,sysc-omap4ti,syscµ`` crevsyscmù¹ƒ ƒ Àfckdss_clk+ \` encoder@0ti,omap4-hdmi µcwppllphycore Le ôdisabled¹ƒ ƒ  Àfcksys_clk£rL ¨audio_txbandgap@4a002260µJ"`J#,ti,omap4430-bandgap /„5ú…thermal-zonescpu_thermalKúaèo…N tripscpu_alertŒ† ˜ÐŸpassiveú†cpu_critŒèH˜Ð Ÿcriticalcooling-mapsmap0£† ¨‡ÿÿÿÿÿÿÿÿmemory@80000000˜memoryµ€ pwmleds pwm-ledsgreen·green ½ˆw5”Âorange·orange ½ˆw5” compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#reset-cells#power-domain-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parents#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesremote-wakeup-connectedresetsreset-names#iommu-cellsusb-phyphysphy-namesmultipointnum-epsram-bitsctrl-modulepinctrl-namespinctrl-0interface-typemodepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmti,system-power-controllerregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyti,non-removablebus-widthpower-domainsti,timer-dspgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infogpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicelabelpwmsmax-brightness