Ð þíÿ„8õ€( õH0ti,omap3-zoom3ti,omap3630ti,omap36xxti,omap3 + 7TI Zoom3chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpu‡‹’cpuž“à¬ÀËÚæ pmu@54000000arm,cortex-a8-pmu‡T€îùdebugsssocti,omap-inframpu ti,omap3-mpuùmpuiva ti,iva2.2ùivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus‡hî +ùl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus‡ +  pinmux@30 ti,omap3-padconfpinctrl-single‡08+ *?]ÿpinmux_mmc1_pins0zæñpinmux_mmc2_pinsPz(*,.02468:pinmux_mmc3_pinszh æópinmux_uart1_pins zPNRALæçpinmux_uart2_pins zDFJHæèpinmux_uart3_pins zjlnpæépinmux_wl12xx_gpiozêæ scm_conf@270sysconsimple-bus‡p0+ p0æpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap‡°Žpbias_mmc_omap2430•pbias_mmc_omap2430¤w@¼-ÆÀæîclocks+mcbsp5_mux_fck@68Ôti,composite-mux-clock‹á‡hæ mcbsp5_fckÔti,composite-clock‹ æûmcbsp1_mux_fck@4Ôti,composite-mux-clock‹á‡æ mcbsp1_fckÔti,composite-clock‹ æömcbsp2_mux_fck@4Ôti,composite-mux-clock‹ á‡æmcbsp2_fckÔti,composite-clock‹æømcbsp3_mux_fck@68Ôti,composite-mux-clock‹ ‡hæmcbsp3_fckÔti,composite-clock‹æùmcbsp4_mux_fck@68Ôti,composite-mux-clock‹ á‡hæmcbsp4_fckÔti,composite-clock‹æúclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single‡ \+ *?]ÿpinmux_wlan_host_wkup_pinsztarget-module@480a6000ti,sysc-omap2ti,sysc‡H `DH `HH `Lîrevsyscsyssø ‹’ick+ H ` aes1@0 ti,omap3-aes‡Pî   %txrxtarget-module@480c5000ti,sysc-omap2ti,sysc‡H PDH PHH PLîrevsyscsyssø ‹’ick+ H P aes2@0 ti,omap3-aes‡Pî AB%txrxprm@48306000 ti,omap3-prm‡H0`@î clocks+virt_16_8m_ckÔ fixed-clock/Yæosc_sys_ck@d40Ô ti,mux-clock‹‡ @æsys_ck@1270Ôti,divider-clock‹á?‡pJæ"sys_clkout1@d70Ôti,gate-clock‹‡ pádpll3_x2_ckÔfixed-factor-clock‹aldpll3_m2x2_ckÔfixed-factor-clock‹alæ!dpll4_x2_ckÔfixed-factor-clock‹ alcorex2_fckÔfixed-factor-clock‹!alæ#wkup_l4_ickÔfixed-factor-clock‹"alæRcorex2_d3_fckÔfixed-factor-clock‹#alæ‰corex2_d5_fckÔfixed-factor-clock‹#alæŠclockdomainscm@48004000 ti,omap3-cm‡H@@clocks+dummy_apb_pclkÔ fixed-clock/omap_32k_fckÔ fixed-clock/€æDvirt_12m_ckÔ fixed-clock/·ævirt_13m_ckÔ fixed-clock/Æ]@ævirt_19200000_ckÔ fixed-clock/$øævirt_26000000_ckÔ fixed-clock/Œº€ævirt_38_4m_ckÔ fixed-clock/Iðædpll4_ck@d00Ôti,omap3-dpll-per-j-type-clock‹""‡ D 0æ dpll4_m2_ck@d48Ôti,divider-clock‹ ??‡ HJæ$dpll4_m2x2_mul_ckÔfixed-factor-clock‹$alæ%dpll4_m2x2_ck@d00Ôti,hsdiv-gate-clock‹%ᇠvæ&omap_96m_alwon_fckÔfixed-factor-clock‹&alæ-dpll3_ck@d00Ôti,omap3-dpll-core-clock‹""‡ @ 0ædpll3_m3_ck@1140Ôti,divider-clock‹á?‡@Jæ'dpll3_m3x2_mul_ckÔfixed-factor-clock‹'alæ(dpll3_m3x2_ck@d00Ôti,hsdiv-gate-clock‹(á ‡ væ)emu_core_alwon_ckÔfixed-factor-clock‹)alæfsys_altclkÔ fixed-clock/æ2mcbsp_clksÔ fixed-clock/ædpll3_m2_ck@d40Ôti,divider-clock‹á?‡ @Jæcore_ckÔfixed-factor-clock‹alæ*dpll1_fck@940Ôti,divider-clock‹*á?‡ @Jæ+dpll1_ck@904Ôti,omap3-dpll-clock‹"+‡  $ @ 4ædpll1_x2_ckÔfixed-factor-clock‹alæ,dpll1_x2m2_ck@944Ôti,divider-clock‹,?‡ DJæ@cm_96m_fckÔfixed-factor-clock‹-alæ.omap_96m_fck@d40Ô ti,mux-clock‹."ᇠ@æIdpll4_m3_ck@e40Ôti,divider-clock‹ á? ‡@Jæ/dpll4_m3x2_mul_ckÔfixed-factor-clock‹/alæ0dpll4_m3x2_ck@d00Ôti,hsdiv-gate-clock‹0ᇠvæ1omap_54m_fck@d40Ô ti,mux-clock‹12ᇠ@æ<cm_96m_d2_fckÔfixed-factor-clock‹.alæ3omap_48m_fck@d40Ô ti,mux-clock‹32ᇠ@æ4omap_12m_fckÔfixed-factor-clock‹4alæKdpll4_m4_ck@e40Ôti,divider-clock‹ ?‡@Jæ5dpll4_m4x2_mul_ckÔti,fixed-factor-clock‹5Œš§æ6dpll4_m4x2_ck@d00Ôti,gate-clock‹6ᇠv§æ�dpll4_m5_ck@f40Ôti,divider-clock‹ ??‡@Jæ7dpll4_m5x2_mul_ckÔti,fixed-factor-clock‹7Œš§æ8dpll4_m5x2_ck@d00Ôti,hsdiv-gate-clock‹8ᇠv§ændpll4_m6_ck@1140Ôti,divider-clock‹ á??‡@Jæ9dpll4_m6x2_mul_ckÔfixed-factor-clock‹9alæ:dpll4_m6x2_ck@d00Ôti,hsdiv-gate-clock‹:ᇠvæ;emu_per_alwon_ckÔfixed-factor-clock‹;alægclkout2_src_gate_ck@d70Ô ti,composite-no-wait-gate-clock‹*ᇠpæ=clkout2_src_mux_ck@d70Ôti,composite-mux-clock‹*".<‡ pæ>clkout2_src_ckÔti,composite-clock‹=>æ?sys_clkout2@d70Ôti,divider-clock‹?á?@‡ pºmpu_ckÔfixed-factor-clock‹@alæAarm_fck@924Ôti,divider-clock‹A‡ $?emu_mpu_alwon_ckÔfixed-factor-clock‹Aalæhl3_ick@a40Ôti,divider-clock‹*?‡ @JæBl4_ick@a40Ôti,divider-clock‹Bá?‡ @JæCrm_ick@c40Ôti,divider-clock‹Cá?‡ @Jgpt10_gate_fck@a00Ôti,composite-gate-clock‹"á ‡ æEgpt10_mux_fck@a40Ôti,composite-mux-clock‹D"ᇠ@æFgpt10_fckÔti,composite-clock‹EFgpt11_gate_fck@a00Ôti,composite-gate-clock‹"á ‡ æGgpt11_mux_fck@a40Ôti,composite-mux-clock‹D"ᇠ@æHgpt11_fckÔti,composite-clock‹GHcore_96m_fckÔfixed-factor-clock‹Ialæmmchs2_fck@a00Ôti,wait-gate-clock‹‡ áæ¹mmchs1_fck@a00Ôti,wait-gate-clock‹‡ áæºi2c3_fck@a00Ôti,wait-gate-clock‹‡ áæ»i2c2_fck@a00Ôti,wait-gate-clock‹‡ áæ¼i2c1_fck@a00Ôti,wait-gate-clock‹‡ áæ½mcbsp5_gate_fck@a00Ôti,composite-gate-clock‹á ‡ æ mcbsp1_gate_fck@a00Ôti,composite-gate-clock‹á ‡ æ core_48m_fckÔfixed-factor-clock‹4alæJmcspi4_fck@a00Ôti,wait-gate-clock‹J‡ áæ¾mcspi3_fck@a00Ôti,wait-gate-clock‹J‡ áæ¿mcspi2_fck@a00Ôti,wait-gate-clock‹J‡ áæÀmcspi1_fck@a00Ôti,wait-gate-clock‹J‡ áæÁuart2_fck@a00Ôti,wait-gate-clock‹J‡ áæÂuart1_fck@a00Ôti,wait-gate-clock‹J‡ á æÃcore_12m_fckÔfixed-factor-clock‹KalæLhdq_fck@a00Ôti,wait-gate-clock‹L‡ áæÄcore_l3_ickÔfixed-factor-clock‹BalæMsdrc_ick@a10Ôti,wait-gate-clock‹M‡ áæŽgpmc_fckÔfixed-factor-clock‹Malcore_l4_ickÔfixed-factor-clock‹CalæNmmchs2_ick@a10Ôti,omap3-interface-clock‹N‡ áæÅmmchs1_ick@a10Ôti,omap3-interface-clock‹N‡ áæÆhdq_ick@a10Ôti,omap3-interface-clock‹N‡ áæÇmcspi4_ick@a10Ôti,omap3-interface-clock‹N‡ áæÈmcspi3_ick@a10Ôti,omap3-interface-clock‹N‡ áæÉmcspi2_ick@a10Ôti,omap3-interface-clock‹N‡ áæÊmcspi1_ick@a10Ôti,omap3-interface-clock‹N‡ áæËi2c3_ick@a10Ôti,omap3-interface-clock‹N‡ áæÌi2c2_ick@a10Ôti,omap3-interface-clock‹N‡ áæÍi2c1_ick@a10Ôti,omap3-interface-clock‹N‡ áæÎuart2_ick@a10Ôti,omap3-interface-clock‹N‡ áæÏuart1_ick@a10Ôti,omap3-interface-clock‹N‡ á æÐgpt11_ick@a10Ôti,omap3-interface-clock‹N‡ á æÑgpt10_ick@a10Ôti,omap3-interface-clock‹N‡ á æÒmcbsp5_ick@a10Ôti,omap3-interface-clock‹N‡ á æÓmcbsp1_ick@a10Ôti,omap3-interface-clock‹N‡ á æÔomapctrl_ick@a10Ôti,omap3-interface-clock‹N‡ áæÕdss_tv_fck@e00Ôti,gate-clock‹<‡áæ´dss_96m_fck@e00Ôti,gate-clock‹I‡áæµdss2_alwon_fck@e00Ôti,gate-clock‹"‡áæ¶dummy_ckÔ fixed-clock/gpt1_gate_fck@c00Ôti,composite-gate-clock‹"ᇠæOgpt1_mux_fck@c40Ôti,composite-mux-clock‹D"‡ @æPgpt1_fckÔti,composite-clock‹OPæüaes2_ick@a10Ôti,omap3-interface-clock‹Nᇠæwkup_32k_fckÔfixed-factor-clock‹DalæQgpio1_dbck@c00Ôti,gate-clock‹Q‡ áæ«sha12_ick@a10Ôti,omap3-interface-clock‹N‡ áæÖwdt2_fck@c00Ôti,wait-gate-clock‹Q‡ áæ¬wdt2_ick@c10Ôti,omap3-interface-clock‹R‡ áæ­wdt1_ick@c10Ôti,omap3-interface-clock‹R‡ áæ®gpio1_ick@c10Ôti,omap3-interface-clock‹R‡ áæ¯omap_32ksync_ick@c10Ôti,omap3-interface-clock‹R‡ áæ°gpt12_ick@c10Ôti,omap3-interface-clock‹R‡ áæ±gpt1_ick@c10Ôti,omap3-interface-clock‹R‡ áæ²per_96m_fckÔfixed-factor-clock‹-alæ per_48m_fckÔfixed-factor-clock‹4alæSuart3_fck@1000Ôti,wait-gate-clock‹S‡á æ�gpt2_gate_fck@1000Ôti,composite-gate-clock‹"á‡æTgpt2_mux_fck@1040Ôti,composite-mux-clock‹D"‡@æUgpt2_fckÔti,composite-clock‹TUæýgpt3_gate_fck@1000Ôti,composite-gate-clock‹"á‡æVgpt3_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æWgpt3_fckÔti,composite-clock‹VWgpt4_gate_fck@1000Ôti,composite-gate-clock‹"á‡æXgpt4_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æYgpt4_fckÔti,composite-clock‹XYgpt5_gate_fck@1000Ôti,composite-gate-clock‹"á‡æZgpt5_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æ[gpt5_fckÔti,composite-clock‹Z[gpt6_gate_fck@1000Ôti,composite-gate-clock‹"á‡æ\gpt6_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æ]gpt6_fckÔti,composite-clock‹\]gpt7_gate_fck@1000Ôti,composite-gate-clock‹"á‡æ^gpt7_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æ_gpt7_fckÔti,composite-clock‹^_gpt8_gate_fck@1000Ôti,composite-gate-clock‹"á ‡æ`gpt8_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æagpt8_fckÔti,composite-clock‹`agpt9_gate_fck@1000Ôti,composite-gate-clock‹"á ‡æbgpt9_mux_fck@1040Ôti,composite-mux-clock‹D"á‡@æcgpt9_fckÔti,composite-clock‹bcper_32k_alwon_fckÔfixed-factor-clock‹Dalædgpio6_dbck@1000Ôti,gate-clock‹d‡áæ‘gpio5_dbck@1000Ôti,gate-clock‹d‡áæ’gpio4_dbck@1000Ôti,gate-clock‹d‡áæ“gpio3_dbck@1000Ôti,gate-clock‹d‡áæ”gpio2_dbck@1000Ôti,gate-clock‹d‡á æ•wdt3_fck@1000Ôti,wait-gate-clock‹d‡á æ–per_l4_ickÔfixed-factor-clock‹Calæegpio6_ick@1010Ôti,omap3-interface-clock‹e‡áæ—gpio5_ick@1010Ôti,omap3-interface-clock‹e‡áæ˜gpio4_ick@1010Ôti,omap3-interface-clock‹e‡áæ™gpio3_ick@1010Ôti,omap3-interface-clock‹e‡áæšgpio2_ick@1010Ôti,omap3-interface-clock‹e‡á æ›wdt3_ick@1010Ôti,omap3-interface-clock‹e‡á æœuart3_ick@1010Ôti,omap3-interface-clock‹e‡á æ�uart4_ick@1010Ôti,omap3-interface-clock‹e‡áæžgpt9_ick@1010Ôti,omap3-interface-clock‹e‡á æŸgpt8_ick@1010Ôti,omap3-interface-clock‹e‡á æ gpt7_ick@1010Ôti,omap3-interface-clock‹e‡áæ¡gpt6_ick@1010Ôti,omap3-interface-clock‹e‡áæ¢gpt5_ick@1010Ôti,omap3-interface-clock‹e‡áæ£gpt4_ick@1010Ôti,omap3-interface-clock‹e‡áæ¤gpt3_ick@1010Ôti,omap3-interface-clock‹e‡áæ¥gpt2_ick@1010Ôti,omap3-interface-clock‹e‡áæ¦mcbsp2_ick@1010Ôti,omap3-interface-clock‹e‡áæ§mcbsp3_ick@1010Ôti,omap3-interface-clock‹e‡áæ¨mcbsp4_ick@1010Ôti,omap3-interface-clock‹e‡áæ©mcbsp2_gate_fck@1000Ôti,composite-gate-clock‹á‡æmcbsp3_gate_fck@1000Ôti,composite-gate-clock‹á‡æmcbsp4_gate_fck@1000Ôti,composite-gate-clock‹á‡æemu_src_mux_ck@1140Ô ti,mux-clock‹"fgh‡@æiemu_src_ckÔti,clkdm-gate-clock‹iæjpclk_fck@1140Ôti,divider-clock‹já?‡@Jpclkx2_fck@1140Ôti,divider-clock‹já?‡@Jatclk_fck@1140Ôti,divider-clock‹já?‡@Jtraceclk_src_fck@1140Ô ti,mux-clock‹"fghá‡@æktraceclk_fck@1140Ôti,divider-clock‹ká ?‡@Jsecure_32k_fckÔ fixed-clock/€ælgpt12_fckÔfixed-factor-clock‹lalæþwdt1_fckÔfixed-factor-clock‹lalsecurity_l4_ick2Ôfixed-factor-clock‹Calæmaes1_ick@a14Ôti,omap3-interface-clock‹mᇠærng_ick@a14Ôti,omap3-interface-clock‹m‡ áæ÷sha11_ick@a14Ôti,omap3-interface-clock‹m‡ ádes1_ick@a14Ôti,omap3-interface-clock‹m‡ ácam_mclk@f00Ôti,gate-clock‹nᇧcam_ick@f10Ô!ti,omap3-no-wait-interface-clock‹C‡áæÝcsi2_96m_fck@f00Ôti,gate-clock‹‡áæÞsecurity_l3_ickÔfixed-factor-clock‹Balæopka_ick@a14Ôti,omap3-interface-clock‹o‡ áicr_ick@a10Ôti,omap3-interface-clock‹N‡ ádes2_ick@a10Ôti,omap3-interface-clock‹N‡ ámspro_ick@a10Ôti,omap3-interface-clock‹N‡ ámailboxes_ick@a10Ôti,omap3-interface-clock‹N‡ ássi_l4_ickÔfixed-factor-clock‹Calævsr1_fck@c00Ôti,wait-gate-clock‹"‡ áæsr2_fck@c00Ôti,wait-gate-clock‹"‡ áæsr_l4_ickÔfixed-factor-clock‹Caldpll2_fck@40Ôti,divider-clock‹*á?‡@Jæpdpll2_ck@4Ôti,omap3-dpll-clock‹"p‡$@4Ðâêæqdpll2_m2_ck@44Ôti,divider-clock‹q?‡DJæriva2_ck@0Ôti,wait-gate-clock‹r‡áæßmodem_fck@a00Ôti,omap3-interface-clock‹"‡ áæàsad2d_ick@a10Ôti,omap3-interface-clock‹B‡ áæámad2d_ick@a18Ôti,omap3-interface-clock‹B‡ áæâmspro_fck@a00Ôti,wait-gate-clock‹‡ ássi_ssr_gate_fck_3430es2@a00Ô ti,composite-no-wait-gate-clock‹#ᇠæsssi_ssr_div_fck_3430es2@a40Ôti,composite-divider-clock‹#ᇠ@$þætssi_ssr_fck_3430es2Ôti,composite-clock‹stæussi_sst_fck_3430es2Ôfixed-factor-clock‹ualæhsotgusb_ick_3430es2@a10Ô"ti,omap3-hsotgusb-interface-clock‹M‡ áæ�ssi_ick_3430es2@a10Ôti,omap3-ssi-interface-clock‹v‡ áæusim_gate_fck@c00Ôti,composite-gate-clock‹Iá ‡ æ�sys_d2_ckÔfixed-factor-clock‹"alæxomap_96m_d2_fckÔfixed-factor-clock‹Ialæyomap_96m_d4_fckÔfixed-factor-clock‹Ialæzomap_96m_d8_fckÔfixed-factor-clock‹Ialæ{omap_96m_d10_fckÔfixed-factor-clock‹Ial æ|dpll5_m2_d4_ckÔfixed-factor-clock‹walæ}dpll5_m2_d8_ckÔfixed-factor-clock‹walæ~dpll5_m2_d16_ckÔfixed-factor-clock‹walædpll5_m2_d20_ckÔfixed-factor-clock‹walæ€usim_mux_fck@c40Ôti,composite-mux-clock(‹"xyz{|}~€á‡ @Jæ‚usim_fckÔti,composite-clock‹�‚usim_ick@c10Ôti,omap3-interface-clock‹R‡ á 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áæÜdss1_alwon_fck_3430es2@e00Ôti,dss-gate-clock‹�ᇧæ·dss_ick_3430es2@e10Ôti,omap3-dss-interface-clock‹C‡áæ¸usbhost_120m_fck@1400Ôti,gate-clock‹w‡áæäusbhost_48m_fck@1400Ôti,dss-gate-clock‹4‡áæåusbhost_ick@1410Ôti,omap3-dss-interface-clock‹C‡áææuart4_fck@1000Ôti,wait-gate-clock‹S‡áæªclockdomainscore_l3_clkdmti,clockdomain‹Ž�dpll3_clkdmti,clockdomain‹dpll1_clkdmti,clockdomain‹per_clkdmti,clockdomainl‹�‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ªemu_clkdmti,clockdomain‹jdpll4_clkdmti,clockdomain‹ wkup_clkdmti,clockdomain$‹«¬­®¯°±²³dss_clkdmti,clockdomain‹´µ¶·¸core_l4_clkdmti,clockdomain”‹¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜcam_clkdmti,clockdomain‹ÝÞiva2_clkdmti,clockdomain‹ßdpll2_clkdmti,clockdomain‹qd2d_clkdmti,clockdomain ‹àáâdpll5_clkdmti,clockdomain‹ƒsgx_clkdmti,clockdomain‹ãusbhost_clkdmti,clockdomain ‹äåætarget-module@48320000ti,sysc-omap2ti,sysc‡H2H2 îrevsysc‹Q°’fckick+ H2counter@0ti,omap-counter32k‡ interrupt-controller@48200000ti,omap3-intc*‡H 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesstatusinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressreg-shiftcurrent-speedgpmc,mux-add-datagpmc,wait-pinmultipointnum-epsram-bitsinterface-typeusb-phypowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-deviceregulator-always-ongpiostartup-delay-usenable-active-high