Ð þí}8úX( %ú Egumstix,omap3-overo-tobiduogumstix,omap3-overoti,omap3430ti,omap3 +"7OMAP35xx Gumstix Overo on TobiDuochosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8scpuƒŠcpu–“सÇpmu@54000000arm,cortex-a8-pmuT€ÏÚdebugsssocti,omap-inframpu ti,omap3-mpuÚmpuiva ti,iva2.2Úivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bushÏ +äÚl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ äHscm@2000ti,omap3-scmsimple-bus + ä pinmux@30 ti,omap3-padconfpinctrl-single08+ëú  >ÿ[defaultiÇæpinmux_uart2_pins s<>@BÇåpinmux_i2c1_pinssŠŒÇèpinmux_mmc1_pins0sÇópinmux_mmc2_pins0s(*,.02Çõpinmux_w3cbw003c_pinss„lÇpinmux_hsusb2_pins@s¤ ¦ ¨ ª ¬ ® Ž�Çpinmux_twl4030_pinss°AÇépinmux_i2c3_pinss’”Çïpinmux_uart3_pinssnpÇçscm_conf@270sysconsimple-busp0+ äp0Çpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap°‡pbias_mmc_omap2430Žpbias_mmc_omap2430�w@µ-ÆÀÇòclocks+mcbsp5_mux_fck@68Íti,composite-mux-clockƒÚhÇ mcbsp5_fckÍti,composite-clockƒ Çýmcbsp1_mux_fck@4Íti,composite-mux-clockƒÚÇ mcbsp1_fckÍti,composite-clockƒ Çømcbsp2_mux_fck@4Íti,composite-mux-clockƒ ÚÇmcbsp2_fckÍti,composite-clockƒ Çúmcbsp3_mux_fck@68Íti,composite-mux-clockƒ hÇmcbsp3_fckÍti,composite-clockƒÇûmcbsp4_mux_fck@68Íti,composite-mux-clockƒ ÚhÇmcbsp4_fckÍti,composite-clockƒÇüclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ëú  >ÿpinmux_twl4030_vpins sÇêtarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lçrevsyscsyssñ þ ƒŠick+ äH ` aes1@0 ti,omap3-aesPÏ  txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLçrevsyscsyssñ þ ƒŠick+ äH P aes2@0 ti,omap3-aesPÏABtxrxprm@48306000 ti,omap3-prmH0`@Ï clocks+virt_16_8m_ckÍ fixed-clock(YÇosc_sys_ck@d40Í ti,mux-clockƒ @Çsys_ck@1270Íti,divider-clockƒÚ8pCÇ!sys_clkout1@d70Íti,gate-clockƒ pÚdpll3_x2_ckÍfixed-factor-clockƒZedpll3_m2x2_ckÍfixed-factor-clockƒZeÇ dpll4_x2_ckÍfixed-factor-clockƒZecorex2_fckÍfixed-factor-clockƒ ZeÇ"wkup_l4_ickÍfixed-factor-clockƒ!ZeÇQcorex2_d3_fckÍfixed-factor-clockƒ"ZeLjcorex2_d5_fckÍfixed-factor-clockƒ"Zeljclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclkÍ fixed-clock(omap_32k_fckÍ fixed-clock(€ÇCvirt_12m_ckÍ fixed-clock(·Çvirt_13m_ckÍ fixed-clock(Æ]@Çvirt_19200000_ckÍ fixed-clock($øÇvirt_26000000_ckÍ fixed-clock(Œº€Çvirt_38_4m_ckÍ fixed-clock(IðÇdpll4_ck@d00Íti,omap3-dpll-per-clockƒ!! D 0Çdpll4_m2_ck@d48Íti,divider-clockƒ8? HCÇ#dpll4_m2x2_mul_ckÍfixed-factor-clockƒ#ZeÇ$dpll4_m2x2_ck@d00Íti,gate-clockƒ$Ú oÇ%omap_96m_alwon_fckÍfixed-factor-clockƒ%ZeÇ,dpll3_ck@d00Íti,omap3-dpll-core-clockƒ!! @ 0Çdpll3_m3_ck@1140Íti,divider-clockƒÚ8@CÇ&dpll3_m3x2_mul_ckÍfixed-factor-clockƒ&ZeÇ'dpll3_m3x2_ck@d00Íti,gate-clockƒ'Ú  oÇ(emu_core_alwon_ckÍfixed-factor-clockƒ(ZeÇesys_altclkÍ fixed-clock(Ç1mcbsp_clksÍ fixed-clock(Çdpll3_m2_ck@d40Íti,divider-clockƒÚ8 @CÇcore_ckÍfixed-factor-clockƒZeÇ)dpll1_fck@940Íti,divider-clockƒ)Ú8 @CÇ*dpll1_ck@904Íti,omap3-dpll-clockƒ!*  $ @ 4Çdpll1_x2_ckÍfixed-factor-clockƒZeÇ+dpll1_x2m2_ck@944Íti,divider-clockƒ+8 DCÇ?cm_96m_fckÍfixed-factor-clockƒ,ZeÇ-omap_96m_fck@d40Í ti,mux-clockƒ-!Ú @ÇHdpll4_m3_ck@e40Íti,divider-clockƒÚ8 @CÇ.dpll4_m3x2_mul_ckÍfixed-factor-clockƒ.ZeÇ/dpll4_m3x2_ck@d00Íti,gate-clockƒ/Ú oÇ0omap_54m_fck@d40Í ti,mux-clockƒ01Ú @Ç;cm_96m_d2_fckÍfixed-factor-clockƒ-ZeÇ2omap_48m_fck@d40Í ti,mux-clockƒ21Ú @Ç3omap_12m_fckÍfixed-factor-clockƒ3ZeÇJdpll4_m4_ck@e40Íti,divider-clockƒ8@CÇ4dpll4_m4x2_mul_ckÍti,fixed-factor-clockƒ4…“ Ç5dpll4_m4x2_ck@d00Íti,gate-clockƒ5Ú o ÇŒdpll4_m5_ck@f40Íti,divider-clockƒ8?@CÇ6dpll4_m5x2_mul_ckÍti,fixed-factor-clockƒ6…“ Ç7dpll4_m5x2_ck@d00Íti,gate-clockƒ7Ú o Çmdpll4_m6_ck@1140Íti,divider-clockƒÚ8?@CÇ8dpll4_m6x2_mul_ckÍfixed-factor-clockƒ8ZeÇ9dpll4_m6x2_ck@d00Íti,gate-clockƒ9Ú oÇ:emu_per_alwon_ckÍfixed-factor-clockƒ:ZeÇfclkout2_src_gate_ck@d70Í ti,composite-no-wait-gate-clockƒ)Ú pÇ<clkout2_src_mux_ck@d70Íti,composite-mux-clockƒ)!-; pÇ=clkout2_src_ckÍti,composite-clockƒ<=Ç>sys_clkout2@d70Íti,divider-clockƒ>Ú8@ p³mpu_ckÍfixed-factor-clockƒ?ZeÇ@arm_fck@924Íti,divider-clockƒ@ $8emu_mpu_alwon_ckÍfixed-factor-clockƒ@ZeÇgl3_ick@a40Íti,divider-clockƒ)8 @CÇAl4_ick@a40Íti,divider-clockƒAÚ8 @CÇBrm_ick@c40Íti,divider-clockƒBÚ8 @Cgpt10_gate_fck@a00Íti,composite-gate-clockƒ!Ú  ÇDgpt10_mux_fck@a40Íti,composite-mux-clockƒC!Ú @ÇEgpt10_fckÍti,composite-clockƒDEgpt11_gate_fck@a00Íti,composite-gate-clockƒ!Ú  ÇFgpt11_mux_fck@a40Íti,composite-mux-clockƒC!Ú @ÇGgpt11_fckÍti,composite-clockƒFGcore_96m_fckÍfixed-factor-clockƒHZeÇmmchs2_fck@a00Íti,wait-gate-clockƒ ÚÇ·mmchs1_fck@a00Íti,wait-gate-clockƒ ÚǸi2c3_fck@a00Íti,wait-gate-clockƒ Úǹi2c2_fck@a00Íti,wait-gate-clockƒ ÚǺi2c1_fck@a00Íti,wait-gate-clockƒ ÚÇ»mcbsp5_gate_fck@a00Íti,composite-gate-clockƒÚ  Çmcbsp1_gate_fck@a00Íti,composite-gate-clockƒÚ  Ç core_48m_fckÍfixed-factor-clockƒ3ZeÇImcspi4_fck@a00Íti,wait-gate-clockƒI ÚǼmcspi3_fck@a00Íti,wait-gate-clockƒI Úǽmcspi2_fck@a00Íti,wait-gate-clockƒI ÚǾmcspi1_fck@a00Íti,wait-gate-clockƒI ÚÇ¿uart2_fck@a00Íti,wait-gate-clockƒI ÚÇÀuart1_fck@a00Íti,wait-gate-clockƒI Ú ÇÁcore_12m_fckÍfixed-factor-clockƒJZeÇKhdq_fck@a00Íti,wait-gate-clockƒK ÚÇÂcore_l3_ickÍfixed-factor-clockƒAZeÇLsdrc_ick@a10Íti,wait-gate-clockƒL ÚÇ�gpmc_fckÍfixed-factor-clockƒLZecore_l4_ickÍfixed-factor-clockƒBZeÇMmmchs2_ick@a10Íti,omap3-interface-clockƒM ÚÇÃmmchs1_ick@a10Íti,omap3-interface-clockƒM ÚÇÄhdq_ick@a10Íti,omap3-interface-clockƒM ÚÇÅmcspi4_ick@a10Íti,omap3-interface-clockƒM ÚÇÆmcspi3_ick@a10Íti,omap3-interface-clockƒM ÚÇÇmcspi2_ick@a10Íti,omap3-interface-clockƒM ÚÇÈmcspi1_ick@a10Íti,omap3-interface-clockƒM ÚÇÉi2c3_ick@a10Íti,omap3-interface-clockƒM ÚÇÊi2c2_ick@a10Íti,omap3-interface-clockƒM ÚÇËi2c1_ick@a10Íti,omap3-interface-clockƒM ÚÇÌuart2_ick@a10Íti,omap3-interface-clockƒM ÚÇÍuart1_ick@a10Íti,omap3-interface-clockƒM Ú ÇÎgpt11_ick@a10Íti,omap3-interface-clockƒM Ú ÇÏgpt10_ick@a10Íti,omap3-interface-clockƒM Ú ÇÐmcbsp5_ick@a10Íti,omap3-interface-clockƒM Ú ÇÑmcbsp1_ick@a10Íti,omap3-interface-clockƒM Ú ÇÒomapctrl_ick@a10Íti,omap3-interface-clockƒM ÚÇÓdss_tv_fck@e00Íti,gate-clockƒ;ÚDzdss_96m_fck@e00Íti,gate-clockƒHÚdzdss2_alwon_fck@e00Íti,gate-clockƒ!ÚÇ´dummy_ckÍ fixed-clock(gpt1_gate_fck@c00Íti,composite-gate-clockƒ!Ú ÇNgpt1_mux_fck@c40Íti,composite-mux-clockƒC! @ÇOgpt1_fckÍti,composite-clockƒNOÇþaes2_ick@a10Íti,omap3-interface-clockƒMÚ Çwkup_32k_fckÍfixed-factor-clockƒCZeÇPgpio1_dbck@c00Íti,gate-clockƒP ÚÇ©sha12_ick@a10Íti,omap3-interface-clockƒM ÚÇÔwdt2_fck@c00Íti,wait-gate-clockƒP ÚǪwdt2_ick@c10Íti,omap3-interface-clockƒQ ÚÇ«wdt1_ick@c10Íti,omap3-interface-clockƒQ ÚǬgpio1_ick@c10Íti,omap3-interface-clockƒQ ÚÇ­omap_32ksync_ick@c10Íti,omap3-interface-clockƒQ ÚÇ®gpt12_ick@c10Íti,omap3-interface-clockƒQ Úǯgpt1_ick@c10Íti,omap3-interface-clockƒQ Úǰper_96m_fckÍfixed-factor-clockƒ,ZeÇ per_48m_fckÍfixed-factor-clockƒ3ZeÇRuart3_fck@1000Íti,wait-gate-clockƒRÚ Ç�gpt2_gate_fck@1000Íti,composite-gate-clockƒ!ÚÇSgpt2_mux_fck@1040Íti,composite-mux-clockƒC!@ÇTgpt2_fckÍti,composite-clockƒSTÇÿgpt3_gate_fck@1000Íti,composite-gate-clockƒ!ÚÇUgpt3_mux_fck@1040Íti,composite-mux-clockƒC!Ú@ÇVgpt3_fckÍti,composite-clockƒUVgpt4_gate_fck@1000Íti,composite-gate-clockƒ!ÚÇWgpt4_mux_fck@1040Íti,composite-mux-clockƒC!Ú@ÇXgpt4_fckÍti,composite-clockƒWXgpt5_gate_fck@1000Íti,composite-gate-clockƒ!ÚÇYgpt5_mux_fck@1040Íti,composite-mux-clockƒC!Ú@ÇZgpt5_fckÍti,composite-clockƒYZgpt6_gate_fck@1000Íti,composite-gate-clockƒ!ÚÇ[gpt6_mux_fck@1040Íti,composite-mux-clockƒC!Ú@Ç\gpt6_fckÍti,composite-clockƒ[\gpt7_gate_fck@1000Íti,composite-gate-clockƒ!ÚÇ]gpt7_mux_fck@1040Íti,composite-mux-clockƒC!Ú@Ç^gpt7_fckÍti,composite-clockƒ]^gpt8_gate_fck@1000Íti,composite-gate-clockƒ!Ú Ç_gpt8_mux_fck@1040Íti,composite-mux-clockƒC!Ú@Ç`gpt8_fckÍti,composite-clockƒ_`gpt9_gate_fck@1000Íti,composite-gate-clockƒ!Ú Çagpt9_mux_fck@1040Íti,composite-mux-clockƒC!Ú@Çbgpt9_fckÍti,composite-clockƒabper_32k_alwon_fckÍfixed-factor-clockƒCZeÇcgpio6_dbck@1000Íti,gate-clockƒcÚÇ�gpio5_dbck@1000Íti,gate-clockƒcÚÇ‘gpio4_dbck@1000Íti,gate-clockƒcÚÇ’gpio3_dbck@1000Íti,gate-clockƒcÚÇ“gpio2_dbck@1000Íti,gate-clockƒcÚ Ç”wdt3_fck@1000Íti,wait-gate-clockƒcÚ Ç•per_l4_ickÍfixed-factor-clockƒBZeÇdgpio6_ick@1010Íti,omap3-interface-clockƒdÚÇ–gpio5_ick@1010Íti,omap3-interface-clockƒdÚÇ—gpio4_ick@1010Íti,omap3-interface-clockƒdÚǘgpio3_ick@1010Íti,omap3-interface-clockƒdÚÇ™gpio2_ick@1010Íti,omap3-interface-clockƒdÚ Çšwdt3_ick@1010Íti,omap3-interface-clockƒdÚ Ç›uart3_ick@1010Íti,omap3-interface-clockƒdÚ Çœuart4_ick@1010Íti,omap3-interface-clockƒdÚÇ�gpt9_ick@1010Íti,omap3-interface-clockƒdÚ Çžgpt8_ick@1010Íti,omap3-interface-clockƒdÚ ÇŸgpt7_ick@1010Íti,omap3-interface-clockƒdÚÇ gpt6_ick@1010Íti,omap3-interface-clockƒdÚÇ¡gpt5_ick@1010Íti,omap3-interface-clockƒdÚÇ¢gpt4_ick@1010Íti,omap3-interface-clockƒdÚÇ£gpt3_ick@1010Íti,omap3-interface-clockƒdÚǤgpt2_ick@1010Íti,omap3-interface-clockƒdÚÇ¥mcbsp2_ick@1010Íti,omap3-interface-clockƒdÚǦmcbsp3_ick@1010Íti,omap3-interface-clockƒdÚǧmcbsp4_ick@1010Íti,omap3-interface-clockƒdÚǨmcbsp2_gate_fck@1000Íti,composite-gate-clockƒÚÇ mcbsp3_gate_fck@1000Íti,composite-gate-clockƒÚÇmcbsp4_gate_fck@1000Íti,composite-gate-clockƒÚÇemu_src_mux_ck@1140Í ti,mux-clockƒ!efg@Çhemu_src_ckÍti,clkdm-gate-clockƒhÇipclk_fck@1140Íti,divider-clockƒiÚ8@Cpclkx2_fck@1140Íti,divider-clockƒiÚ8@Catclk_fck@1140Íti,divider-clockƒiÚ8@Ctraceclk_src_fck@1140Í ti,mux-clockƒ!efgÚ@Çjtraceclk_fck@1140Íti,divider-clockƒjÚ 8@Csecure_32k_fckÍ fixed-clock(€Çkgpt12_fckÍfixed-factor-clockƒkZeÇwdt1_fckÍfixed-factor-clockƒkZesecurity_l4_ick2Ífixed-factor-clockƒBZeÇlaes1_ick@a14Íti,omap3-interface-clockƒlÚ Çrng_ick@a14Íti,omap3-interface-clockƒl ÚÇùsha11_ick@a14Íti,omap3-interface-clockƒl Údes1_ick@a14Íti,omap3-interface-clockƒl Úcam_mclk@f00Íti,gate-clockƒmÚ cam_ick@f10Í!ti,omap3-no-wait-interface-clockƒBÚÇÛcsi2_96m_fck@f00Íti,gate-clockƒÚÇÜsecurity_l3_ickÍfixed-factor-clockƒAZeÇnpka_ick@a14Íti,omap3-interface-clockƒn Úicr_ick@a10Íti,omap3-interface-clockƒM Údes2_ick@a10Íti,omap3-interface-clockƒM Úmspro_ick@a10Íti,omap3-interface-clockƒM Úmailboxes_ick@a10Íti,omap3-interface-clockƒM Ússi_l4_ickÍfixed-factor-clockƒBZeÇusr1_fck@c00Íti,wait-gate-clockƒ! ÚÇ sr2_fck@c00Íti,wait-gate-clockƒ! ÚÇ sr_l4_ickÍfixed-factor-clockƒBZedpll2_fck@40Íti,divider-clockƒ)Ú8@CÇodpll2_ck@4Íti,omap3-dpll-clockƒ!o$@4ÉÛãÇpdpll2_m2_ck@44Íti,divider-clockƒp8DCÇqiva2_ck@0Íti,wait-gate-clockƒqÚÇÝmodem_fck@a00Íti,omap3-interface-clockƒ! ÚÇÞsad2d_ick@a10Íti,omap3-interface-clockƒA ÚÇßmad2d_ick@a18Íti,omap3-interface-clockƒA ÚÇàmspro_fck@a00Íti,wait-gate-clockƒ Ússi_ssr_gate_fck_3430es2@a00Í ti,composite-no-wait-gate-clockƒ"Ú Çrssi_ssr_div_fck_3430es2@a40Íti,composite-divider-clockƒ"Ú @$÷Çsssi_ssr_fck_3430es2Íti,composite-clockƒrsÇtssi_sst_fck_3430es2Ífixed-factor-clockƒtZeÇhsotgusb_ick_3430es2@a10Í"ti,omap3-hsotgusb-interface-clockƒL ÚÇŽssi_ick_3430es2@a10Íti,omap3-ssi-interface-clockƒu ÚÇ usim_gate_fck@c00Íti,composite-gate-clockƒHÚ  Ç€sys_d2_ckÍfixed-factor-clockƒ!ZeÇwomap_96m_d2_fckÍfixed-factor-clockƒHZeÇxomap_96m_d4_fckÍfixed-factor-clockƒHZeÇyomap_96m_d8_fckÍfixed-factor-clockƒHZeÇzomap_96m_d10_fckÍfixed-factor-clockƒHZe Ç{dpll5_m2_d4_ckÍfixed-factor-clockƒvZeÇ|dpll5_m2_d8_ckÍfixed-factor-clockƒvZeÇ}dpll5_m2_d16_ckÍfixed-factor-clockƒvZeÇ~dpll5_m2_d20_ckÍfixed-factor-clockƒvZeÇusim_mux_fck@c40Íti,composite-mux-clock(ƒ!wxyz{|}~Ú @CÇ�usim_fckÍti,composite-clockƒ€�usim_ick@c10Íti,omap3-interface-clockƒQ Ú DZdpll5_ck@d04Íti,omap3-dpll-clockƒ!!  $ L 4ÉÛÇ‚dpll5_m2_ck@d50Íti,divider-clockƒ‚8 PCÇvsgx_gate_fck@b00Íti,composite-gate-clockƒ)Ú ÇŠcore_d3_ckÍfixed-factor-clockƒ)Zeǃcore_d4_ckÍfixed-factor-clockƒ)ZeÇ„core_d6_ckÍfixed-factor-clockƒ)ZeÇ…omap_192m_alwon_fckÍfixed-factor-clockƒ%Zedžcore_d2_ckÍfixed-factor-clockƒ)ZeLJsgx_mux_fck@b40Íti,composite-mux-clock ƒƒ„…-†‡ˆ‰ @Ç‹sgx_fckÍti,composite-clockƒŠ‹Çsgx_ick@b10Íti,wait-gate-clockƒA ÚÇácpefuse_fck@a08Íti,gate-clockƒ! ÚÇÕts_fck@a08Íti,gate-clockƒC ÚÇÖusbtll_fck@a08Íti,wait-gate-clockƒv ÚÇ×usbtll_ick@a18Íti,omap3-interface-clockƒM ÚÇØmmchs3_ick@a10Íti,omap3-interface-clockƒM ÚÇÙmmchs3_fck@a00Íti,wait-gate-clockƒ ÚÇÚdss1_alwon_fck_3430es2@e00Íti,dss-gate-clockƒŒÚ ǵdss_ick_3430es2@e10Íti,omap3-dss-interface-clockƒBÚǶusbhost_120m_fck@1400Íti,gate-clockƒvÚÇâusbhost_48m_fck@1400Íti,dss-gate-clockƒ3ÚÇãusbhost_ick@1410Íti,omap3-dss-interface-clockƒBÚÇäclockdomainscore_l3_clkdmti,clockdomainƒ�Ždpll3_clkdmti,clockdomainƒdpll1_clkdmti,clockdomainƒper_clkdmti,clockdomainhƒ��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨emu_clkdmti,clockdomainƒidpll4_clkdmti,clockdomainƒwkup_clkdmti,clockdomain$ƒ©ª«¬­®¯°±dss_clkdmti,clockdomainƒ²³´µ¶core_l4_clkdmti,clockdomain”ƒ·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚcam_clkdmti,clockdomainƒÛÜiva2_clkdmti,clockdomainƒÝdpll2_clkdmti,clockdomainƒpd2d_clkdmti,clockdomain ƒÞßàdpll5_clkdmti,clockdomainƒ‚sgx_clkdmti,clockdomainƒáusbhost_clkdmti,clockdomain ƒâãätarget-module@48320000ti,sysc-omap2ti,syscH2H2 çrevsyscþƒP®Šfckick+ äH2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc úH Çtarget-module@48056000ti,sysc-omap2ti,syscH`H`,H`(çrevsyscsyssñ#  þ ƒLŠick+ äH`dma-controller@0ti,omap3430-sdmati,omap-sdmaÏ  )`Çgpio@48310000ti,omap3-gpioH1ÏÚgpio16HX úÇgpio@49050000ti,omap3-gpioIÏÚgpio2HX úÇgpio@49052000ti,omap3-gpioI ÏÚgpio3HX úÇgpio@49054000ti,omap3-gpioI@Ï Úgpio4HX úgpio@49056000ti,omap3-gpioI`Ï!Úgpio5HX úgpio@49058000ti,omap3-gpioI€Ï"Úgpio6HX úÇserial@4806a000ti,omap3-uartH  dH12txrxÚuart1(Ülserial@4806c000ti,omap3-uartHÀdI34txrxÚuart2(Ül[defaultiåserial@49020000ti,omap3-uartIdJæn56txrxÚuart3(Ül[defaultiçi2c@48070000 ti,omap3-i2cH€Ï8txrx+Úi2c1[defaultiè('¬@twl@48HÏ  ti,twl4030 ú[defaultiéêaudioti,twl4030-audiocodecrtcti,twl4030-rtcÏ bciti,twl4030-bciÏ xë†ì ’vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1� 'Àµ regulator-vdacti,twl4030-vdac�w@µw@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1�:�µ0°Çôregulator-vmmc2ti,twl4030-vmmc2�:�µ0°regulator-vusb1v5ti,twl4030-vusb1v5Çíregulator-vusb1v8ti,twl4030-vusb1v8Çîregulator-vusb3v1ti,twl4030-vusb3v1Çëregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2�w@µw@regulator-vsimti,twl4030-vsim�w@µ-ÆÀgpioti,twl4030-gpioHX ú£twl4030-usbti,twl4030-usbÏ ¯í½îËëÙâÇpwmti,twl4030-pwmípwmledti,twl4030-pwmledíÇpwrbuttonti,twl4030-pwrbuttonÏkeypadti,twl4030-keypadÏømadcti,twl4030-madcÏÇìi2c@48072000 ti,omap3-i2cH €Ï9txrx+Úi2c2 -disabledi2c@48060000 ti,omap3-i2cH€Ï=txrx+Úi2c3[defaultiï(† eeprom@51 atmel,24c01Q4lis33de@1dst,lis33dest,lis3lv02d=ðHñVhzŒ ž ° ÂÐÞíü )8xGxVŒe&t&ƒî -disabledmailbox@48094000ti,omap3-mailboxÚmailboxH @Ï’ž°dsp  Íspi@48098000ti,omap2-mcspiH €ÏA+Úmcspi1Ø@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH  ÏB+Úmcspi2Ø +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH €Ï[+Úmcspi3Ø tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH  Ï0+Úmcspi4ØFGtx0rx01w@480b2000 ti,omap3-1wH Ï:Úhdq1wmmc@4809c000ti,omap3-hsmmcH ÀÏSÚmmc1æ=>txrxóò[defaultióô mmc@480b4000ti,omap3-hsmmcH @ÏVÚmmc2/0txrx[defaultiõö÷ #0mmc@480ad000ti,omap3-hsmmcH ÐÏ^Úmmc3MNtxrx -disabledmmu@480bd400>ti,omap2-iommuH Ô€ÏÚmmu_ispKÇ mmu@5d000000>ti,omap2-iommu]€ÏÚmmu_iva -disabledwdt@48314000 ti,omap3-wdtH1@€ Úwd_timer2mcbsp@48074000ti,omap3-mcbspH@ÿçmpu Ï;< [commontxrxk€Úmcbsp1 txrxƒøŠfck -disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Dçrevsyscsyssñþ ƒùŠick+ äH rng@0 ti,omap2-rng Ï4mcbsp@49022000ti,omap3-mcbspI ÿI€ÿ çmpusidetoneÏ>?[commontxrxsidetonekÚmcbsp2mcbsp2_sidetone!"txrxƒú¦Šfckick-okayÇmcbsp@49024000ti,omap3-mcbspI@ÿI ÿ çmpusidetoneÏYZ[commontxrxsidetonek€Úmcbsp3mcbsp3_sidetonetxrxƒû§Šfckick -disabledmcbsp@49026000ti,omap3-mcbspI`ÿçmpu Ï67 [commontxrxk€Úmcbsp4txrxƒüŠfckz -disabledmcbsp@48096000ti,omap3-mcbspH `ÿçmpu ÏQR [commontxrxk€Úmcbsp5txrxƒýŠfck -disabledsham@480c3000ti,omap3-shamÚshamH 0dÏ1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscH1€H1€H1€çrevsyscsyssñ' þ ƒþ°Šfckick+ äH1€‹Ÿtimer@0ti,omap3430-timer€ƒþŠfckÏ%ª¹þÉCtarget-module@49032000ti,sysc-omap2-timerti,syscI I I çrevsyscsyssñ' þ ƒÿ¥Šfckick+ äI timer@0ti,omap3430-timerÏ&timer@49034000ti,omap3430-timerI@Ï'Útimer3timer@49036000ti,omap3430-timerI`Ï(Útimer4timer@49038000ti,omap3430-timerI€Ï)Útimer5àtimer@4903a000ti,omap3430-timerI Ï*Útimer6àtimer@4903c000ti,omap3430-timerIÀÏ+Útimer7àtimer@4903e000ti,omap3430-timerIàÏ,Útimer8íàtimer@49040000ti,omap3430-timerIÏ-Útimer9ítimer@48086000ti,omap3430-timerH`Ï.Útimer10ítimer@48088000ti,omap3430-timerH€Ï/Útimer11ítarget-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@çrevsyscsyssñ' þ ƒ¯Šfckick+ äH0@timer@0ti,omap3430-timerÏ_ªúusbhstll@48062000 ti,usbhs-tllH ÏN Úusb_tll_hsusbhshost@48064000ti,usbhs-hostH@ Úusb_host_hs+ä  ehci-phyohci@48064400ti,ohci-omap3HDÏLehci@48064800 ti,ehci-omapHHÏM-gpmc@6e000000ti,omap3430-gpmcÚgpmcnÐÏrxtx2>+ úHX0ä0+,Çnand@0,0ti,omap2-nandPmicron,mt29c4g96maz  Ï_n€bch8�¡¯,Á,Óâ"õ,(6&@5RFRW(i+partition@0�SPLpartition@80000�U-Bootpartition@1c0000 �Environment$partition@280000�Kernel(€partition@780000 �Filesystem¨ethernet@gpmcsmsc,lan9221smsc,lan9115‡’¡¯*Á$Óâ õ ¤*²$5<F6&$ÀÚñiW*  % ? O ] j ÿ Ïethernet@4,0smsc,lan9221smsc,lan9115‡’¡¯*Á$Óâ õ ¤*²$5<F6&$ÀÚñiW*  % ? O ] j ÿ Ïusb_otg_hs@480ab000ti,omap3-musbH °Ï\][mcdma Úusb_otg_hs € ‹ “  œ «- ³usb2-phyÝ ½2dss@48050000 ti,omap3-dssH -disabled Údss_coreƒµŠfck+ädispc@48050400ti,omap3-dispcHÏ Údss_dispcƒµŠfckencoder@4804fc00 ti,omap3-dsiHüHþ@Hÿ çprotophypllÏ -disabled Údss_dsi1ƒµ´ Šfcksys_clk+encoder@48050800ti,omap3-rfbiH -disabled Údss_rfbiƒµ¶Šfckickencoder@48050c00ti,omap3-vencH  -disabled Údss_vencƒ²Šfckssi-controller@48058000 ti,omap3-ssiÚssi-okayH€H�çsysgddÏG[gdd_mpu+ä ƒt  Šssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portH H¨çtxrxÏCDssi-port@4805b000ti,omap3-ssi-portH°H¸çtxrxÏEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%Ø$+ëú  >ÿ[defaulti pinmux_hsusb2_2_pins0s   " Ç pinmux_w3cbw003c_2_pinssÇisp@480bc000 ti,omap3-ispH ÀüH Ø|Ï Ã ‡l ÊÍports+bandgap@48002524H%$ti,omap34xx-bandgap ÖÇtarget-module@480cb000ti,sysc-omap3430-srti,syscÚsmartreflex_coreH °$çsyscñƒ Šfck+ äH °smartreflex@0ti,omap3-smartreflex-coreÏtarget-module@480c9000ti,sysc-omap3430-srti,syscÚsmartreflex_mpu_ivaH �$çsyscñƒ Šfck+ äH �smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaÏtarget-module@50000000ti,sysc-omap2ti,syscPçrevƒáŠfckick+ äP@opp-tableoperating-points-v2-ti-cpu‡Çopp1-125000000 ìsY@ óà˜à˜à˜ ÿÿÿÿopp2-250000000 ìæ²€ óg8g8g8 ÿÿÿÿ opp3-500000000 ìÍe óO€O€O€ ÿÿÿÿopp4-550000000 ì ÈU€ ótxtxtx ÿÿÿÿopp5-600000000 ì#ÃF ó™p™p™p ÿÿÿÿopp6-720000000 ì*êT ó™p™p™p ÿÿÿÿ thermal-zonescpu_thermal )ú ?è MN  Ztripscpu_alert j8€ vÐzpassiveÇcpu_crit j_� vÐ zcriticalcooling-mapsmap0 � †ÿÿÿÿÿÿÿÿmemory@0smemorypwmleds pwm-ledsovero�overo:blue:COM •w5” š ©mmc0soundti,omap-twl4030 ¿overo Èhsusb2_power_regregulator-fixed Žhsusb2_vbus�LK@µLK@ Ñ Öp çÇhsusb2_phyusb-nop-xceiv ú âÇregulator-w3cbw003c-npoweronregulator-fixedŽregulator-w3cbw003c-npoweron�2Z µ2Z  Ñ çÇöregulator-w3cbw003c-wifi-nreset[defaultiregulator-fixed Žregulator-w3cbw003c-wifi-nreset�2Z µ2Z  Ñ Ö'Ç÷lis33-3v3-regregulator-fixedŽlis33-3v3-reg�2Z µ2Z Çñlis33-1v8-regregulator-fixedŽlis33-1v8-reg�w@µw@Çðregulator-vddvarioregulator-fixed Žvddvario Çregulator-vdd33aregulator-fixedŽvdd33a Ç compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespoweriommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicepwmsmax-brightnesslinux,default-triggerti,modelti,mcbspgpiostartup-delay-usenable-active-highreset-gpiosvcc-supplyregulator-always-on